WO2012071892A1 - 电阻转变存储器及其制备方法 - Google Patents

电阻转变存储器及其制备方法 Download PDF

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WO2012071892A1
WO2012071892A1 PCT/CN2011/076637 CN2011076637W WO2012071892A1 WO 2012071892 A1 WO2012071892 A1 WO 2012071892A1 CN 2011076637 W CN2011076637 W CN 2011076637W WO 2012071892 A1 WO2012071892 A1 WO 2012071892A1
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functional layer
resistance
resistive
resistive functional
carbon nanotube
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French (fr)
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霍宗亮
刘明
刘璟
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Institute of Microelectronics of CAS
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/061—Shaping switching materials
    • H10N70/066—Shaping switching materials by filling of openings, e.g. damascene method
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/841—Electrodes
    • H10N70/8418—Electrodes adapted for focusing electric field or current, e.g. tip-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8833—Binary metal oxides, e.g. TaOx
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • H10N70/883—Oxides or nitrides
    • H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes

Definitions

  • the present invention relates to the field of microelectronic devices and memory technologies, and in particular, to a resistance conversion memory and a method of fabricating the same.
  • Non-volatile memories on the market currently use flash memory as the mainstream, but in the process of shrinking device size, the flash memory exhibits excessive operating voltage, slow operation speed, insufficient durability, and excessively thin tunneling. Wearing an oxide layer will result in shortcomings such as insufficient memory time. Ideal non-volatile memories should have low operating voltage, simple structure, non-destructive reading, fast operating speed, long retention time, small device area, and good endurance.
  • the resistance change type memory is mainly based on the variable resistance characteristic of the solid oxide film material, and the device structure thereof is as shown in Fig. 1, and is formed by stacking three layers of the upper electrode, the resistive functional layer and the lower electrode. Under the action of a suitable external bias voltage, conductive filaments may be formed in the resistive functional layer film, or may be broken. Therefore, the resistance value may have two different states, and the two resistance states are mutually interacted by an applied electric field. Convert, thus achieving the storage of two states of "0" "1", as shown in Figure 2.
  • RRAM has the potential to replace existing mainstream FLASH memory at 32nm node and below, and thus has become an important research direction of new memory devices.
  • Current RRAM material systems include: Complex oxides, such as SrTi0 3 perovskite materials SrZr0 3 and the like.
  • Simple binary transition metal oxides including oxides of transition metal elements such as Cu, Ti, Ni, Ta, Hf, Nb. Compared to other complex materials, binary transition metal oxides have a simple structure, are easy to manufacture, and are compatible with existing CMOS processes. The advantages.
  • nanocrystalline particles are usually introduced into the resistive material, the local field enhancement effect by the nanocrystals is controlled, and the conductivity in the resistive functional layer is controlled by controlling the size and distribution of the nanocrystalline particles. Filament growth, enhancing the uniformity and stability of the device performance, and thus become an effective technical means to promote the resistance technology to practical, as shown in Figure 3.
  • the method of embedding the nanocrystalline particles in the resistive layer is to deposit a nanocrystalline material film by a process such as CVD or PVD, and to form a nanocrystalline particle by appropriate heat treatment.
  • the present invention is directed to providing a resistance conversion memory having a simple manufacturing process, a low manufacturing cost, and a higher conversion ratio capability, and the present invention. Preparation.
  • the present invention provides a resistance conversion memory including a lower electrode, a resistive functional layer and an upper electrode in order from bottom to top, wherein the resistive functional layer is embedded with carbon nanotubes, Under the external bias condition, the local electric field enhancement effect of the carbon nanotubes promotes and controls the growth of the conductive filaments in the resistive functional layer, thereby improving device performance and stability.
  • the resistive functional layer is a single-layer resistive layer composed of a resistive material, or a composite resistive layer formed by sequentially stacking a plurality of resistive materials.
  • the resistive material is a complex oxide, a perovskite material or a binary transition metal oxide.
  • Complex oxide for The perovskite material is SrTi0 3 or SrZr0 3.
  • the binary transition metal oxide is Hf0 2, Cu0 2, Ti ⁇ 2 or Zr0 2.
  • the carbon nanotubes are embedded in any position in the resistive functional layer, including: a position of the resistive functional layer and the upper electrode interface adjacent to the upper electrode of the device, and a device adjacent to the resistive functional layer and the lower electrode interface. The position of the lower electrode and any position in the middle of the resistive functional layer.
  • the material of the lower electrode or the upper electrode is a doped silicon film material, or a metal electrode material, or a metal nitride material, or a metal silicide material.
  • the metal electrode material used for the lower electrode is Ag, Au, Cu, W, Ti, Pt, TiN, WN or TaN.
  • the metal electrode material used in the upper electrode is Ag, Au, Cu, W, Ti or Pt.
  • the present invention also provides a method of fabricating a resistance conversion memory, comprising:
  • An upper electrode is deposited on the planarized resistive functional layer film.
  • the method of preparing the lower electrode on the base material by electron beam evaporation is used.
  • the catalyst material is Ni, Fe or Co.
  • the isolation dielectric layer is grown on the surface of the catalyst material by CVD, evaporation or sputtering, and the isolation medium is Si0 2 , Si 3 N 4 or BPSG.
  • the carbon nanotubes are grown on the etched isolation dielectric layer by a CVD method or a chemical spin coating method.
  • the film of the resistive functional layer deposited on the carbon nanotube is evaporated by electron beam Method.
  • the deposition of the deposited resistive functional layer film is performed by chemical mechanical polishing.
  • the method of depositing the upper electrode on the flattened resistive functional layer film by electron beam evaporation is used.
  • the present invention also provides a method of fabricating a resistance conversion memory, comprising:
  • Etching the isolation dielectric layer to form a via structure the etching stops at the surface of the lower electrode; depositing a resistive functional layer material in the formed via structure;
  • An upper electrode is deposited on the planarized resistive functional layer film.
  • the deposited resistive functional layer material in the step of depositing the resistive functional layer material in the formed via structure, cannot completely fill the via structure, and the resistive functional layer material is in the through hole.
  • the height in the structure determines the position of the carbon nanotubes in the resistive functional layer.
  • the catalyst material is Ni, Fe or Co
  • the carbon nanotube is formed on the catalyst medium (the carbon nanotube catalyst material is formed by a CVD method or a chemical spin coating method).
  • the present invention also provides a method of fabricating a resistance conversion memory, comprising:
  • Etching the isolation dielectric layer to form a via structure the etching stops at the surface of the lower electrode; depositing a resistive functional layer material in the formed via structure until the via structure is completely filled;
  • Etching the resistive functional layer material in the via structure Depositing a catalyst material required for carbon nanotube growth on the remaining resistive functional layer material; growing a carbon nanotube catalyst material on the catalyst material to form a carbon nanotube; and depositing an upper electrode on the carbon nanotube.
  • the catalyst material is Ni, Fe or Co
  • the carbon nanotube catalyst material is grown on the catalyst material to form a carbon nanotube by a CVD method or a chemical spin coating method.
  • the present invention has the following beneficial effects:
  • the resistance conversion memory and the preparation method thereof provided by the invention adopt nanocarbon tubes instead of nano crystal particles to improve the performance of the RRAM device, the carbon nanotubes have a small size (about 0.5 nm in diameter), and the preparation process thereof is also easy to be small. A better uniformity distribution is achieved in the device, and thus the RRAM device using the resistance conversion memory of the present invention has a good ratiometric capability.
  • the method for preparing a resistance conversion memory provided by the present invention can effectively adjust the operating voltage and resistance state of the device by controlling the length and position of the carbon nanotubes in the resistive functional layer.
  • the method for preparing the resistance conversion memory provided by the invention can realize the modulation of the operating voltage of the device by controlling the length of the carbon tube, thereby improving the stability of the performance of the device.
  • the method for preparing a resistance-switching memory provided by the present invention has a simple manufacturing process and low cost, and the above advantages are beneficial to the wide application and application of the present invention.
  • FIG. 1 is a schematic diagram of a basic structure of a conventional resistance-transition type nonvolatile memory device
  • FIG. 2 is a schematic diagram showing a basic structure and a storage principle of a conventional RRAM device
  • FIG. 3 is a schematic diagram of a current technical solution using a nanocrystal field enhancement effect
  • FIG. 4 is a flowchart of a resistance conversion memory having a high ratio ratio capability according to an embodiment of the present invention
  • FIG. 5 is a flowchart of preparing a resistance conversion memory having a high ratio capability according to an embodiment of the present invention
  • FIG. 6 is a schematic diagram of a 1D1R memory array implemented on the basis of a prototype of an RRAM device in accordance with an embodiment of the present invention. The present invention will be further described in detail below with reference to the accompanying drawings, in which FIG.
  • FIG. 4 is a schematic diagram of a resistance conversion memory having a high conversion ratio capability according to an embodiment of the present invention.
  • the resistance conversion memory includes a lower electrode, a resistive functional layer and an upper electrode in order from bottom to top.
  • the carbon nanotubes are embedded in the resistive functional layer, and the local electric field enhancement effect of the carbon nanotubes is promoted and controlled to promote and control the growth of the conductive filaments in the resistive functional layer under external bias conditions, thereby improving device performance. And stability.
  • the resistance conversion memory provided by the invention replaces the nanocrystalline particles with carbon nanotubes to improve the performance of the RRAM device. Since the carbon nanotube has a small size (about 0.5 nm in diameter), the preparation process is also easy to realize in a small-sized device. A good uniformity distribution, and thus the RRAM device using the resistance conversion memory of the present invention has a good ratiometric capability.
  • the resistive functional layer is a single-layer resistive layer composed of a resistive material, or a composite resistive layer composed of a plurality of resistive materials stacked in turn.
  • the carbon nanotubes may be embedded in any position in the resistive functional layer, such as: immediately adjacent to the upper electrode of the device (ie, the resistive functional layer and the upper electrode interface), adjacent to the lower electrode of the device (ie, the resistive functional layer and the lower electrode interface), And anywhere in the middle of the resistive functional layer.
  • the process in which the carbon nanotubes are embedded in the resistive functional layer may be a long-term resistive functional layer, and then the catalyst material required for the growth of the carbon nanotubes is grown on the resistive functional layer, and then the catalytic material is The carbon nanotubes are grown on the surface, and finally the resistive functional layer is grown on the carbon nanotubes to realize the intercalation of the carbon nanotubes.
  • the length and density of the carbon nanotubes are controlled by the process adjustment, and the operation voltage and resistance state of the device are modulated by controlling the length of the carbon nanotubes, that is, the operating voltage and resistance of the device can be reduced by increasing the length of the carbon nanotubes. , by adjusting the length of the carbon tube to obtain the appropriate operating voltage and resistance level.
  • the density of the carbon nanotubes is determined by the density of the catalyst material, and the length of the carbon nanotubes is determined by the growth time of the carbon nanotubes.
  • the material used for the resistive functional layer may be a complex oxide, a perovskite material or a binary transition metal oxide or the like.
  • the complex oxide is generally Pr 1-x Ca x Mn0 3
  • the perovskite material is generally SrTi0 3 or SrZr0 3
  • the binary transition metal oxide is generally Hf0 2 , Cu0 2 , Ti0 2 or Zr0 2 .
  • the material used for the lower electrode or the upper electrode may be a doped silicon thin film material, a metal electrode material, a metal nitride material or a metal silicide material.
  • the metal electrode material used for the lower electrode is Ag, Au, Cu, W, Ti, Pt, TiN, WN or TaN
  • the metal electrode material used for the upper electrode is Ag, Au. , Cu, W, Ti or Pt, etc.
  • the embodiment of the present invention further provides a method for preparing a resistance conversion memory having a high ratio ratio capability, which comprises the following steps:
  • Step h preparing a lower electrode on the substrate material
  • Step 2 depositing a catalyst material required for carbon nanotube growth on the surface of the lower electrode;
  • Step 3 growing an isolation dielectric layer on the surface of the catalyst material;
  • Step 4 etching the isolation dielectric layer to form a via structure
  • Step 5 growing a carbon nanotube in the via structure formed after etching the isolation dielectric layer; Step 6: depositing a resistive functional layer film on the carbon nanotube;
  • Step 7 planarizing the deposited resistive functional layer film
  • Step 8 depositing an upper electrode on the planarized resistive functional layer film.
  • the method of preparing the lower electrode on the base material in step 1 and depositing the upper electrode on the flattened resistive functional layer film in step 8 may employ electron beam evaporation.
  • the catalyst material required for depositing the carbon nanotubes on the surface of the lower electrode in the step 2 may be a thin metal layer such as Ni, Fe or Co, and the growth method may also be a method of electron beam evaporation.
  • the method of growing the isolation dielectric layer on the surface of the catalyst material in the step 3 may be a method such as CVD, evaporation or sputtering, and the isolation medium is generally SiO 2 , Si 3 N 4 or BPSG.
  • the carbon nanotubes grown in the via structure formed after etching the isolation dielectric layer in the step 5 are generally subjected to a CVD method or a chemical spin coating method.
  • carbon nanotubes of different densities can be obtained by changing the temperature, pressure, power and the like of the CVD process, and the length of the carbon nanotubes is adjusted by controlling the CVD growth time.
  • the carbon nanotubes are grown by the chemical spin coating method, the carbon nanotubes of different densities can be prepared by controlling the number of moles of the spin-on sol liquid containing the carbon nanotubes and the rotation speed of the spin-coating centrifuge.
  • the film of the resistive functional layer deposited on the carbon nanotubes in the step 6 is generally subjected to an electron beam evaporation method.
  • the method of planarizing the deposited resistive functional layer film in step 7 is by chemical mechanical polishing.
  • Au is used as the lower electrode of the device
  • Zr0 2 is used as the material of the resistive layer of the device
  • Pt is used as the upper electrode of the device, and the specific preparation process is shown in FIG. 5-1 to FIG. 5-7.
  • the following steps are performed: depositing an Au thin film on the substrate by electron beam evaporation as a metal lower electrode of the device; depositing a thin layer of Co metal on the surface of the Au thin film deposition as a catalytic material for growing the carbon nanotube;
  • the Si0 2 is isolated from the dielectric layer, and then the Si0 2 isolation dielectric layer is etched to form a via structure; the CVD growth carbon nanotube is formed in the via structure formed by etching, and deposited on the carbon nanotube by electron beam evaporation process.
  • Zr0 2 resistive functional layer; chemical mechanical polishing Zr0 2 layer is deposited resistive functional planarized; Finally, the functional layer becomes the electron beam vapor deposition in Zr0 2 Ti barrier planarized, Pt upper electrode, Complete device preparation.
  • FIGS. 5-1 to 5-7 are flowcharts for preparing a resistance change memory having a high ratio ratio capability according to an embodiment of the present invention, wherein FIG. 5-1 is an Au lower electrode prepared on a base material.
  • Figure 5-2 is a schematic view of the catalytic material Ni required for depositing carbon nanotubes on the surface of the Au under the electrode;
  • Figure 5-3 is a schematic view of CVD deposition of the Si0 2 isolation dielectric layer on the surface of the catalytic material Ni;
  • 5-4 is a schematic view of etching a Si0 2 isolation dielectric layer to form a via hole, the etching is stopped on the surface of the catalytic material Ni;
  • FIG. 5-1 is an Au lower electrode prepared on a base material.
  • Figure 5-2 is a schematic view of the catalytic material Ni required for depositing carbon nanotubes on the surface of the Au under the electrode
  • Figure 5-3 is a schematic view of CVD deposition of the Si0 2 isolation dielectric layer on the surface of the cata
  • FIGS. 5-5 is a nano-carbon deposited on the surface of the exposed catalyst material Ni formed in the via structure.
  • Figure 5-6 is a schematic diagram of depositing a Zr0 2 resistive functional layer on a carbon nanotube by an electron beam evaporation process
  • Figure 5-7 is planarization, and electron beam evaporation
  • the carbon nanotubes are embedded in the resistive functional layer and the lower electrode interface (ie, adjacent to the lower electrode of the device).
  • the carbon nanotubes may be embedded in the resistive functional layer. Position, such as: Immediately adjacent to the upper electrode of the device (ie, the resistive functional layer and the upper electrode interface) and anywhere between the resistive functional layers.
  • the specific steps are as follows: preparing a lower electrode on the base material; Forming an isolation dielectric layer; etching the isolation dielectric layer to form a via structure, the etching stops at the surface of the lower electrode; depositing a resistive functional layer material in the formed via structure, and depositing the resistive functional layer material
  • the via structure may not be completely filled, and the height of the resistive functional layer material in the via structure determines the position of the carbon nanotube in the resistive functional layer; and then the carbon nanotube growth chamber is deposited on the resistive functional layer material.
  • the catalyst material is needed; the carbon nanotube catalyst material is grown on the catalyst material to form a carbon nanotube; and the resistive functional layer material is deposited on the carbon nanotube until the via structure is completely filled; the resistive function of the deposition
  • the layer film is planarized; and an upper electrode is deposited on the planarized resistive functional layer film.
  • the catalyst material is Ni, Fe or Co
  • the carbon nanotube catalyst material is grown on the catalyst material to form a carbon nanotube by a CVD method or a chemical spin coating method.
  • the specific steps are as follows: preparing a lower electrode on the substrate material; growing an isolation dielectric layer on the surface of the lower electrode; etching the isolation medium a layer, forming a via structure, the etching stops at the surface of the lower electrode; depositing a resistive functional layer material in the formed via structure until the via structure is completely filled; the resistive functional layer in the via structure The material is etched, and the etching depth satisfies the requirement of growing the carbon nanotubes on the remaining resistive functional layer material; then, the catalyst material required for the growth of the carbon nanotubes is deposited on the remaining resistive functional layer material; A carbon nanotube catalyst material is grown on the catalyst material to form a carbon nanotube; and an upper electrode is deposited on the carbon nanotube.
  • the catalyst material is Ni, Fe or Co
  • the carbon nanotube catalyst material is grown on the catalyst material to form a carbon nanotube by a CVD
  • the non-volatile memory device has a good further ratio-ratio capability, and the operating voltage and resistance of the device can be effectively adjusted by controlling the length and position of the carbon nanotubes in the resistive functional layer. status.
  • the non-volatile memory device provided by the invention has simple preparation process, low manufacturing cost, and good compatibility with the conventional silicon planar CMOS process, and is convenient for industrial application and promotion.

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Description

电阻转变存储器及其制备方法
技术领域 本发明涉及微电子器件及存储器技术领域， 尤其涉及一种电阻转变 存储器及其制备方法。
发明背景 当前市场上的非易失性存储器以闪存 (Flash)为主流， 但是在器件尺 寸不断縮小的过程中， 闪存呈现操作电压过大、 操作速度慢、 耐久力不 够好以及由于过薄的隧穿氧化层将导致记忆时间不够长等缺点。 理想的 非挥发性存储器应具备操作电压低、 结构简单、 非破坏性读取、 操作速 度快、 记忆时间 （Retention) 长、 器件面积小、 疲劳特性 (Endurance)好 等条件。
目前已经对许多新型材料和器件进行了研究， 试图来达到上述的目 标， 其中有相当部分的新型存储器器件都采用电阻值的改变来作为记忆 的方式。 其中电阻转变型存储器 (RRAM)主要是基于固态氧化物薄膜材 料的电阻可变特性的， 其器件结构如图 1所示， 由上电极、 阻变功能层 和下电极三层依次堆叠形成。 在适当的外加偏压的作用下， 该阻变功能 层薄膜中可以形成导电细丝， 或者断裂， 因此其电阻值可以具有两种不 同的状态， 这两种电阻状态在外加电场的作用下相互转换， 从而实现 "0""1"两种状态的存储， 如图 2所示。
RRAM具有在 32nm节点及以下取代现有主流 FLASH存储器的潜 力， 因而成为目前新型存储器器件的一个重要研究方向。 目前 RRAM的 材料体系包括： 复杂的氧化物， 例如
Figure imgf000003_0001
钙钛矿材料 SrTi03 和 SrZr03等。 简单的二元过渡族金属氧化物， 包括 Cu、 Ti、 Ni、 Ta、 Hf、 Nb 等过渡族金属元素的氧化物。 相比较其它的复杂材料， 二元过 渡族金属氧化物具有结构简单， 制造容易， 以及和现有 CMOS工艺兼容 的优点。
但是， 阻碍 RRAM器件走向实际应用的一大瓶颈是，器件性能的稳 定性较难控制， 目前尚不能满足大规模集成的要求。 为了进一步提高 RRAM器件的性能和产率， 通常在阻变材料中引入纳米晶颗粒， 通过纳 米晶具有的局部场增强效应， 并且通过控制纳米晶颗粒的尺寸和分布以 控制阻变功能层中导电细丝生长， 增强器件性能的均匀性和稳定性， 进 而成为推动阻变技术走向实用的一种有效的技术手段， 如图 3所示。 在 阻变层中嵌入纳米晶颗粒的实施手段为， 采用 CVD或者 PVD等工艺淀 积纳米晶材料薄膜， 加以适当的热处理形成纳米晶颗粒。
但是， 随着器件尺寸的缩小， 此技术方案将面临严峻挑战， 主要原 因是纳米晶颗粒的尺寸（5-15nm) 的已经很难持续缩小， 且很难达到大 面积的均匀性。 当 RRAM器件特征尺寸縮小至 15-20nm， 纳米晶尺寸已 经和整体器件尺寸相仿，无法保证纳米晶颗粒在阵列中不同 RRAM器件 中的分布或者存在， 即失去对器件性能的调控作用。 因此， 迫切需要改 进的技术方案。
发明内容 针对上述现有电阻转变存储技术方案在进一步变比能力上存在的 不足， 本发明的主要目的在于提供一种制造工艺简单、 制造成本低、 具 有更高变比能力的电阻转变存储器及其制备方法。
为达到上述目的， 本发明提供了一种电阻转变存储器， 该电阻转变 存储器自下而上依次包括下电极、 阻变功能层和上电极， 其中该阻变功 能层中嵌入有纳米碳管， 在外加偏置条件下， 通过该纳米碳管的局部电 场增强效应， 促进和控制该阻变功能层中导电细丝的生长， 提高器件性 能和稳定性。
上述方案中， 所述阻变功能层是由一种阻变材料构成的单层阻变 层， 或者是由多种阻变材料依次堆垛而构成的复合阻变层。 所述阻变材 料为复杂氧化物、 钙钛矿材料或二元过渡金属氧化物。 所述复杂氧化物 为
Figure imgf000005_0001
所述钙钛矿材料为 SrTi03或 SrZr03。所述二元过渡金 属氧化物为 Hf02、 Cu02、 Ti〇2或 Zr02。
上述方案中， 所述纳米碳管嵌入于该阻变功能层中的任意位置， 包 括- 阻变功能层与上电极界面处紧邻器件上电极的位置、 阻变功能层与 下电极界面处紧邻器件下电极的位置、 以及在阻变功能层中间任意位 置。
上述方案中， 所述下电极或上电极采用的材料均为掺杂硅薄膜材 料， 或者金属电极材料， 或者金属氮化物材料， 或者金属硅化物材料。 所述下电极采用的金属电极材料为 Ag、 Au、 Cu、 W、 Ti、 Pt、 TiN、 WN或 TaN。 所述上电极采用的金属电极材料为 Ag、 Au、 Cu、 W、 Ti 或 Pt。
为达到上述目的， 本发明还提供了一种制备电阻转变存储器的方 法， 包括：
在基底材料上制备下电极；
在下电极表面淀积纳米碳管生长所需的触媒材料；
在触媒材料表面生长隔离介质层；
刻蚀该隔离介质层， 形成通孔结构；
在刻蚀后的隔离介质层上生长纳米碳管；
在纳米碳管上淀积阻变功能层薄膜；
对淀积的阻变功能层薄膜进行平坦化； 以及
在平坦化后的阻变功能层薄膜上淀积上电极。
上述方案中， 所述在基底材料上制备下电极采用电子束蒸发的方 法。
上述方案中， 所述触媒材料为 Ni、 Fe或 Co。
上述方案中，所述在触媒材料表面生长隔离介质层采用 CVD、蒸发 或溅射， 所述隔离介质为 Si02、 Si3N4或 BPSG。
上述方案中，所述在刻蚀后的隔离介质层上生长纳米碳管釆用 CVD 法或者化学旋涂法。
上述方案中， 所述在纳米碳管上淀积阻变功能层薄膜采用电子束蒸 发方法。
上述方案中， 所述对淀积的阻变功能层薄膜进行平坦化采用化学机 械抛光。
上述方案中， 所述在平坦化后的阻变功能层薄膜上淀积上电极采用 电子束蒸发的方法。
为达到上述目的， 本发明还提供了一种制备电阻转变存储器的方 法， 包括：
在基底材料上制备下电极；
在下电极表面生长隔离介质层；
刻蚀该隔离介质层， 形成通孔结构， 该刻蚀止于下电极表面； 在形成的通孔结构中淀积阻变功能层材料；
在阻变功能层材料上淀积纳米碳管生长所需的触媒材料； 在该触媒材料上生长纳米碳管触媒材料形成纳米碳管；
再在纳米碳管上淀积阻变功能层材料， 直至完全填充该通孔结构； 对淀积的阻变功能层薄膜进行平坦化； 以及
在平坦化后的阻变功能层薄膜上淀积上电极。
上述方案中， 所述在形成的通孔结构中淀积阻变功能层材料的步骤 中， 淀积的阻变功能层材料不能完全填满该通孔结构， 该阻变功能层材 料在通孔结构中的高度决定纳米碳管在阻变功能层中的位置。
上述方案中， 所述触媒材料为 Ni、 Fe或 Co， 所述在该触媒材^ (上 生长纳米碳管触媒材料形成纳米碳管采用 CVD法或者化学旋涂法。
为达到上述目的， 本发明还提供了一种制备电阻转变存储器的方 法， 包括：
在基底材料上制备下电极；
在下电极表面生长隔离介质层；
刻蚀该隔离介质层， 形成通孔结构， 该刻蚀止于下电极表面； 在形成的通孔结构中淀积阻变功能层材料， 直至完全填充该通孔结 构；
对该通孔结构中的阻变功能层材料进行刻蚀； 在剩余的阻变功能层材料上淀积纳米碳管生长所需的触媒材料； 在该触媒材料上生长纳米碳管触媒材料形成纳米碳管； 以及 在纳米碳管上淀积上电极。
上述方案中， 所述触媒材料为 Ni、 Fe或 Co, 所述在该触媒材料上 生长纳米碳管触媒材料形成纳米碳管采用 CVD法或者化学旋涂法。
从上述技术方案可以看出， 本发明具有以下有益效果：
1、 本发明提供的电阻转变存储器及其制备方法， 采用纳米碳管取 代纳米晶颗粒以提高 RRAM器件的性能， 纳米碳管尺寸很小 （直径约 0.5nm), 其制备工艺也易于在小尺寸器件中获实现较好的均匀性分布， 因而采用本发明电阻转变存储器的 RRAM器件具有很好的变比能力。
2、 本发明提供的电阻转变存储器其制备方法， 通过控制阻变功能 层中纳米碳管的长度及位置可以有效调节器件的操作电压和阻值状态。
3、 本发明提供的电阻转变存储器其制备方法， 可以通过对碳管长 度的控制实现对器件操作电压的调制， 提高器件性能的稳定性。
4、 本发明提供的制备电阻转变存储器其制备方法， 其制造工艺简 单， 成本低， 上述优势都有利于本发明的广泛推广和应用。
附图简要说明 图 1为现有电阻转变型非易失性存储器件基本结构示意图； 图 2为现有 RRAM器件基本结构及存储原理示意图；
图 3为当前采用纳米晶场增强效应技术方案的示意图；
图 4为本发明实施例提供的具有高变比能力的电阻转变存储器的示 图 5-1至图 5-7为依照本发明实施例制备具有高变比能力的电阻转 变存储器的流程图；
图 6为依照本发明实施例在 RRAM器件原型基础上实现的 1D1R存 储阵列的示意图。 实施本发明的方式 为使本发明的目的、 技术方案和优点更加清楚明白， 以下结合具体 实施例， 并参照附图， 对本发明进一步详细说明。
如图 4所示， 图 4为本发明实施例提供的具有高变比能力的电阻转 变存储器的示意图， 该电阻转变存储器自下而上依次包括下电极、 阻变 功能层和上电极。 其中， 该阻变功能层中嵌入有纳米碳管， 在外加偏置 条件下， 通过该纳米碳管的局部电场增强效应， 促进和控制该阻变功能 层中导电细丝的生长， 提高器件性能和稳定性。
本发明提供的电阻转变存储器， 采用纳米碳管取代纳米晶颗粒以提 高 RRAM器件的性能， 由于纳米碳管尺寸很小 （直径约 0.5nm)， 其制 备工艺也易于在小尺寸器件中获实现较好的均匀性分布， 因而采用本发 明电阻转变存储器的 RRAM器件具有很好的变比能力。
在本发明的一个实施例中， 阻变功能层是由一种阻变材料构成的单 层阻变层， 或者是由多种阻变材料依次堆垛而构成的复合阻变层。 纳米 碳管可以嵌入于该阻变功能层中的任意位置， 如： 紧邻器件上电极 （即 阻变功能层和上电极界面）、 紧邻器件下电极 （即阻变功能层和下电极 界面）、 以及在阻变功能层中间任意位置。 纳米碳管嵌入于该阻变功能 层中的过程， 可以是先生长一阻变功能层， 然后在该阻变功能层上生长 淀积纳米碳管生长所需的触媒材料， 接着在该触媒材料表面生长纳米碳 管， 最后再在纳米碳管上生长阻变功能层， 实现纳米碳管的嵌入。
另外， 纳米碳管的长度及密度由工艺调节控制， 并通过对纳米碳管 长度的控制实现对器件操作电压和阻值状态的调制， 即通过增加纳米碳 管长度可以降低器件操作电压和阻值， 通过调节碳管的长度获得合适的 操作电压和阻值量级。 其中纳米碳管的密度由触媒材料密度决定， 纳米 碳管的长度由纳米碳管生长时间决定。
在本发明的一个实施例中， 阻变功能层采用的材料可以为复杂氧化 物、 钙钛矿材料或二元过渡金属氧化物等。 其中， 复杂氧化物一般为 Pr1-xCaxMn03, 钙钛矿材料一般为 SrTi03或 SrZr03等， 二元过渡金属氧 化物一般为 Hf02、 Cu02、 Ti02或 Zr02等。 在本发明的一个实施例中， 下电极或上电极采用的材料均可以为掺 杂硅薄膜材料、 金属电极材料、 金属氮化物材料或者金属硅化物材料。 当下电极或上电极均采用金属电极材料时， 下电极采用的金属电极材料 为 Ag、 Au、 Cu、 W、 Ti、 Pt、 TiN、 WN或 TaN等， 上电极采用的金属 电极材料为 Ag、 Au、 Cu、 W、 Ti或 Pt等。
基于上述本发明实施例提供的具有高变比能力的电阻转变存储器， 本发明实施例还提供了一种具有高变比能力的电阻转变存储器的制备 方法， 该方法包括以下步骤：
步骤 h 在基底材料上制备下电极；
步骤 2: 在下电极表面淀积纳米碳管生长所需的触媒材料； 步骤 3: 在触媒材料表面生长隔离介质层；
步骤 4: 刻蚀该隔离介质层， 形成通孔结构；
步骤 5 : 在刻蚀隔离介质层后形成的通孔结构中生长纳米碳管； 步骤 6: 在纳米碳管上淀积阻变功能层薄膜；
步骤 7: 对淀积的阻变功能层薄膜进行平坦化； 以及
步骤 8: 在平坦化后的阻变功能层薄膜上淀积上电极。
上述实施例中， 步骤 1中所述在基底材料上制备下电极和步骤 8中 所述在平坦化后的阻变功能层薄膜上淀积上电极均可以采用电子束蒸 发的方法。 步骤 2中所述在下电极表面淀积纳米碳管生长所需的触媒材 料可以为 Ni、 Fe或 Co等金属薄层， 其生长方法也可采用电子束蒸发的 方法。步骤 3中所述在触媒材料表面生长隔离介质层可以采用 CVD、蒸 发或溅射等方法， 该隔离介质为一般采用 Si02、 Si3N4或 BPSG等。 步 骤 5中所述在刻蚀隔离介质层后形成的通孔结构中生长纳米碳管一般采 用 CVD法或者化学旋涂法等。
采用 CVD方法生长纳米碳管时，通过改变 CVD工艺的温度、气压、 功率等条件可以获得不同密度的纳米碳管， 通过对 CVD生长时间的控 制调节纳米碳管的长度。 采用化学旋涂法生长纳米碳管时， 通过对含有 纳米碳管的旋涂溶胶液的摩尔数选择和旋涂离心机转速的控制， 可以实 现不同密度的纳米碳管制备。 步骤 6中所述在纳米碳管上淀积阻变功能层薄膜一般采用电子束蒸 发方法。 步骤 7中所述对淀积的阻变功能层薄膜进行平坦化采用化学机 械抛光的方法。
在本发明的一个实施例中， 采用 Au作为器件下电极， Zr02作为器 件阻变层材料， Pt作为器件的上电极， 则具体的制备工艺流程如图 5-1 至图 5-7所示， 具体以下步骤： 在基底上采用电子束蒸发淀积 Au薄膜， 作为器件的金属下电极；在 Au薄膜淀积表面淀积 Co金属薄层，作为生 长纳米碳管的触媒材料； 采用 CVD方法淀积 Si02隔离介质层， 然后刻 蚀 Si02隔离介质层，形成通孔结构；在刻蚀形成的通孔结构中采用 CVD 生长纳米碳管，并采用电子束蒸发工艺在纳米碳管上淀积 Zr02阻变功能 层； 采用化学机械抛光对淀积的 Zr02阻变功能层进行平坦化； 最后， 在 平坦化后的 Zr02阻变功能层上电子束蒸发淀积 Ti、 Pt上电极， 完成器 件制备。
对应于上述实施例， 图 5-1至图 5-7为依照本发明实施例制备具有 高变比能力的电阻转变存储器的流程图， 其中， 图 5-1是在基底材料上 制备 Au下电极的示意图；图 5-2是在 Au下电极表面淀积纳米碳管生长 所需的触媒材料 Ni的示意图； 图 5-3是在触媒材料 Ni表面 CVD淀积 Si02隔离介质层的示意图； 图 5-4是对 Si02隔离介质层进行刻蚀形成通 孔的示意图， 该刻蚀止于触媒材料 Ni表面； 图 5-5是形成的通孔结构中 露出的触媒材料 Ni表面淀积纳米碳管触媒材料 Ni， 形成纳米碳管的示 意图； 图 5-6是采用电子束蒸发工艺在纳米碳管上淀积 Zr02阻变功能层 的示意图； 图 5-7是平坦化， 并电子束蒸发淀积 Ti、 Pt上电极的示意图。 通过图 5-1至图 5-7， 完成了具有高变比能力的电阻转变存储器的制备。
在上述实施例中， 纳米碳管被嵌入于阻变功能层和下电极界面 （即 紧邻器件下电极） 的位置， 在实际应用中， 纳米碳管可被嵌入于该阻变 功能层中的任意位置， 如： 紧邻器件上电极 （即阻变功能层和上电极界 面） 和在阻变功能层中间任意位置。
在具体实现时， 如果需要将纳米碳管可被嵌入于阻变功能层中间的 任意位置， 则其具体步骤如下： 在基底材料上制备下电极； 在下电极表 面生长隔离介质层； 刻蚀该隔离介质层， 形成通孔结构， 该刻蚀止于下 电极表面； 在形成的通孔结构中淀积阻变功能层材料， 淀积的阻变功能 层材料不能完全填满该通孔结构， 该阻变功能层材料在通孔结构中的高 度决定纳米碳管在阻变功能层中的位置； 然后在阻变功能层材料上淀积 纳米碳管生长所需的触媒材料； 在该触媒材料上生长纳米碳管触媒材料 形成纳米碳管； 再在纳米碳管上淀积阻变功能层材料， 直至完全填充该 通孔结构； 对淀积的阻变功能层薄膜进行平坦化； 以及在平坦化后的阻 变功能层薄膜上淀积上电极。 其中， 所述触媒材料为 Ni、 Fe或 Co， 所 述在该触媒材料上生长纳米碳管触媒材料形成纳米碳管采用 CVD法或 者化学旋涂法。
在具体实现时， 如果需要将纳米碳管可被嵌入于紧邻器件上电极的 任意位置， 则其具体步骤如下： 在基底材料上制备下电极； 在下电极表 面生长隔离介质层； 刻蚀该隔离介质层， 形成通孔结构， 该刻蚀止于下 电极表面； 在形成的通孔结构中淀积阻变功能层材料， 直至完全填充该 通孔结构； 对该通孔结构中的阻变功能层材料进行刻蚀， 其刻蚀深度满 足在剩余的阻变功能层材料上生长纳米碳管的要求； 然后在剩余的阻变 功能层材料上淀积纳米碳管生长所需的触媒材料； 在该触媒材料上生长 纳米碳管触媒材料形成纳米碳管； 再在纳米碳管上淀积上电极。 其中， 所述触媒材料为 Ni、 Fe或 Co, 所述在该触媒材料上生长纳米碳管触媒 材料形成纳米碳管采用 CVD法或者化学旋涂法。
在本发明的实施例中， 所述非易失性存储器件具有很好的进一步变 比能力， 同时通过控制阻变功能层中纳米碳管的长度及位置可以有效调 节器件的操作电压和阻值状态。 本发明提供的非易失性存储器件， 其制 备工艺简单、制造成本低、与传统的硅平面 CMOS工艺的兼容性非常好， 便于工业应用和推广。
以上所述的具体实施例， 对本发明的目的、 技术方案和有益效果进 行了进一步详细说明， 所应理解的是， 以上所述仅为本发明的具体实施 例而已， 并不用于限制本发明， 凡在本发明的精神和原则之内， 所做的 任何修改、 等同替换、 改进等， 均应包含在本发明的保护范围之内。

Claims

权利要求书
1、 一种电阻转变存储器， 其特征在于， 该电阻转变存储器自下而 上依次包括下电极、 阻变功能层和上电极， 其中该阻变功能层中嵌入有 纳米碳管， 在外加偏置条件下， 通过该纳米碳管的局部电场增强效应， 促进和控制该阻变功能层中导电细丝的生长， 提高器件性能和稳定性。
2、 根据权利要求 1 所述的电阻转变存储器， 其特征在于， 所述阻 变功能层是由一种阻变材料构成的单层阻变层， 或者是由多种阻变材料 依次堆垛而构成的复合阻变层。
3、 根据权利要求 2 所述的电阻转变存储器， 其特征在于， 所述阻 变材料为复杂氧化物、 钙钛矿材料或二元过渡金属氧化物。
4、 根据权利要求 3 所述的电阻转变存储器， 其特征在于， 所述复 杂氧化物为
Figure imgf000012_0001
5、 根据权利要求 3 所述的电阻转变存储器， 其特征在于， 所述钙 钛矿材料为 SrTi03或 SrZr03。
6、 根据权利要求 3 所述的电阻转变存储器， 其特征在于， 所述二 元过渡金属氧化物为 Hf02、 Cu02、 Ti02或 Zr02。
7、 根据权利要求 1 所述的电阻转变存储器， 其特征在于， 所述纳 米碳管嵌入于该阻变功能层中的任意位置， 包括： 阻变功能层与上电极 界面处紧邻器件上电极的位置、 阻变功能层与下电极界面处紧邻器件下 电极的位置、 以及在阻变功能层中间任意位置。
8、 根据权利要求 1 所述的电阻转变存储器， 其特征在于， 所述下 电极或上电极采用的材料均为掺杂硅薄膜材料， 或者金属电极材料， 或 者金属氮化物材料， 或者金属硅化物材料。
9、 根据权利要求 8 所述的电阻转变存储器， 其特征在于， 所述下 电极采用的金属电极材料为 Ag、 Au、 Cu、 W、 Ti、 Pt、 TiN、 WN或 TaN。
10、 根据权利要求 8所述的电阻转变存储器， 其特征在于， 所述上 电极采用的金属电极材料为 Ag、 Au、 Cu、 W、 Ti或 Pt。
11、 一种制备电阻转变存储器的方法， 其特征在于， 包括： 在基底材料上制备下电极；
在下电极表面淀积纳米碳管生长所需的触媒材料；
在触媒材料表面生长隔离介质层；
刻蚀该隔离介质层， 形成通孔结构；
在刻蚀后的隔离介质层上生长纳米碳管；
在纳米碳管上淀积阻变功能层薄膜；
对淀积的阻变功能层薄膜进行平坦化； 以及
在平坦化后的阻变功能层薄膜上淀积上电极。
12、 根据权利要求 11 所述的制备电阻转变存储器的方法， 其特征 在于， 所述在基底材料上制备下电极采用电子束蒸发的方法。
13、 根据权利要求 11 所述的制备电阻转变存储器的方法， 其特征 在于， 所述触媒材料为 Ni、 Fe或 Co。
14、 根据权利要求 11 所述的制备电阻转变存储器的方法， 其特征 在于， 所述在触媒材料表面生长隔离介质层采用 CVD、蒸发或溅射， 所 述隔离介质为 Si02、 Si3N4或 BPSG。
15、 根据权利要求 11 所述的制备电阻转变存储器的方法， 其特征 在于， 所述在刻蚀后的隔离介质层上生长纳米碳管采用 CVD法或者化 学旋涂法。
16、 根据权利要求 11 所述的制备电阻转变存储器的方法， 其特征 在于， 所述在纳米碳管上淀积阻变功能层薄膜采用电子束蒸发方法。
17、 根据权利要求 11 所述的制备电阻转变存储器的方法， 其特征 在于， 所述对淀积的阻变功能层薄膜进行平坦化采用化学机械抛光。
18、 根据权利要求 11 所述的制备电阻转变存储器的方法， 其特征 在于， 所述在平坦化后的阻变功能层薄膜上淀积上电极采用电子束蒸发 的方法。
19、 一种制备电阻转变存储器的方法， 其特征在于， 包括： 在基底材料上制备下电极；
在下电极表面生长隔离介质层；
刻蚀该隔离介质层， 形成通孔结构， 该刻蚀止于下电极表面； 在形成的通孔结构中淀积阻变功能层材料；
在阻变功能层材料上淀积纳米碳管生长所需的触媒材料； 在该触媒材料上生长纳米碳管触媒材料形成纳米碳管；
再在纳米碳管上淀积阻变功能层材料， 直至完全填充该通孔结构； 对淀积的阻变功能层薄膜进行平坦化； 以及
在平坦化后的阻变功能层薄膜上淀积上电极。
20、 根据权利要求 19所述的制备电阻转变存储器的方法， 其特征 在于， 所述在形成的通孔结构中淀积阻变功能层材料的步骤中， 淀积的 阻变功能层材料不能完全填满该通孔结构， 该阻变功能层材料在通孔结 构中的高度决定纳米碳管在阻变功能层中的位置。
21、 根据权利要求 19所述的制备电阻转变存储器的方法， 其特征 在于， 所述触媒材料为 Ni、 Fe或 Co， 所述在该触媒材料上生长纳米碳 管触媒材料形成纳米碳管采用 CVD法或者化学旋涂法。
22、 一种制备电阻转变存储器的方法， 其特征在于， 包括： 在基底材料上制备下电极；
在下电极表面生长隔离介质层；
刻蚀该隔离介质层， 形成通孔结构， 该刻蚀止于下电极表面； 在形成的通孔结构中淀积阻变功能层材料， 直至完全填充该通孔结 构；
对该通孔结构中的阻变功能层材料进行刻蚀；
在剩余的阻变功能层材料上淀积纳米碳管生长所需的触媒材料； 在该触媒材料上生长纳米碳管触媒材料形成纳米碳管； 以及 在纳米碳管上淀积上电极。
23、 根据权利要求 22所述的制备电阻转变存储器的方法， 其特征 在于， 所述触媒材料为 Ni、 Fe或 Co, 所述在该触媒材料上生长纳米碳 管触媒材料形成纳米碳管采用 CVD法或者化学旋涂法。
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