WO2012035702A1 - Dispositif d'imagerie à semi-conducteurs et son procédé de fabrication - Google Patents

Dispositif d'imagerie à semi-conducteurs et son procédé de fabrication Download PDF

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Publication number
WO2012035702A1
WO2012035702A1 PCT/JP2011/004614 JP2011004614W WO2012035702A1 WO 2012035702 A1 WO2012035702 A1 WO 2012035702A1 JP 2011004614 W JP2011004614 W JP 2011004614W WO 2012035702 A1 WO2012035702 A1 WO 2012035702A1
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Prior art keywords
insulating film
photoelectric conversion
pixel
imaging device
solid
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PCT/JP2011/004614
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English (en)
Japanese (ja)
Inventor
光雄 安平
晴久 横山
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パナソニック株式会社
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Publication of WO2012035702A1 publication Critical patent/WO2012035702A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14632—Wafer-level processed structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H01L27/14623—Optical shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1463—Pixel isolation structures

Definitions

  • the present invention relates to a stacked solid-state imaging device in which a photoelectric conversion film is stacked on a semiconductor substrate, and more particularly to a technique for improving the element structure in order to equalize a bias voltage applied to the photoelectric conversion film.
  • This solid-state imaging device has a pixel region in which pixel units 400 are two-dimensionally arranged.
  • Signal charges generated by photoelectric conversion in the photoconductive film 404 are accumulated in the N + type source region 409 via the pixel electrode 405 and the extraction electrode 406.
  • a bias voltage is applied to the transparent electrode 402.
  • a read voltage is applied to the gate electrode 408, whereby signal charges are transferred from the N + -type source region 409 to the N ⁇ -type BCCD channel 410.
  • a transfer pulse is applied to the gate electrode 408, the signal charge is transferred through the N ⁇ -type BCCD channel 410 and taken out as a video signal.
  • a signal output path via a MOS transistor may be used instead of the N ⁇ -type BCCD channel 410.
  • the conventional stacked solid-state imaging device has a problem that the voltage drop is larger in the central area of the pixel area where the distance from the peripheral area of the pixel area is larger than in the peripheral area of the pixel area.
  • a transparent electrode 402 made of a material having a relatively high electrical resistivity, for example, ITO (Indium Tin Oxide) or ZnO, is provided on the photoconductive film 404 in a form extending over the entire pixel region, and is transparent.
  • a voltage is applied when a voltage is applied to the photoconductive film 404 via the electrode 402 from the outermost periphery of the pixel region.
  • the resistance is a value obtained by multiplying the electrical resistivity by the length of the resistance and dividing by the cross-sectional area of the resistance, so that the applied voltage is the distance of the current path from the periphery of the pixel area toward the center of the pixel area. As it increases, it descends gradually. For this reason, the voltage drop is larger in the central area of the pixel area than in the peripheral area of the pixel area.
  • the amount of charge generated in the photoconductive film 404 collects on the pixel electrode 405, and the image quality deteriorates.
  • the difference in voltage drop for each pixel region is large, unevenness in the amount of charge collected on the pixel electrode 405 increases, and the deterioration of image quality becomes remarkable.
  • the present invention has been made to solve the above problem, and an object thereof is to provide a solid-state imaging device capable of suppressing a voltage drop at the center of a pixel region and a method for manufacturing the same.
  • a solid-state imaging device is a solid-state imaging device having a pixel region in which a plurality of pixels are two-dimensionally arranged, and is formed on a semiconductor substrate and the semiconductor substrate.
  • the wiring is laminated.
  • a metal wiring made of a material having a lower electrical resistivity than the material constituting the upper electrode is laminated on at least a part of the upper electrode in the pixel region.
  • the resistance of the portion where the metal wiring is laminated becomes a combined resistance in a state where the upper electrode and the metal wiring are connected in parallel, and this combined resistance is smaller than the resistance of only the upper electrode. For this reason, the voltage drop is reduced at the locations where the metal wirings are laminated, and the potentials are substantially the same.
  • the difference in voltage drop between the peripheral portion of the pixel region and the central portion of the pixel region is smaller than that in the conventional example, that is, the central portion of the pixel region.
  • the voltage drop at can be suppressed.
  • the metal wiring is stacked on the pixel boundary between adjacent pixels, the incident light to the photoelectric conversion film is not blocked.
  • the manufacturing method of the present invention it is possible to manufacture a solid-state imaging device that can suppress a voltage drop at the center of the pixel region.
  • FIG. 1 is a block diagram schematically showing an overall configuration of a solid-state imaging device according to Embodiment 1 of the present invention. It is a top view for 4 pixels in the solid-state imaging device shown in FIG. It is sectional drawing of the pixel part of the solid-state imaging device shown in FIG. It is process sectional drawing which shows typically a part of manufacturing process of the pixel part of the solid-state imaging device shown in FIG. It is process sectional drawing which shows typically a part of manufacturing process of the pixel part of the solid-state imaging device shown in FIG. It is process sectional drawing which shows typically a part of manufacturing process of the pixel part of the solid-state imaging device shown in FIG. It is process sectional drawing which shows typically a part of manufacturing process of the pixel part of the solid-state imaging device shown in FIG.
  • FIG. 9 is a process cross-sectional view schematically showing a part of the manufacturing process of the pixel portion of the solid-state imaging device shown in FIG. 8. It is sectional drawing of the pixel part of the solid-state imaging device which concerns on Embodiment 3 of this invention.
  • FIG. 11 is a process cross-sectional view schematically illustrating a part of the manufacturing process of the pixel portion of the solid-state imaging device illustrated in FIG. 10.
  • FIG. 11 is a process cross-sectional view schematically illustrating a part of the manufacturing process of the pixel portion of the solid-state imaging device illustrated in FIG. 10. It is a top view which shows typically the metal wiring of the solid-state imaging device shown in FIG. It is sectional drawing of the conventional solid-state imaging device.
  • a plurality of pixel units 100 are arranged in a two-dimensional arrangement, for example, a matrix (matrix), thereby forming a pixel region 61.
  • the pixel region 61 includes a pixel region central portion 65 and a pixel region peripheral portion 66.
  • a pulse generation circuit 62, a vertical shift register 63, and a horizontal shift register 64 are formed so as to surround the pixel region 61.
  • the vertical shift register 63 and the horizontal shift register 64 sequentially output drive pulses to each pixel unit 100 in response to the application of the timing pulse from the pulse generation circuit 62.
  • the pixel unit 100 is partitioned by a pixel boundary 43.
  • the pixel unit 100 includes a reset gate 10, an amplification transistor 11, a charge storage region 15 of an N-type impurity diffusion layer, a floating diffusion 16 of an N-type impurity diffusion layer, and a reset transistor drain 17 of an N-type impurity diffusion layer.
  • a transfer gate 18 and contacts 31 to 34 are provided.
  • FIG. 3 is a cross-sectional view of the pixel portion 100 of the solid-state imaging device 1 shown in FIG.
  • an STI Shallow Trench Isolation
  • the pixel unit 100 includes a channel stopper 13, a charge storage region 15, a floating diffusion 16, and a reset transistor drain 17.
  • a gate oxide film 14 and an interlayer insulating film 20 are sequentially stacked.
  • a reset gate 10 and an amplification transistor gate 19 are sequentially stacked.
  • a transfer gate 18 and an amplification transistor gate 19 are sequentially stacked.
  • a connection electrode 23 is formed within the interlayer insulating film 20, a reset gate 10, a transfer gate 18, an amplification transistor gate 19, A connection electrode 23 is formed.
  • Interlayer insulating films 21 and 22 are sequentially laminated on the interlayer insulating film 20.
  • wirings 24 and 25 for example, formed of Al or Cu
  • connection electrodes 26 is formed.
  • the interlayer insulating films 20 to 22 are formed of an oxide film using, for example, a CVD (Chemical Vapor Deposition) method.
  • the pixel electrode 40 is formed on the interlayer insulating film 22 so as to be partitioned for each pixel.
  • a photoelectric conversion film 41 is formed on the pixel electrode 40 by, for example, an ⁇ -Si film, an inorganic photoconductive film, or the like.
  • the photoelectric conversion film 41 is separated at the pixel boundary 43, and the pixel boundary 43 is formed such that an insulating film 44 is interposed between the separated photoelectric conversion films 41.
  • the photoelectric conversion film 41 extends over the entire pixel region 61, and a transparent electrode 42 (for example, formed of ITO or ZnO) is formed on the photoelectric conversion film 41 and the insulating film 44.
  • a metal wiring 45 is formed on the transparent electrode 42 in the pixel boundary portion 43.
  • the metal wiring 45 is made of a material having a lower electrical resistivity than the material constituting the transparent electrode 42. Since the insulating film 44 is provided at the pixel boundary portion 43 and the upper surface of the insulating film 44 is not a light receiving portion, the metal wiring 45 disposed on the insulating film 44 does not reduce the aperture ratio. . Therefore, the maximum width of the metal wiring 45 is the same as that of the insulating film 44. Further, the width of the metal wiring 45 may be reduced as long as the reduction degree of the voltage drop at the pixel region central portion 65 in FIG.
  • the metal wiring 45 has a mesh shape that passes between all adjacent pixels in the pixel region 61. Furthermore, the metal wiring 45 is formed so as to surround the pixel region 61. The metal wiring 45 extends from the pixel region central portion 65 toward the pixel region peripheral portion 66, and the metal wiring 45 is connected to the pixel region. The central portion 65 and the pixel region peripheral portion 66 are connected.
  • the potential of the floating diffusion 16 fluctuates according to the signal charge amount, and this fluctuation amount is transmitted to the amplifying transistor 11 via the amplifying transistor gate 19 and further amplified by the amplifying transistor 11 and taken out as a signal to the outside. .
  • the reset transistor drain 17 is electrically connected to the power supply voltage terminal Vdd. Therefore, the potential of the reset transistor drain 17 is always Vdd. By turning on the reset gate 10, the potential of the floating diffusion 16 is reset to the potential Vdd of the reset transistor drain 17. 4). Effect Since the metal wiring 45 made of a material having a lower electrical resistivity than the material constituting the transparent electrode 42 is laminated on the transparent electrode 42 in the pixel region 61, the transparent electrode 42 and the metal wiring 45 are combined. The resistance becomes smaller than the resistance of only the transparent electrode 42. Therefore, in the conventional configuration, the voltage drop at the pixel region central portion 65 that has become large due to the resistance of the transparent electrode 42 is reduced, and the voltage drop at the pixel region central portion 65 can be suppressed.
  • the metal wiring 45 is laminated from the pixel region central portion 65 to the pixel region peripheral portion 66, shading can be reduced. Further, since the metal wiring 45 is disposed between adjacent pixels, that is, on the pixel boundary portion 43, the aperture ratio does not decrease.
  • the photoelectric conversion film 41 is electrically separated for each pixel by the insulating film 44. Therefore, even if the film thickness of the photoelectric conversion film 41 is reduced, good characteristics can be obtained with the spectral sensitivity, the afterimage, and the inter-pixel leakage, which are the original characteristics of the photoelectric conversion film 41. If the photoelectric conversion film 41 is not separated for each pixel, the CR time constant between the pixels is required to be sufficiently larger than the accumulation time ⁇ , and the dark conductivity of the photoelectric conversion film 41 needs to be increased. In order to obtain a large dark conductivity without impairing the photoconductivity, it is necessary to select a material having a large band gap as a material of the photoelectric conversion film 41 and reduce carriers in the dark.
  • the photoelectric conversion film 41 needs to be electrically separated for each pixel by the insulating film 44.
  • an STI 12 for separating transistors and diffusion layer elements is formed on a semiconductor substrate 5.
  • the semiconductor substrate 5 is dry-etched to form, for example, a trench having a depth of 200 nm to 400 nm serving as an isolation region.
  • sacrificial oxidation with an oxide film thickness of 10 nm to 20 nm is performed by thermal oxidation or the like, and further, for example, 10 keV to 20 keV, 1 ⁇ 10 13.
  • B ions are implanted at cm ⁇ 2 to 3 ⁇ 10 13 cm ⁇ 2 to form a channel stopper 13 for the P + layer.
  • the gate oxide film 14 which becomes the gate oxide film of the transistors constituting the transfer gate 18 and the reset gate 10 is formed, for example, by 5 to 10 nm by thermal oxidation or plasma oxidation.
  • a Poly-Si film is deposited by, for example, 100 nm to 200 nm by thermal CVD or plasma oxidation, and then a predetermined resist pattern is formed by a general photolithography technique. Form. Then, by selectively etching the Poly-Si film, the transfer gate 18, the amplification transistor gate 19, and the reset gate 10 made of the Poly-Si film are formed.
  • P or As is ion-implanted into the P-type semiconductor substrate 5 at, for example, 50 keV to 80 keV, 1 ⁇ 10 14 cm ⁇ 2 to 2 ⁇ 10 15 cm ⁇ 2 , so that the charge accumulation region 15 or the floating region is floated.
  • the N-type impurity layers of the diffusion 16 and the reset transistor drain 17 are simultaneously formed.
  • a part of the floating diffusion 16 is opened to form an amplification transistor gate 19 composed of a Poly-Si film, and the electrical connection between the floating diffusion 16 and the amplification transistor gate 19 is established. Connected.
  • An interlayer insulating film 20 made of a CVD oxide film is formed, for example, to 500 nm to 1000 nm. Then, the contact 31, the contact 32, and the contact 33 are formed at predetermined positions by a general photolithography technique and an etching technique. A W (tungsten) plug is embedded in the contact opening, a W plug connection electrode 23 is formed, and electrical connection to the charge storage region 15 and the reset transistor drain 17 is formed. For example, a wiring 24 made of Al, Cu or the like having a thickness of 200 nm to 300 nm and an interlayer insulating film 21 made of a CVD oxide film are formed. By repeating the same, the wiring 25 and the interlayer insulating film 22 are formed, and the formation of the multilayer wiring is completed. Here, a contact is opened on the connection electrode 23 and a W plug is embedded to form the connection electrode 26.
  • a pixel electrode 40 having a thickness of 100 nm to 300 nm made of aluminum (Al), tungsten (W), molybdenum (Mo) or the like partitioned for each pixel is formed.
  • Al aluminum
  • W tungsten
  • Mo molybdenum
  • an ⁇ -Si film, an inorganic photoconductive film, or the like having a spectral sensitivity characteristic corresponding to the imaging purpose is deposited on the pixel electrode 40 by plasma CVD, sputtering, and a coating apparatus, and photoelectric conversion is performed.
  • a film 41 is formed.
  • the photoelectric conversion film 41 at the pixel boundary 43 is etched by a general photolithography technique and etching technique to form a groove 48 of the photoelectric conversion film.
  • the groove 48 of the photoelectric conversion film corresponding to the pixel boundary 43 is embedded with an insulating film 44 formed of a CVD oxide film. Further, on the photoelectric conversion film 41 and the insulating film 44, a transparent electrode 42 made of ITO or ZnO and having a film thickness of, for example, several tens nm to several hundreds nm is formed by sputtering or CVD.
  • a metal wiring 45 such as Al, W, or Mo having a thickness of 100 nm to 300 nm is deposited on the pixel portion 100 by sputtering or CVD.
  • the photoelectric conversion film 41 is etched by a general photolithography technique and an etching technique, and a mesh-like metal wiring 45 is formed on the transparent electrode 42 in the pixel boundary portion 43.
  • FIG. 8 is a cross-sectional view of the pixel unit 200 of the solid-state imaging device 1 according to Embodiment 2 of the present invention. Since the configuration other than the following is the same as that of the pixel unit 100, the description thereof is omitted.
  • An insulating film 47 is embedded in the lower part of the groove of the photoelectric conversion film 41.
  • a transparent electrode 42 is formed on the photoelectric conversion film 41 and the insulating film 47.
  • the upper surface of the insulating film 47 is at a position lower than the upper surface of the photoelectric conversion film 41.
  • the transparent electrode 42 is attached to the inner wall of the groove of the photoelectric conversion film 41. In other words, the groove is not completely filled with the transparent electrode 42, and the concave portion surrounded by the surface of the transparent electrode 42 remains in the groove.
  • a metal wiring 145 is embedded in the concave portion of the transparent electrode 42.
  • the portion where the metal wiring 145 is embedded also exists on the transparent electrode 42.
  • the depth of the metal wiring 145 is such that the lowermost surface of the metal wiring 145 is below the upper surface of the photoelectric conversion film 41 and the transparent electrode 42 and the insulating film 47 can be formed below the lowermost surface of the metal wiring 145.
  • the metal wiring 145 is made of a material having a lower electrical resistivity than the material constituting the transparent electrode 42. 2. Effect Since the metal wiring 145 made of a material having a lower electrical resistivity than the material constituting the transparent electrode 42 is laminated on the transparent electrode 42 in the pixel region 61, the pixel region central portion 65 is the same as in the first embodiment. The voltage drop at can be suppressed. Furthermore, since the cross-sectional area of the metal wiring 145 is larger than the cross-sectional area of the metal wiring 45 in the first embodiment, the voltage drop at the pixel region central portion 65 can be further reduced.
  • the metal wiring 145 is embedded in the concave shape portion where the groove of the transparent electrode 42 at the pixel boundary portion 43 is not completely filled. Furthermore, since the lowermost surface of the metal wiring 145 is formed below the upper surface of the photoelectric conversion film 41, the oblique incident light from the adjacent pixel can be shielded, and crosstalk due to the oblique incident light from the adjacent pixel is also caused. Can be suppressed. Further, since the metal wiring 145 is formed so that the transparent electrode 42 and the insulating film 47 exist below the lowermost surface thereof, the transparent electrode 42 can be configured to spread over the entire pixel region 61, and the electrode There is no short circuit. 3. Manufacturing Method A manufacturing method of the pixel unit 200 according to the second embodiment of the present invention will be described with reference to FIG. 9, focusing on differences from the first embodiment of the present invention.
  • an insulating film 47 made of a CVD oxide film is formed in the groove of the photoelectric conversion film 41 separated at the pixel boundary 43.
  • the insulating film 47 is formed thicker than the pixel electrode 40 (for example, 100 nm to 300 nm).
  • a transparent electrode 42 made of ITO or ZnO by sputtering or CVD is formed on the photoelectric conversion film 41 and along the side wall of the photoelectric conversion film 41 in the groove on the insulating film 47 at the pixel boundary 43 by, for example, several tens of nm. It is formed with a film thickness of ⁇ 100 nm.
  • FIG. 9B a metal such as Al, W, or Mo is deposited on the transparent electrode 42 with a film thickness of, for example, 100 nm to 300 nm based on sputtering or CVD.
  • a metal is etched by a general photolithography technique and an etching technique, a metal film is formed in the groove, and a mesh-like metal wiring 145 is formed on the transparent electrode 42 at the pixel boundary 43.
  • FIG. 10 is a cross-sectional view of the pixel unit 300 of the solid-state imaging device 1 according to Embodiment 3 of the present invention.
  • the photoelectric conversion film 41 is partitioned for each pixel by a pixel boundary 43.
  • An insulating film 28 is formed on the pixel boundary portion 43.
  • a sidewall pixel electrode 39 made of the same material as the pixel electrode 40 is formed on the sidewall of the insulating film 28, leaving the upper portion of the insulating film 28.
  • the side wall pixel electrode 39 made of the same material as the pixel electrode 40 has a light shielding capability and can shield oblique incident light from the adjacent pixel, so that crosstalk due to the oblique incident light from the adjacent pixel can be suppressed.
  • an insulating film 28 made of an oxide film is deposited, for example, by 100 nm to 1 ⁇ m based on the CVD method, and the pixel boundary is formed by a general photolithography technique and an etching technique.
  • An insulating film 28 having a predetermined shape having a separation width equivalent to that of the portion 43 is formed.
  • a metal wiring made of Al, W, Mo, or the like is provided on the side wall of the insulating film 28 at the pixel boundary 43 and at a place excluding the pixel boundary 43.
  • a metal wiring made of Al, W, Mo, or the like is provided on the side wall of the insulating film 28 at the pixel boundary 43 and at a place excluding the pixel boundary 43.
  • 100 nm to 300 nm is deposited, and pixel electrodes 40 and sidewall pixel electrodes 39 having a predetermined shape are formed by a general photolithography technique and etching technique.
  • the area of the pixel electrode 40 is determined by the width of the insulating film 28 at the pixel boundary 43. If the separation width between pixels is 10% to 20% of the pixel size, the aperture ratio is estimated to be 64% to 81%.
  • the pixel electrode 40 and the sidewall pixel electrode 39 have spectral sensitivity characteristics corresponding to the imaging purpose by plasma CVD, sputtering, and coating apparatus.
  • An ⁇ -Si film, an inorganic photoelectric conversion film, and an organic photoelectric conversion film are deposited to a thickness of, for example, 100 nm to 1 ⁇ m to form the photoelectric conversion film 41.
  • a transparent electrode 42 made of ITO or ZnO is deposited on the photoelectric conversion film 41 and the insulating film 28 at the pixel boundary 43 by sputtering or CVD, for example, several tens nm to several hundreds nm. Form. Further, a metal wiring 45 is formed on the transparent electrode 42 and above the insulating film 28. [Other matters] 1. Shape of Metal Wiring In the embodiment according to the present invention, the shape of the metal wiring 45 is a mesh shape shown in FIG. 13A in which it passes between all adjacent pixel portions 100. In this case, since the cross-sectional area of the metal wiring 45 increases, the voltage drop at the pixel region central portion 65 is effectively suppressed.
  • metal wiring is formed in a stripe shape.
  • the plurality of pixel portions 100 are formed so as to be surrounded by the metal wiring 45.
  • the mesh-like metal wiring 45 is formed only around the pixel portion 100 in the pixel region central portion 65, and at least a part of the other metal wiring 45 is transferred to the pixel region peripheral portion 66. It is formed in a shape that connects. *
  • the metal wiring 45 may have a shape passing between some adjacent pixels, or only in at least a part of the pixel region 61. Even if the metal wiring 45 is formed, the same effect as in FIG. 2.
  • the configuration of the solid-state imaging device according to the present invention is not limited to the configuration of the solid-state imaging device 1 according to the above embodiment, and various modifications and applications can be made within the scope of the effects of the present invention. Is possible. In addition, the processes used in the above steps can be replaced with other equivalent processes without departing from the technical idea. Moreover, it is also possible to change a process order and to change a material kind.
  • a configuration in which the pixels are arranged by being rotated by 45 ° can be employed.
  • an array such as a primary color Bayer array or a complementary color checkered array can be selected.
  • the material of the metal wiring 45 can be selected from W, Mo, Ti and the like in addition to copper, aluminum and the like.
  • the present invention can be used for a digital camera or the like, and is useful for realizing a solid-state imaging device in which deterioration of image quality is suppressed.
  • Solid-state imaging device 5
  • Semiconductor substrate 15
  • Charge storage area 16
  • Pixel electrode 41
  • Photoelectric conversion film 42
  • Transparent electrode 43
  • Insulating film 45
  • Metal wiring 100 Pixel part 200 Pixel part 300 Pixel part 400 Pixel part

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Light Receiving Elements (AREA)

Abstract

L'invention concerne un dispositif d'imagerie à semi-conducteurs qui comporte une région de pixels comprenant une pluralité de pixels dans une configuration bidimensionnelle. Dans ledit dispositif d'imagerie à semi-conducteurs, un substrat semi-conducteur et un film d'isolation intercalaire sont successivement déposés en couches, et un film de conversion photoélectrique intercalé entre une électrode inférieure et une électrode supérieure transmettant la lumière est formé au-dessus du film d'isolation intercalaire. L'électrode supérieure recouvre la totalité du film de conversion photoélectrique, et un câblage métallique est laminé sur au moins une partie de l'électrode supérieure de manière à passer entre pixels adjacents. Ledit câblage métallique comprend un matériau dont la résistivité électrique est inférieure à celle de l'électrode supérieure.
PCT/JP2011/004614 2010-09-17 2011-08-18 Dispositif d'imagerie à semi-conducteurs et son procédé de fabrication WO2012035702A1 (fr)

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JP2010-208743 2010-09-17
JP2010208743A JP2012064822A (ja) 2010-09-17 2010-09-17 固体撮像装置及びその製造方法

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US20220262834A1 (en) * 2020-03-13 2022-08-18 Boe Technology Group Co., Ltd. Light detection substrate, manufacturing method thereof and light detection apparatus
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WO2014002390A1 (fr) * 2012-06-28 2014-01-03 パナソニック株式会社 Appareil de capture d'image à semi-conducteurs et son procédé de fabrication
JP5806176B2 (ja) * 2012-07-09 2015-11-10 富士フイルム株式会社 固体撮像素子および固体撮像素子の製造方法
JP2015012059A (ja) 2013-06-27 2015-01-19 ソニー株式会社 固体撮像素子及びその製造方法、並びに撮像装置
US20150091115A1 (en) * 2013-10-02 2015-04-02 Visera Technologies Company Limited Imaging devices with partitions in photoelectric conversion layer
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WO2015125443A1 (fr) * 2014-02-19 2015-08-27 パナソニックＩｐマネジメント株式会社 Dispositif photorécepteur et son procédé de fabrication
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