WO2011150879A3 - 半导体器件封装方法及其结构 - Google Patents

半导体器件封装方法及其结构 Download PDF

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Publication number
WO2011150879A3
WO2011150879A3 PCT/CN2011/076087 CN2011076087W WO2011150879A3 WO 2011150879 A3 WO2011150879 A3 WO 2011150879A3 CN 2011076087 W CN2011076087 W CN 2011076087W WO 2011150879 A3 WO2011150879 A3 WO 2011150879A3
Authority
WO
WIPO (PCT)
Prior art keywords
encapsulating
plastic part
substrate
plastic
processed
Prior art date
Application number
PCT/CN2011/076087
Other languages
English (en)
French (fr)
Other versions
WO2011150879A2 (zh
Inventor
杨雄
Original Assignee
华为终端有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为终端有限公司 filed Critical 华为终端有限公司
Priority to PCT/CN2011/076087 priority Critical patent/WO2011150879A2/zh
Priority to EP11789258.8A priority patent/EP2565913B1/en
Priority to CN2011800007541A priority patent/CN102203927B/zh
Publication of WO2011150879A2 publication Critical patent/WO2011150879A2/zh
Publication of WO2011150879A3 publication Critical patent/WO2011150879A3/zh
Priority to US13/710,764 priority patent/US9082777B2/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/165—Containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/23—Sheet including cover or casing
    • Y10T428/239—Complete cover or casing

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

一种半导体器件封装方法包括以下步骤：（a）对塑件进行第一面表面贴装技术加工和/或裸硅片打线；（b）将处理后的塑件进行第一面塑封；（c）对塑件进行第二面表面贴装技术加工和/或裸硅片打线；（d）将处理后的塑件进行第二面塑封。该封装结构包括载板。载板上下表面固定有器件，上下表面的器件均塑封在封胶中。该方法减小了载板翘曲。该结构具有防尘、防水、内部结构保密性好的特点。
PCT/CN2011/076087 2011-06-22 2011-06-22 半导体器件封装方法及其结构 WO2011150879A2 (zh)

Priority Applications (4)

Application Number Priority Date Filing Date Title
PCT/CN2011/076087 WO2011150879A2 (zh) 2011-06-22 2011-06-22 半导体器件封装方法及其结构
EP11789258.8A EP2565913B1 (en) 2011-06-22 2011-06-22 Method for encapsulating of a semiconductor
CN2011800007541A CN102203927B (zh) 2011-06-22 2011-06-22 一种器件塑封的方法及其封装结构
US13/710,764 US9082777B2 (en) 2011-06-22 2012-12-11 Method for encapsulating semiconductor and structure thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2011/076087 WO2011150879A2 (zh) 2011-06-22 2011-06-22 半导体器件封装方法及其结构

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US13/710,764 Continuation US9082777B2 (en) 2011-06-22 2012-12-11 Method for encapsulating semiconductor and structure thereof

Publications (2)

Publication Number Publication Date
WO2011150879A2 WO2011150879A2 (zh) 2011-12-08
WO2011150879A3 true WO2011150879A3 (zh) 2012-05-24

Family

ID=44662789

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2011/076087 WO2011150879A2 (zh) 2011-06-22 2011-06-22 半导体器件封装方法及其结构

Country Status (4)

Country Link
US (1) US9082777B2 (zh)
EP (1) EP2565913B1 (zh)
CN (1) CN102203927B (zh)
WO (1) WO2011150879A2 (zh)

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EP2565913B1 (en) 2011-06-22 2019-03-20 Huawei Device Co., Ltd. Method for encapsulating of a semiconductor
JP6098467B2 (ja) * 2013-10-08 2017-03-22 株式会社デンソー 電子装置の製造方法
US9397051B2 (en) 2013-12-03 2016-07-19 Invensas Corporation Warpage reduction in structures with electrical circuitry
CN109564634A (zh) * 2016-07-27 2019-04-02 安全创造有限责任公司 用于交易卡的经包覆模制的电子部件及其制造方法
US11618191B2 (en) 2016-07-27 2023-04-04 Composecure, Llc DI metal transaction devices and processes for the manufacture thereof
US10762412B2 (en) 2018-01-30 2020-09-01 Composecure, Llc DI capacitive embedded metal card
US10977540B2 (en) 2016-07-27 2021-04-13 Composecure, Llc RFID device
WO2019079007A1 (en) 2017-10-18 2019-04-25 Composecure, Llc TRANSACTION CARD OF METAL, CERAMIC OR CERAMIC COATED HAVING WINDOW OR WINDOW PATTERN AND OPTIONAL BACKLIGHT
ES2943857T3 (es) 2017-09-07 2023-06-16 Composecure Llc Tarjeta de transacción con componentes electrónicos integrados y procedimiento de fabricación
US11151437B2 (en) 2017-09-07 2021-10-19 Composecure, Llc Metal, ceramic, or ceramic-coated transaction card with window or window pattern and optional backlighting
CN108987289A (zh) * 2018-06-22 2018-12-11 江苏长电科技股份有限公司 一种双面塑封锡球制程方法
USD948613S1 (en) 2020-04-27 2022-04-12 Composecure, Llc Layer of a transaction card
CN113078070A (zh) * 2021-03-30 2021-07-06 无锡闻泰信息技术有限公司 器件塑封方法

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CN101110406A (zh) * 2006-07-20 2008-01-23 威宇科技测试封装有限公司 一种多芯片封装结构及其封装方法
CN101611483A (zh) * 2007-02-15 2009-12-23 飞科公司 利用真空封装电子元器件的方法和设备

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WO2000059036A1 (en) * 1999-03-26 2000-10-05 Hitachi, Ltd. Semiconductor module and method of mounting
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CN101611483A (zh) * 2007-02-15 2009-12-23 飞科公司 利用真空封装电子元器件的方法和设备

Also Published As

Publication number Publication date
WO2011150879A2 (zh) 2011-12-08
CN102203927B (zh) 2013-04-24
EP2565913A2 (en) 2013-03-06
US9082777B2 (en) 2015-07-14
US20130102113A1 (en) 2013-04-25
CN102203927A (zh) 2011-09-28
EP2565913A4 (en) 2013-07-31
EP2565913B1 (en) 2019-03-20

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