Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
  • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
  • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
  • G01R31/302—Contactless testing
  • G01R31/308—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays

Definitions

• This invention relates to detection of defects within flat panel displays and more specifically to detection of defects within flat panel displays using front side illumination.
• TFT thin film transistor
• an active matrix LCD covers the class of displays utilizing a transistor or diode at every pixel or subpixel, and therefore such glass substrate plates may also be referred to as AMLCD panels.
• Flat panel displays may also be fabricated using Organic LED (OLED) technologies and, though typically fabricated on glass may also be fabricated on plastic substrate plates.
• OLED Organic LED
• TFT pattern deposition is performed in a multitude of stages where in each stage, a particular material (such as a metal, indium tin oxide (ITO), crystalline silicon, amorphous silicon, etc.) is deposited on top of a previous layer (or glass) in conformity with a predetermined pattern.
• a particular material such as a metal, indium tin oxide (ITO), crystalline silicon, amorphous silicon, etc.
• ITO indium tin oxide
• crystalline silicon silicon
• amorphous silicon etc.
• Each stage typically includes a number of steps such as deposition, masking, etching, stripping, etc.
• defects may occur that may affect the electrical and/or optical performance of the final LCD product.
• defects include but are not limited to metal protrusions 110 into ITO 112, ITO protrusions 114 into metal 116, so-called mouse bites 118, open circuits 120, shorts 122 in transistors 124, foreign particles 126, and residue under pixel 128, as shown in Figure 1.
• Amorphous silicon (a-Si) residue under a pixel 128 may result from under-etching or lithography issues.
• Other defects include mask problems, over etching, etc.
• the TFT arrays are inspected using one or multiple automated optical inspection (AOI) system(s) following critical deposition process steps and an electro-optical inspection machine, such as those produced by Photon Dynamics, Inc. of 5970 Optical Court, San Jose, California, 95138, USA (an Orbotech company) and also referred to as array tester or array checker (AC) to test the finished TFT arrays.
• AOI automated optical inspection
• AC array checker
• the a-Si defect is a particularly troublesome defect because it is photosensitive; that is, it acts as an insulator in a dark state but acts as a conductor when exposed to light.
• its sheet resistance Rsi decreases as a function of light intensity.
• Figure 4 illustrates the dependency.
• the sheet resistance dependency on light intensity thus means that with varying exposure to light, the pixel voltage change due to the defect may also vary.
• the defect is not detected before the completion of the final FPD assembly, the end user will easily notice the defect since it is exposed to the display's backlight during normal FPD operation.
• the conventional technology fails to provide a suitable methodology for effective detection of defect-forming a-Si residue on LCD panels during various stages of panel fabrication.
• the inventive methodology is directed to methods and systems that substantially obviate one or more of the above and other problems associated with detecting a defect-forming a-Si residue in LCD panel displays.
• a system for detecting defects in a panel under test incorporates a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test.
• the front side illuminating light beam has the capability to alter electrical properties of the defects to facilitate detection of the defects.
• the system further incorporates a detection subsystem configured to detect the defects based on the altered electrical properties of the defects.
• the front side illuminating light beam used in the system is pulsed and optimized for duration and intensity to maximize the detection of the defects and minimize the detection of false defects. Further, the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects.
• a system for detecting defects in a panel under test incorporates a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test.
• the front side illuminating light beam has the capability to alter electrical properties of the defects to facilitate detection of the defects.
• the system further incorporates a detection subsystem configured to detect the defects based on the altered electrical properties of the defects.
• the aforesaid detection subsystem includes a voltage imaging optical device configured to create an image indicative of a spatial voltage distribution across the panel under test.
• the defects in the panel under test are detected based on the created image.
• the front side illumination subsystem is integrated within an optical path of the voltage imaging optical device. Furthermore, the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects.
• a system for detecting defects in a panel under test incorporates a front side illumination subsystem configured to deliver a front side illuminating light beam onto the panel under test.
• the front side illuminating light beam has the capability to alter electrical properties of the defects to facilitate detection of the defects.
• the system further incorporates a detection subsystem configured to detect the defects based on the altered electrical properties of the defects.
• the aforesaid detection subsystem includes a voltage imaging optical device configured to create an image indicative of a spatial voltage distribution across the panel under test. The defects in the panel under test are detected based on the created image.
• the aforesaid front side illumination subsystem is disposed outside an optical path of the voltage imaging optical device.
• the front side illuminating light beam has a wavelength matching maximum absorption optical properties of the defects.
• Figure 1 shows a variety of non-periodic defects in a top view of a portion of a large flat patterned medium with periodic transistor arrays.
• Figure 2 shows an exemplary cross section of an amorphous silicon residue.
• Figure 3 illustrates an exemplary equivalent circuit diagram for the a-Si residue with respect to the TFT pixel.
• Figure 4 is a sample graph of dependence of the sheet resistance on the incident light wavelength.
• Figure 5 is an exemplary schematic diagram of a dual wavelength illuminator (DWI) in accordance with an embodiment of the inventive concept.
• Figure 6 is an exemplary schematic diagram of the modulator mount illuminator (MMI) in accordance with another embodiment of the inventive concept.
• Figure 7 illustrates an exemplary schematic block diagram of the inventive system for detection of defects within flat panel displays.
• Figure 8 is an exemplary graph representing a typical absorption curve for amorphous silicon.
• Figure 9 is an example of a possible front light and pixel pattern driver timing diagram.
• Figure 10 is another example of a possible front light pattern in which pulse is different for every frame of a given driving pattern.
• Figures 11 A and 11 B are plots of defect detection sensitivity (DDS) and signal-to-noise ratio (SNR) as a function of front light pulse end time for varying pulse start times and pulse intensities.
• DDS defect detection sensitivity
• SNR signal-to-noise ratio
• the various embodiments of the invention as described may be implemented in the form of a specialized hardware, or combination of software and hardware.
• the array tester may identify defects in LC displays through use of a voltage imaging test apparatus and method as described, for example, in U.S. Patents 4,983,911 , 5,097,201 , and 5,124,635, incorporated herein by reference in their entirety.
• the pixels within the LC display are electrically driven using specific patterns, as described, for example, in U.S. Patents 5,235,272 and 5,459,410, incorporated herein by reference in their entirety.
• LC displays are comprised of an array of pixels, when the LC display is driven electrically, some pixels associated with defects may behave electrically differently than the normal pixels, and thus such differences may be detected using a voltage imaging sensor and associated image processing software. Through the use of combinations of different driving patterns, the type and location of many of the defects illustrated in Figure 1 may be deduced.
• FIG. 2 A cross-section of an example of a TFT pixel 200 with a a-Si defect is shown in Figure 2.
• the TFT pixel structure 200 is formed on a glass plate 202.
• the gate insulator 204 is placed on the glass, a data metal line 206 may then be plated, and the pixel feature in the form of a transparent conductive material such as indium tin oxide (ITO) 210 is then deposited.
• a passivation layer such as silicon nitride (SiNx) 208 is deposited.
• Amorphous silicon or data metal residue 212 may remain, and is graphically represented by an extension of the line feature which then falls beneath the ITO layer.
• the area of overlap 214 between the residue 212 and pixel (ITO) 210 forms a capacitor 216 having parasitic capacitance Cp.
• Figure 3 is an equivalent diagram of a-Si residue under a pixel.
• Cp ks ⁇ N* ⁇ o*Area r esidue/dgate SIN Equation 1
• Cst ks ⁇ N* ⁇ o*Wp l ⁇ eiWst/dp assSl N Equation 2
• C p is the parasitic capacitance
• ksi N is the dielectric constant of SiN
• ⁇ 0 is the permittivity constant in air
• W P ⁇ Xe ⁇ is the width of the pixel
• W st is the width of the storage capacitor (with capacitance Cst)
• d paSsS ⁇ N and d ga t e SI N are the thicknesses of the passivation layer and gate-to-SiN layer respectively
• Area reS ⁇ d u e is the area of the residue defect under question.
• a driving voltage is applied to the LC plate and the pixel responses may be observed by a voltage imaging sensor.
• the positive-negative (PN) driving pattern in which the data voltage is dropped to negative before image acquisition, may be used.
• the drop of the data voltage induces a voltage drop on pixel with the ITO- data line overlap. If the data voltage drop is ⁇ V d then pixel voltage drop, ⁇ V P , may be expressed as follows.
• Equations 1 and 3 reveal two key points regarding the a-Si defect.
• the parasitic capacitance is a function of the size of the defect (Area reS ⁇ du e )- Second is the exponential dependency on the sheet resistance Rs,.
• Rs may be very high (on the order of hundreds of giga-ohms per square), and thus by Eq. 3, with no exposure to light, ⁇ V P is approximately equal to ⁇ V d * (C p /C s t) and has maximum value. Because C p ⁇ C s t, the maximum ⁇ V P with no exposure to light may be quite small, and thus the defects may not be easily detectable without availability of light.
• a-Si defects may be found using AOI, and some can be detected using AC with conventional defect detection technologies, a significant percentage of such defects is not identified early on and are only detected after the TFT-LCD cell assembly has been completed, well after the LC plate has been divided into panels and assembled into modules.
• a backlight module provides light source for TFT-LCD panel to display image, while it is driven electrically.
• the photosensitive property of a-Si makes it possible to detect this defect under these conditions.
• detecting the defects at the early stage of the manufacturing process and prior to the cell assembly saves the costs associated with assembly process and with the required color filter glass.
• LCD array inspection equipment in general does not have an external light source, and thus detection of a-Si residue can be difficult.
• the AC47xx product family of array testers manufactured by Photon Dynamics, Inc. (Acquired by Orbotech Ltd.) incorporates a short wavelength backlight that is used in conjunction with a transparent chuck on a split axis-type system, in which the inspection area, and thus the chuck, is limited to a single modulator row.
• the associated backlight would also be required to cover the entire glass size either by moving (for example, a single line) or statically (for example, full coverage), and thus may be less practical nor cost effective.
• ⁇ V P ⁇ V g * Cgd / (Cg d +Cst+Cic). [Equation 4] where C
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A block diagram illustrating an image of the defect.
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A block diagram illustrating an exemplary computing environment in accordance with one embodiment of the present invention.
• FIG. 1 A
• the TFT array cell is exposed to illuminating light pulses, impacting the top side of the TFT panel during the testing performed using the VIOS.
• the front side illumination is traveling along the same path as the illumination used for voltage imaging in the VIOS.
• the VIOS illumination is performed in the red portion of visible wavelength range.
• the exemplary light wavelength is 630nm.
• the front side illumination is comprised of one or two wavelengths and is delivered at the periphery of the voltage image modulator of the VIOS.
• top side or front side illumination into a flat panel array tester is accomplished in concert with the VIOS testing apparatus and its functionality.
• the ability to detect the defect of interest (a-Si) is a function of light intensity
• the front side illumination of the TFT cell must be suitably uniform and repeatable over the detection areas of interest.
• the illumination and optical apparatus for the detection of a-Si must not interfere with the functionality of the VIOS tester in its search for other types of defects that can occur in the TFT cell and some of which have been described hereinabove.
• a system configured to produce a front side illumination of the LCD structures on the panel under test during LCD array testing with the purpose of facilitating the detection of photosensitive manufacturing defects, such as remaining a-Si residue on the structures, such as on the gate structure or attached to the data line, of the LCD pixels.
• the front side of the panel is illuminated with a light having a wavelength different from the wavelength of the light used in the VIOS for voltage imaging. This is done for al least several reasons. Firstly, the light used in the VIOS illumination may have a wavelength that may not allow efficient detection of a-Si residue and/or other photosensitive defects.
• the design of the modulator of the VIOS is such that the light used in the VIOS for voltage imaging is almost completely reflected by the pellicle of the aforesaid modulator and, therefore, never reaches the panel. Accordingly, the light for the front side illumination is chosen such that it activates (changes electrical properties) of the a-Si residue and is transmitted by the pellicle.
• the overall system includes means (low pass filter 510 shown in
• FIG. 5 A diagram illustrating an exemplary embodiment of the inventive dual wavelength optical illumination system 500 is presented in Figure 5.
• This exemplary diagram is provided only for illustrative purposes and should not be considered to be limiting the scope of the invention in any way.
• a dual wavelength illuminator 512 (DWI) is placed in the optical column of the VIOS illuminator.
• V ⁇ OS voltage imaging optical system
• DWI dual wavelength illuminator 512
• the construction of the VIOS illuminator is described, for example in US patent 5,124,635, incorporated herein in its entirety.
• the dual wavelength illuminator 512 couples a blue light 504 (for example, having wavelength 455 nm, to which the a-Si defect is particularly sensitive) generated by the blue light illuminator 502 into the same optical path as the visible light 505 (for example, having wavelength 630 nm), generated by the red light illuminator 501 , which is used for defect imaging.
• Figure 8 shows the typical light absorption curve 801 of a-Si, which indicates that the light having wavelength 455 nm (802) has the highest absorption coefficient for a-Si.
• the aforesaid coupling of the two light beams of different wavelength is accomplished within the dual wavelength illuminator 512 through the use of a dichroic mirror (beam splitter) 503, which substantially transmits the blue light beam 504 and substantially reflects the red light beam 505 to produce the combined light beam having both wavelengths.
• a dichroic mirror (beam splitter) 503 which substantially transmits the blue light beam 504 and substantially reflects the red light beam 505 to produce the combined light beam having both wavelengths.
• the coupling of the light beams of different wavelengths may be achieved in many other ways, some of which are described below with reference to other embodiments of the invention. Therefore, the particular design of the dual wavelength illuminator 512 shown in Figure 5 should not be considered limiting in any way.
• the dual-wavelength, collinear illumination of the modulator 508 and the panel under test 509 can be achieved in several different ways.
• multi-wavelength light emitting diodes for which wavelength selection may be limited, may be employed.
• only one illuminator employing the aforesaid multi-wavelength light emitting diodes needs to be employed in place of, for example, the light source 502, while the second light source 501 and the dichroic mirror 503 can be excluded from the illumination system.
• single wavelength red LEDs may be spatially interspersed with single wavelength blue LEDs in a single light source, which may be used, again in place of the light source 502. Again, in this configuration, the second light source 501 and the dichroic mirror 503 need to be excluded from the illumination system. It should be noted, however, that in such configuration using interspersed LEDs of two different wavelengths, the uniformity of the illumination may be compromised.
• the VIOS modulator 508 is provided with a pellicle
• the pellicle 515 which is positioned on the surface of the modulator 508 in the close spatial proximity of the tested LCD structures of the panel under test.
• the pellicle 515 possesses optical properties specially selected such that the red light generated by the illuminator 501 is being reflected by it, but the blue light generated by the illuminator 502 is being transmitted by the pellicle 515.
• the modulator 508 modulates the intensity of the red light reflected by the pellicle 515 based on the distribution of electric potential across the top (in the Figure 5) surface of the panel under test 509, which is placed in the close spatial proximity to the pellicle of the modulator 508.
• the modulated red light After reflection by the pellicle, the modulated red light passes through the lens assembly 507, beam splitter 506 and the low pass filter 510. After passing the filter 510, the reflected red light impinges on the photo sensitive elements of the CCD device 511 , which is used to create an image of the panel under test. To prevent any blue light, which is used for illuminating the a-Si residue, from interfering with the CCD image sensor 511 of the VIOS, the CCD device 511 is provided with a low pass filter 510. This filter has optical transmission characteristics designed to greatly attenuate the blue light and to allow the red light pass through without attenuation.
• the blue light is only used for modifying the electrical properties of the a-Si residue in order to make it more easily detectable by, for example, the VIOS and not to produce an image of the defect itself.
• the tested LCD structures on the surface of the panel under test 509 are biased using a voltage source 513, while the top (on Figure 5) surface 516 of the modulator 508 is biased using the voltage source 514.
• all the optical components of the system are provided with suitable optical coatings for best light transmission and reflection.
• the uniformity of illumination by the light of both wavelengths will be similar, and, typically, in one embodiment of the invention, no worse than approximately 25%.
• a typical uniformity of illumination ranges between 10% and 15%.
• the present invention is not limited to illumination of the modulator and the panel under test by only red and blue light.
• another wavelength of the illuminating light may be selected to achieve suitable absorption by the a-Si residue, in order to sufficiently change its electrical properties to enable detection, and to reduce the interference of the front side illumination with the operation of the VIOS, which is used to recreate a voltage distribution pattern across the panel under test.
• a ring illuminator 601 is incorporated into the modulator mount 600.
• the ring illuminator 601 is installed above the modulator 508 and the single wavelength (blue or approximately 455 nm wavelength) light sources 603, such as LEDs, are located outside the optical path of the VIOS illuminator to prevent image clipping.
• the pellicle of the modulator 508 (not shown) transmits the blue light and reflects the light of visible wavelength generated by the red illuminator 501 , and which is required for the functionality of the voltage imaging modulator 508.
• the light sources 603 create illumination pattern 604.
• each side of the mounting ring 601 carries 4 LEDs 603.
• the invention is not limited to the shown arrangement of the illuminator ring 601 , the modulator mount 600 and the light sources 603.
• the illuminator ring 601 has a square, rectangular, octagonal, circular, oval or other appropriate shape.
• the light generated by the light sources 603 passes through the modulator 602 and illuminates the front surface of the panel under test in order to affect the electrical properties of the a-Si residue on the panel under test.
• LEDs have Lambertian emission profiles, and thus emit in a very large solid angle, which is detrimental to the desired goal of achieving high degree of illumination uniformity, because more light is disproportionally sent to the center of the modulator.
• special directional LEDs are utilized as light sources 603 and directed to illuminate the innermost portion of the modulator 508.
• collimating lenses are added, or preferably optically coupled, to each general LED to contain the spread of the Lambertian profile.
• Various methods for optical coupling of collimating lenses to LEDs are well known in the art.
• each LED is equipped with its own collimating lens.
• collimating lenses facilitate enhanced uniformity of the front side illumination.
• directional attenuation is applied by adding a neutral density filter on the side of the LED.
• diffusers can be used to (1) smooth out the spatial inhomogeneities of each LED and (2) improve overall illumination uniformity of the combined LED distribution.
• diffusers manufactured and sold by Luminit, of Torrance, California, USA (a Physical Optics Corporation company) can be utilized.
• beam shaping diffusers that produce elliptical radiation distributions may be used to improve the front side illumination uniformity.
• the front side illumination uniformity may be also improved by utilizing a light bending or direction turning film.
• Figure 6 wherein the light sources 603 providing the front side illumination of the a- Si residue on the surface of the panel under test 509 are mounted on a separate mounting ring disposed in a vicinity of the modulator 508 over the dual wavelength illuminator system of Figure 5, wherein the second light source is integrated into the VIOS column itself, is that the formed is easier and cheaper to retrofit on existing gantry-type systems.
• the inventive concept illustrated in Figure 6 could be applied to defect detection techniques that require uniform peripheral illumination (such as electron beam-based detectors and possibly also full contact probe testers). It should be noted, however, that as indicated before, electron beam detectors are not compatible with blue light irradiation.
• Figure 7 illustrates an exemplary schematic block diagram of the system 700 for detection of defects within flat panel displays, which employs one of the embodiments of the inventive concept.
• the inventive system incorporates the VIOS 702, which includes dual wavelength illuminator 703, an exemplary embodiment of which was described above with reference to Figure 5 (element 512).
• the light beam of a first wavelength, for example blue light, generated by the illuminator 703 is directed onto the LCD panel 701 , which is installed on a glass support.
• the light beam of a second wavelength generated by the illuminator 703, for example red visible light is directed onto the modulator 705, which operates to translate the electric fields on the biased LCD panel under test into spatially modulated light signal via an electro-optical transducer (the modulator), which is reflected by the pellicle (not shown) of the modulator 705.
• the reflected light is focused by the lens system 704 onto the CCD device 711 , which creates the image of the area of LCD panel under test in the reflected red light, the created image being indicative of the distribution of electric potential across the panel under test 701.
• the exemplary system 700 may further include image acquisition/image processing PC 709, which is configured to receive the image data from the CCD device 711 , generate the image of the panel under test using the received image data and to process the generated image to identify the defective LCD cells, including the location of such defective cells on the panel under test.
• image acquisition/image processing PC 709 which is configured to receive the image data from the CCD device 711 , generate the image of the panel under test using the received image data and to process the generated image to identify the defective LCD cells, including the location of such defective cells on the panel under test.
• the location information of the defects can be recorded for further processing, such as for correction of the detected defects.
• the VIOS 702 is mounted on a movable X/Y/Z stage assembly 706, which is movable under control of the stage/IO control module 707.
• more than one VIOS 702 is mounted on the same X ⁇ 7Z stage 706 such that different regions of the panel under test are being inspected simultaneously using different VIOS 702.
• the test signal pattern generator 710 is disposed to provide the driving voltage pattern to the LCD panel under test, to control the illuminator trigger and to provide the necessary bias voltage to the modulator.
• the front light illumination system can be fully integrated in the VIOS subsystem and is not restricted in any way by the detection technique described above, providing optimal absorption efficiency and irradiation uniformity.
• the front light illumination technique illustrated in Figure 6 may also be adapted for use in an electron-beam based detection system.
• the irradiation uniformity should be especially good for the dual wavelength illuminator design, described above and illustrated in Figure 5, in which the blue light used for a-Si activation follows the same optical path to the modulator as the main VIOS illuminator light.
• the front side illumination is pulsed and optimized for duration and intensity to maximize the detection of the photosensitive defects relative to the TFT pixels.
• the front side illuminating light has a wavelength that matches maximum absorption optical properties of the photosensitive defects.
• the blue light with wavelength less than 470nm is utilized for front side illumination of the a-Si residue.
• the wavelength used to increase the conductivity of the amorphous silicon residue is selected to match the absorption properties of the material.
• a-Si has an absorption edge in the low wavelength (blue light) range, see curve 801 in Figure 8.
• the absorption decreases sharply, while for shorter wavelengths, the absorption is more or less unchanged.
• electron-beam-based defect detection is incompatible with the use of blue light, since it induces significant amounts of noise in the secondary electron detector it uses to measure pixel voltages. There are two reasons for this.
• Amorphous silicon is photosensitive to short-wavelength light, and thus, mobile photoelectrons are generated after irradiation, causing increase in the conductivity of a-Si defect.
• a blue light having a wavelength of 470 nm (or shorter) is chosen because, in part, it has a relatively higher power, is more efficiently absorbed in a-Si, and has a lower sheet resistance.
• Figure 4 illustrates two plots of sheet resistance as a function of light intensity for two different wavelengths, 470 nm (plot 401) and 530 nm (plot 402). It can be seen from the plots that the shorter of the two wavelengths (401) decreases resistance more quickly as intensity is increased. Because the signal corresponding to the light with shorter wavelength may be stronger, the use of the shorter wavelength light may also enable detection of smaller sized defects (Equations 1 , 3).
• TFT channels are also exposed to the same light illumination. Because the TFT structure is also composed of a-Si material, the impinging front side illumination will also increase the conductance of the a-Si material in the TFT in the same way as the defect-forming residue. When exposed to light, the off-state conductance of the TFT will increase, and hence, the leakage current of the TFT will be higher than the corresponding value in the dark state. This results in an increase in the decay of the pixel voltage, which can be detected by the voltage image tester or other similar testing methods utilizing the voltage response of the TFT for defect detection.
• FIG. 9 is an exemplary graphical user interface 900 showing a diagram of the front light timing relative to the timing of the LCD driving pattern signals.
• the signals 901 (data odd), 902 (data even), 903 (gate odd), 904 (gate even) constitute an LCD test driving pattern.
• the front side illumination pulse 905 is characterized by its intensity, duration, start time and end time.
• Figure 10 is another example of a possible front light pattern 1000 in which the parameters of the front side illumination pulse 905 are different for every frame of a given driving pattern.
• the front side illumination pulse 905 has duration of 3 ms, start time of 3.5 ms and intensity of 50%.
• the front side illumination pulse 905 is turned off.
• the front side illumination pulse 905 has duration of 7 ms, start time of 0 ms and intensity of 25%.
• the front side illumination pulse 905 has duration of 3 ms, start time of 3.5 ms and intensity of 50%.
• the modulator biasing voltage 906 is the same for each frame.
• DDS defect detection sensitivity
• SNR signal-to-noise ratio
• FIGS 11A and 11 B show the test results 1100 and 1200 obtained using one exemplary embodiment of the inventive system for one specific type of defect (a parasitic data-pixel capacitance type defect). These figures show the dependence of the DDS ( Figure 11 A) and SNR ( Figure 11 B) on the front light end time. Specifically, the data plots 1101-1109 of Figure 11A are shown for 9 pairs of intensity and start time values.
• Plots 1201-1209 shown in Figure 11 B correspond to the same intensity/start time pairs as the respective plots 1101-1109 of Figure 11A. It should be noted that the pulse durations, intensities and start times may vary from panel to panel, and may be different for different defect types.
• pulses with longer durations lead to unacceptably large drops in SNR due to light induced TFT leakage.
• the SNR value 1210 corresponding to the detection of defects without front light is also shown.

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