WO2009068006A2 - Optoelektronischer halbleiterkörper und verfahren zur herstellung eines optoelektronischen halbleiterkörpers - Google Patents
Optoelektronischer halbleiterkörper und verfahren zur herstellung eines optoelektronischen halbleiterkörpers Download PDFInfo
- Publication number
- WO2009068006A2 WO2009068006A2 PCT/DE2008/001957 DE2008001957W WO2009068006A2 WO 2009068006 A2 WO2009068006 A2 WO 2009068006A2 DE 2008001957 W DE2008001957 W DE 2008001957W WO 2009068006 A2 WO2009068006 A2 WO 2009068006A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- layer
- semiconductor body
- recess
- optoelectronic semiconductor
- buffer layer
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 165
- 230000005693 optoelectronics Effects 0.000 title claims abstract description 38
- 238000004519 manufacturing process Methods 0.000 title description 5
- 239000000463 material Substances 0.000 claims abstract description 79
- -1 nitride compound Chemical class 0.000 claims abstract description 13
- 239000002019 doping agent Substances 0.000 claims description 24
- 239000000758 substrate Substances 0.000 claims description 16
- 239000012777 electrically insulating material Substances 0.000 claims description 5
- 230000005855 radiation Effects 0.000 claims description 5
- 238000000034 method Methods 0.000 abstract description 20
- 230000005670 electromagnetic radiation Effects 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 206
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000007788 roughening Methods 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 238000004020 luminiscence type Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 239000000470 constituent Substances 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 230000008092 positive effect Effects 0.000 description 1
- 238000013139 quantization Methods 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen characterised by the doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
Definitions
- the present application relates to an optoelectronic semiconductor body having an epitaxial semiconductor layer sequence based on a nitride compound semiconductor.
- the semiconductor layer sequence is provided with an electrical contact material such that it is connected to an n-type doped epitaxial semiconductor layer of the
- the application also relates to a method for producing such an optoelectronic semiconductor body.
- the described semiconductor body has, for example, an n-type doped epitaxial layer of GaN, which forms an outer main surface of the semiconductor body, which faces away from a p-type doped epitaxial layer.
- an electrical contact material in the form of a metallic bond pad is arranged on the main surface of the n-type doped epitaxial semiconductor layer.
- An optoelectronic semiconductor body with an epitaxial semiconductor layer sequence based on nitride compound semiconductors is specified.
- the semiconductor layer sequence has an epitaxial
- Buffer layer an active zone and arranged between the buffer layer and the active zone epitaxial contact layer.
- the buffer layer and the contact layer are based on nitride compound semiconductors.
- the semiconductor layer sequence has at least one layer and preferably several layers with one or more materials of the nitride compound semiconductors.
- Nitride compound semiconductors are compound semiconductor materials that contain nitrogen, such as materials from the system In x Al y Gai x - y N where O ⁇ x ⁇ l, O ⁇ y ⁇ l and x + y ⁇ 1.
- This material is not compulsory have a mathematically exact composition according to the above formula. Rather, it may include one or more dopants as well as additional ingredients that do not substantially alter the physical properties of the material.
- the above formula contains only the essential constituents of the crystal lattice (Al, Ga, In, N), although these may be partially replaced or supplemented by other substances.
- the buffer layer comprises GaN in one embodiment. Additionally or alternatively, the contact layer comprises GaN. This means that in this layer both Ga and N are contained as essential constituents of the material.
- the material of the layers is not necessarily a binary semiconductor material, but it may also be a ternary or a quaternary semiconductor material.
- a material comprising GaN may in particular also be AlGaN, InGaN or AlInGaN.
- the buffer layer and additionally or alternatively the contact layer has binary semiconductor material with GaN.
- the optoelectronic semiconductor body has a recess in the semiconductor layer sequence, which extends from one side of the semiconductor layer sequence through the buffer layer.
- the recess ends according to an embodiment of the semiconductor body in a region of the contact layer.
- an electrical contact material is arranged, which adjoins the contact layer in the recess. This offers the possibility of electrical contact not or not only between the contact material and an outer layer of the epitaxial
- the buffer layer can be optimized, for example, with regard to its crystal quality, and the contact layer can be optimized with regard to its contactability by means of an electrical contact material.
- the electrical contact material is not a semiconductor material of the epitaxial semiconductor layer sequence.
- the electrical contact material comprises metallically conductive material.
- the contact material contains at least one metal and / or at least one transparent electrically conductive oxide (TCO, transparent conductive oxide).
- a further embodiment of the semiconductor body provides that the buffer layer has a lower n-dopant concentration than the contact layer.
- the buffer layer may be nominally undoped or only partially n-doped in a nominal manner.
- the maximum n-dopant concentration within the buffer layer is less than 3 ⁇ 10 -8 cm -3 or less than 1 ⁇ 10 18 cm -3 . The maximum n
- Dopant concentration within the buffer layer may advantageously also be less than 7 ⁇ 10 17 cm -3 or less than 5 ⁇ 10 17 cm -3 .
- the n-impurity concentration in the contact layer is in one embodiment at least 3 x 10 18 cm “3, 5 x 10 18 cm” 3, 7 x 10 18 cm “3 or 1 x 10 19 cm” 3. In general, the highest possible n-dopant concentration in the
- the buffer layer has a thickness of greater than or equal to 0.15 ⁇ m, preferably 0.5 ⁇ m.
- the thickness may in particular also be greater than 0.7 ⁇ m or greater than 1 ⁇ m.
- an outer surface of the buffer layer has an average roughness which is more than 2 times the average roughness of a bottom surface of the recess.
- the average roughness of the outer surface is more than 5 times as large as the average roughness of a bottom surface of the recess.
- an outer surface of the buffer layer has an average roughness which is more than 2 times the average roughness of one of the
- the mean roughness of the outer surface is more than 5 times as great as the average roughness of the surface of the electrical contact material facing away from the semiconductor layer sequence.
- the electrical contact material is electrically conductively connected to a bonding pad of the semiconductor body or forms a bonding pad.
- the recess extends into the contact layer.
- a further embodiment provides that the semiconductor body is free of an epitaxial substrate.
- the invention relates to a method for producing an optoelectronic semiconductor body, in which an epitaxial semiconductor layer sequence based on nitride compound semiconductors is provided.
- the semiconductor layer sequence contains an epitaxial buffer layer, an active zone and an epitaxial contact layer.
- the buffer layer is nominally undoped or at least partially n-type doped.
- the active zone is suitable for emitting or receiving electromagnetic radiation.
- the contact layer is arranged between the buffer layer and the active zone.
- an n-dopant concentration in the contact layer is greater than in the buffer layer.
- the recess is formed so deep that it extends into the contact layer.
- an outer surface of the buffer layer is roughened.
- Figure 1 is a schematic plan view of a
- FIG. 2 shows a schematic sectional view of the optoelectronic semiconductor body illustrated in FIG. 1,
- FIG. 3 shows a schematic sectional view of the optoelectronic semiconductor body according to a second exemplary embodiment
- FIG. 4 shows a schematic sectional view of the optoelectronic semiconductor body according to a third exemplary embodiment
- FIGS. 5 to 7 show schematic sectional views of an epitaxial semiconductor layer sequence during different stages of the method according to a first exemplary embodiment
- FIGS. 8 and 9 are schematic sectional views of an epitaxial semiconductor layer stack during different process stages of the method according to a second embodiment.
- a buffer layer 21 of an epitaxial semiconductor layer stack and a contact material 4 can be seen.
- the buffer layer 21 is an outer one
- the main surfaces of a layer are to be understood in each case as meaning the two oppositely lying surfaces, which are the surfaces
- the major sides of the semiconductor layer stack are those two sides bounded by major surfaces of layers of the semiconductor layer stack.
- the buffer layer does not necessarily have to be the outer layer. Rather, it may, for example, be at least partially covered by a further epitaxial semiconductor layer of the layer stack which, for example, forms the essential part of the outer surface on this main side of the semiconductor layer stack.
- the electrical contact material 4 is formed in the form of a frame. In Figure 1, the frame is closed, but it could also be interrupted. Likewise, it is basically possible that the electrical contact material 4 is applied in any other form on the semiconductor layer stack. - S -
- a part of the electrical contact material 4 forms a bonding pad 41 or is electrically conductively connected to the bonding pad 41.
- Bond pad 41 has an outer surface adapted to mechanically and electrically conduct a bonding wire therewith to the material forming the outer surface of the bond pad.
- electrical contact tracks 42 go out. These have the purpose that, when the optoelectronic semiconductor body is in operation, electrical current is injected into the semiconductor layer sequence distributed as uniformly as possible over the entire semiconductor layer sequence.
- the contact tracks 42 extend, for example, along the lateral edge of the semiconductor layer sequence. However, it is also possible, for example, for at least one contact track to run through the middle of the semiconductor layer sequence.
- FIGS. 2 to 9 each show schematic sectional views of the optoelectronic semiconductor body or of the epitaxial semiconductor layer sequence according to various exemplary embodiments, these sectional views corresponding approximately to a plan view of a section along the dashed line AB shown in FIG.
- the electrical contact material 4 is arranged in at least one recess 3.
- the recess 3 extends from an outer main surface of the semiconductor layer sequence 2 through the buffer layer 21 and at least up to the
- the buffer layer directly adjoins the contact layer 23.
- at least one further semiconductor layer is arranged between the Buffer layer and the contact layer.
- the recess 3 extends, for example, into the contact layer 22. Based on a total thickness of
- the recess may extend into the contact layer 22, for example, including from 20% up to and including 80% of the thickness.
- the recess 3 ends approximately at half the thickness of the contact layer 22. The thickness is measured perpendicular to a main extension plane of the contact layer.
- electrical contact material 4 is arranged, which is adjacent to the contact layer 22 within the recess.
- the contact material 4 is in particular adjacent to a bottom surface 221 of the recess 3, which is formed at least partially by material of the contact layer 22. At the interface between the bottom surface 221 and the electrical contact material 4 is a good electrical contact between the contact material 4 and the
- the electrical contact has approximately the properties of an ohmic contact. In the professional world, therefore, he is often referred to as simplistic ohmic contact.
- the electrical contact material 4 protrudes partially out of the recess 3, that is to say a part of the electrical contact material 4 protrudes away from the epitaxial semiconductor layer stack 2.
- the electrical contact material 4, in particular in the region of the bonding pad 41, can be readily contacted electrically from the outside.
- the recess 3 has a depth that is at least as great as the thickness 5 of the buffer layer 21.
- the depth of the recess 3 is greater than the thickness 5 of the buffer layer 21.
- the thickness 5 of the buffer layer 21 is for example more than 0.15 microns. It is, for example, less than 5 microns. Highly suitable thicknesses 5 are, for example, 0.5 ⁇ m, 1 ⁇ m, 1.5 ⁇ m or 2 ⁇ m.
- the semiconductor body is in particular a radiation-emitting and / or radiation-detecting
- semiconductor chip based on nitride compound semiconductors include, in particular, semiconductor chips in which the epitaxially produced semiconductor layer sequence contains at least one single layer comprising a material made of the nitride compound semiconductor material system.
- the active zone has a pn junction, a double heterostructure, a single quantum well (SQW) or a multiple quantum well structure (MQW, multi quantum well) for generating radiation.
- the term quantum well structure unfolds no significance with regard to the dimensionality of the quantization. It thus includes quantum wells, quantum wires and quantum dots and any combination of these structures. Examples of MQW structures are described in the publications WO 01/39282, US 5,831,277, US 6,172,382 Bl and US 5,684,309, the disclosure content of which is hereby incorporated by reference.
- the buffer layer 21 and the contact layer 22 are each a GaN layer.
- the outer surface 211 of the buffer layer 21 is roughened. It has unevenness which is suitable for reducing total reflections on the outer surface 211 and for increasing a radiation decoupling via the outer surface 211 and out of the semiconductor layer stack 2.
- the outer surface 211 is in particular microstructured.
- a semiconductor chip with a microstructured decoupling surface and a method for microstructuring a radiation decoupling surface of a radiation-emitting semiconductor layer sequence based on nitride compound semiconductor material is disclosed, for example, in WO 2005/106972, the disclosure content of which is hereby included in the present application.
- the bottom surface 221 of the recess 3 is as flat as possible, in contrast to the outer surface 211 of the buffer layer 21. It has a roughness which is, for example, more than 5 times less than the roughness of the outer surface 211. It has been found that the smoothest possible bottom surface 221 is advantageous for forming an electrically conductive contact between the contact material 4 and the contact layer 22.
- the contact material 4 comprises, for example, one or more metals or consists of one or more metals. Additionally or alternatively, however, the electrical contact material 4 may also comprise a transparent electrically conductive oxide, a so-called TCO, such as, for example, indium tin oxide (ITO).
- TCO transparent electrically conductive oxide
- ITO indium tin oxide
- the contact material 4 comprises a layer of titanium adjacent the bottom surface 221, a layer of platinum deposited on the layer of titanium and a layer of gold applied to the layer of platinum.
- the layer of titanium for example, has a thickness of between 50 and 200 nm inclusive, eg 100 nm.
- the platinum layer has, for example, a thickness of between 50 and 300 nm inclusive, eg 100 nm.
- the layer of gold has a thickness, for example between 0.5 ⁇ m inclusive and 4 ⁇ m inclusive.
- the layers, especially the layer of gold can also be thicker.
- the layers can each also consist of the specified material.
- the buffer layer 21 is, for example, a nominally undoped GaN layer. Nominal undoped means that it has a significantly lower n-type dopant concentration than nominal n-type doped semiconductor layers of the epitaxial semiconductor layer stack 2.
- the dopant concentration in the entire buffer layer is less than 1 ⁇ 10 8 cm -3 , preferably less than 7 ⁇ 10 17 cm ⁇ 3 , more preferably less than 5 ⁇ 10 17 cm "3 .
- the dopant concentration may be, for example, at most about 3 ⁇ 10 17 cm -3 .
- the buffer layer 21 may also be doped at least partially n-type. However, the dopant concentration in the buffer layer 21 is lower than that
- Dopant concentration in the contact layer 22 is everywhere less than 3 ⁇ 10 18 cm -3 .
- the contact layer 22 has a relatively large dopant concentration
- Contact layer is doped n-type, for example, with a dopant concentration of, for example, greater than or equal to 8 x 10 18 cm "3.
- the n- Dopant concentration in the contact layer about 1 x 10 ⁇ cm ⁇ 3 or more. It is also possible that only a part of the contact layer 22 has such a high dopant concentration, and the dopant concentration in other parts of the contact layer 22 is slightly lower.
- the epitaxial semiconductor layer sequence 2 can be realized advantageously both with regard to its crystal quality and with respect to its electrical contactability if a dopant concentration in the buffer layer 21 is as low as possible and the dopant concentration in the contact layer 22 is as high as possible.
- a buffer layer 21 which is as thick as possible and which has the lowest possible doping can have a positive effect on the crystal quality of the semiconductor layer sequence.
- the semiconductor body 1 shown in FIG. 2 is, for example, free of an epitaxial substrate.
- the semiconductor layer sequence 2 has been grown, for example, beginning with the buffer layer 21 on an epitaxial substrate. Subsequently, the epitaxial substrate was removed. In this case, any material of the epitaxial substrate can be completely removed. Alternatively, however, it is also possible that a part of the material of the epitaxial substrate remains as part of the semiconductor body and is not removed.
- the optoelectronic semiconductor body is in particular a thin-film luminescence diode chip.
- a thin-film luminescence diode chip is characterized in particular by at least one of the following characteristic features: on a first main surface of the radiation-generating, epitaxial semiconductor layer sequence facing towards a carrier element, a reflective layer is applied or formed which reflects back at least part of the electromagnetic radiation generated in the epitaxial semiconductor layer sequence;
- the thin-film semiconductor chip contains a carrier element, which is not the growth substrate on which the semiconductor layer sequence was epitaxially grown, but a separate carrier element which was subsequently attached to the epitaxial semiconductor layer sequence,
- the growth substrate of the epitaxial semiconductor layer sequence is removed from the epitaxial semiconductor layer sequence or thinned in such a way that it is not free-floating together with the epitaxial semiconductor layer sequence alone, or
- the epitaxial semiconductor layer sequence has a thickness in the range of 20 microns or less, in particular in the range of 10 microns.
- the carrier element is preferably permeable to a radiation emitted by the semiconductor chip.
- the epitaxial semiconductor layer sequence preferably contains at least one semiconductor layer with at least one surface which has a mixing structure which, in the ideal case, leads to an approximately ergodic distribution of the light in the epitaxial semiconductor layer sequence, i. it has as ergodically stochastic scattering behavior as possible.
- a basic principle of a thin-film semiconductor chip is described, for example, in I. Schnitzer et al. , Appl. Phys. Lett. 63 (16), 18 October 1993, 2174 - 2176, the disclosure of which is hereby incorporated by reference.
- Examples of thin-film semiconductor chips are described in the publications EP 0905797 A2 and WO 02/13281 A1, the disclosure content of which is hereby incorporated by reference.
- the semiconductor body does not have to be a luminescence diode chip, but can also be a radiation-detecting chip, for example for an optical sensor.
- a further electrical contact material 6, for example, which forms a contact electrode of the semiconductor body 1 is arranged on a side of the semiconductor layer sequence 2 opposite the recess 3.
- the contact material 4 in the recess 3 forms an n-electrode or a part of such an n-electrode.
- the contact material 6 of the opposite electrode is applied to an electrically insulating layer 7.
- the electrically insulating layer 7 comprises, for example, a dielectric material such as silicon dioxide or consists of such.
- the layer 7 contains at least one recess extending vertically through the
- Layer 7 extends. In the region of the recess, the semiconductor layer stack 2 can be contacted in an electrically conductive manner. Preferably, the electrically insulating layer 7 has a plurality of such recesses. Such a combination of electrically insulating material 7 and electrical contact material 6 may have a high reflectivity.
- the semiconductor layer sequence 2 has, for example, an active zone 24 and a p-type doped semiconductor layer 25.
- an n-type doped semiconductor layer may optionally be arranged between the p-type doped semiconductor layer 25 and the electrical contact material 6, but this is not shown in FIG. In this case, a tunnel contact may be formed between the p-type doped semiconductor layer 25 and this n-type doped semiconductor layer.
- one or more further semiconductor layers may be arranged between the contact layer 22 and the active zone 24.
- an n-type doped semiconductor layer 23 is disposed at this point, which is adjacent to the contact layer 22 and doped with a dopant concentration of about 3.5 x 10 1 ⁇ C m ⁇ 3 n - conductive doped.
- silicon is suitable as the n-type dopant.
- the electrical contact material 4 in the recess 3 is underlaid with an electrically insulating material 43.
- the bonding pad 41 is partially or completely underlaid with the insulating material 43.
- the insulating material is a dielectric, for example silicon dioxide. The insulating material is applied to the bottom surface 221 of the recess, it is particularly adjacent to the
- the recess 3 has a different depth
- parts of the recess 3, in which the electrical contact track 42 is arranged formed deeper than parts of the recess in which the bonding pad 41 is arranged.
- the bonding pad 41 it is also possible for the bonding pad 41 to be arranged partially or entirely outside the recess 3, that is to say the bonding pad is arranged at least partially on the outer surface 211.
- the contact material 4 is arranged completely within the recess 3, that is to say the contact material does not project out of the recess 3.
- the contact material 4 projects at least partially away from the semiconductor layer stack 2, which is favorable with regard to the external electrical contactability of the semiconductor body 1.
- the electrical contact material 4, which forms the bonding pad 41 is arranged at least partially or completely in the recess 3 and does not protrude beyond the recess 3 or reach the edge of the recess.
- FIGS. 5 to 7 illustrate an exemplary embodiment of the method.
- a semiconductor layer sequence 2 is provided which has a buffer layer 21, a contact layer 22, an n-type doped layer 23, an active zone 24 and a p-type doped layer 25.
- the semiconductor layer sequence may contain further layers, for example between the n-type doped layer 23 and the active region 24.
- the semiconductor layer sequence On one of its two main sides, the semiconductor layer sequence has an outer surface 211. This outer surface is formed, for example, by one of the two main surfaces of the buffer layer 21.
- the epitaxial semiconductor layer sequence 2 can be produced by placing the layers on a suitable substrate
- Epitaxy substrate to be grown comprises, for example, silicon carbide or sapphire.
- the semiconductor layer sequence 2 is thereby grown, for example, beginning with the buffer layer 21 on the epitaxial substrate. Subsequently, the epitaxial substrate is removed, for example, from the semiconductor layer sequence.
- the contact structure respectively shown in FIGS. 2 to 4 may be formed with an electrically insulating layer 7 and an electrical contact material 6, which is not illustrated in FIGS. 5 to 7.
- the formation of this contact structure can in principle also take place after the removal of the epitaxial substrate.
- At least one recess 3 is formed in the semiconductor layer sequence 2.
- the formation of the recess can take place, for example, photolithographically using a photoimageable mask layer.
- a photoimageable mask layer is not shown in Figures 6 and 7, although in an expedient embodiment it may also be present during the application of the electrical contact material 4, see Figure 7.
- Unwanted electrical Contact material can then be advantageously removed in a lift-off process together with the photoimageable mask layer. Such process steps are generally known to the person skilled in the art.
- the formation of the recess can take place, for example, using reactive ion etching and / or, for example, wet-chemical. Also for the application of the electrical contact material 4, conventional process steps such as vapor deposition and / or sputtering can be used.
- a method step for roughening the outer surface 211 takes place only after arranging the electrical contact material in the
- Recess 3 This can be ensured in a simple manner that the bottom surface of the recess 221 is formed as flat or smooth as possible and can not be affected by a process step for roughening in this regard.
- a method for roughening the outer surface 211 is disclosed, for example, in WO 2005/106972, the disclosure of which has already been incorporated by reference in this application.
- the resulting from the process semiconductor body 1 is illustrated in Figure 2.
- FIGS. 8 and 9 An alternative example of the method is illustrated in FIGS. 8 and 9.
- a process step for roughening the outer surface 211 takes place before the formation of the recess 3.
- the recess 3 is created, for example, by etching into a rough surface, with the result that the bottom surface 211 of the recess 3 is also rough.
- the roughness of the bottom surface 221 is less than 5 times or less than 2 times smaller than the roughness of the outer surface 211. It has been found that even at a rough bottom surface 221, a good electrically conductive contact between the electrical contact material 4 and the contact layer 22 can be formed.
- the smoothest possible bottom surface of the recess appears advantageous, however, the bottom surface 221 can also be made rough.
- the optoelectronic semiconductor body and the method are not limited by their description based on the embodiments of these. Rather, the application includes each new feature and each combination of features, which in particular includes any combination of features in the claims, even if this feature or combination itself is not explicitly stated in the claims or exemplary embodiments.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2008801184236A CN101878546B (zh) | 2007-11-30 | 2008-11-26 | 光电子半导体本体和用于制造光电子半导体本体的方法 |
JP2010535212A JP2011505073A (ja) | 2007-11-30 | 2008-11-26 | オプトエレクトロニクス半導体ボディおよびオプトエレクトロニクス半導体ボディの製造方法 |
US12/745,683 US20110204322A1 (en) | 2007-11-30 | 2008-11-26 | Optoelectronic Semiconductor Body and Method for Producing an Optoelectronic Semiconductor Body |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102007057756.9A DE102007057756B4 (de) | 2007-11-30 | 2007-11-30 | Verfahren zur Herstellung eines optoelektronischen Halbleiterkörpers |
DE102007057756.9 | 2007-11-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2009068006A2 true WO2009068006A2 (de) | 2009-06-04 |
WO2009068006A3 WO2009068006A3 (de) | 2009-09-11 |
Family
ID=40455567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/DE2008/001957 WO2009068006A2 (de) | 2007-11-30 | 2008-11-26 | Optoelektronischer halbleiterkörper und verfahren zur herstellung eines optoelektronischen halbleiterkörpers |
Country Status (7)
Country | Link |
---|---|
US (1) | US20110204322A1 (de) |
JP (1) | JP2011505073A (de) |
KR (1) | KR20100097188A (de) |
CN (1) | CN101878546B (de) |
DE (1) | DE102007057756B4 (de) |
TW (1) | TWI474501B (de) |
WO (1) | WO2009068006A2 (de) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011187873A (ja) * | 2010-03-11 | 2011-09-22 | Toshiba Corp | 半導体発光素子 |
CN102255014A (zh) * | 2010-05-18 | 2011-11-23 | Lg伊诺特有限公司 | 发光器件、发光器件封装以及照明装置 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102010032497A1 (de) | 2010-07-28 | 2012-02-02 | Osram Opto Semiconductors Gmbh | Strahlungsemittierender Halbleiterchip und Verfahren zur Herstellung eines strahlungsemittierenden Halbleiterchips |
US8829487B2 (en) * | 2011-03-21 | 2014-09-09 | Walsin Lihwa Corporation | Light emitting diode and method for manufacturing the same |
US8664679B2 (en) * | 2011-09-29 | 2014-03-04 | Toshiba Techno Center Inc. | Light emitting devices having light coupling layers with recessed electrodes |
DE102018111324A1 (de) * | 2018-05-11 | 2019-11-14 | Osram Opto Semiconductors Gmbh | Optoelektronischer Halbleiterchip |
DE102020126442A1 (de) * | 2020-10-08 | 2022-04-14 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Optoelektronische vorrichtung mit einer kontaktschicht und einer darüber angeordneten aufrauschicht sowie herstellungsverfahren |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19830838A1 (de) * | 1997-07-10 | 1999-01-14 | Rohm Co Ltd | Halbleiter-Lichtemissionseinrichtung |
US20020117681A1 (en) * | 2001-02-23 | 2002-08-29 | Weeks T. Warren | Gallium nitride material devices and methods including backside vias |
Family Cites Families (38)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US104081A (en) * | 1870-06-07 | Improvement in scaffold-bracket | ||
US5684309A (en) | 1996-07-11 | 1997-11-04 | North Carolina State University | Stacked quantum well aluminum indium gallium nitride light emitting diodes |
KR100644933B1 (ko) | 1997-01-09 | 2006-11-15 | 니치아 카가쿠 고교 가부시키가이샤 | 질화물반도체소자 |
JP3374737B2 (ja) * | 1997-01-09 | 2003-02-10 | 日亜化学工業株式会社 | 窒化物半導体素子 |
US5831277A (en) | 1997-03-19 | 1998-11-03 | Northwestern University | III-nitride superlattice structures |
JPH10294491A (ja) * | 1997-04-22 | 1998-11-04 | Toshiba Corp | 半導体発光素子およびその製造方法ならびに発光装置 |
EP0905797B1 (de) | 1997-09-29 | 2010-02-10 | OSRAM Opto Semiconductors GmbH | Halbleiterlichtquelle und Verfahren zu ihrer Herstellung |
JP3804335B2 (ja) * | 1998-11-26 | 2006-08-02 | ソニー株式会社 | 半導体レーザ |
JP4040192B2 (ja) * | 1998-11-26 | 2008-01-30 | ソニー株式会社 | 半導体発光素子の製造方法 |
DE19955747A1 (de) | 1999-11-19 | 2001-05-23 | Osram Opto Semiconductors Gmbh | Optische Halbleitervorrichtung mit Mehrfach-Quantentopf-Struktur |
JP2003533030A (ja) | 2000-04-26 | 2003-11-05 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツング | GaNをベースとする発光ダイオードチップおよび発光ダイオード構造素子の製造法 |
US20020017652A1 (en) | 2000-08-08 | 2002-02-14 | Stefan Illek | Semiconductor chip for optoelectronics |
US6429460B1 (en) * | 2000-09-28 | 2002-08-06 | United Epitaxy Company, Ltd. | Highly luminous light emitting device |
US6649942B2 (en) * | 2001-05-23 | 2003-11-18 | Sanyo Electric Co., Ltd. | Nitride-based semiconductor light-emitting device |
JP2004343139A (ja) * | 2001-11-19 | 2004-12-02 | Sanyo Electric Co Ltd | 化合物半導体発光素子 |
JP4148494B2 (ja) * | 2001-12-04 | 2008-09-10 | シャープ株式会社 | 窒化物系化合物半導体発光素子およびその製造方法 |
JP2007116192A (ja) * | 2002-03-26 | 2007-05-10 | Sanyo Electric Co Ltd | 窒化物系半導体装置 |
TW200414563A (en) * | 2003-01-30 | 2004-08-01 | South Epitaxy Corp | Light emitting diode and a method of manufacturing the same |
TW200509408A (en) * | 2003-08-20 | 2005-03-01 | Epistar Corp | Nitride light-emitting device with high light-emitting efficiency |
JP2005085932A (ja) * | 2003-09-08 | 2005-03-31 | Toyoda Gosei Co Ltd | 発光ダイオード及びその製造方法 |
TWI234295B (en) * | 2003-10-08 | 2005-06-11 | Epistar Corp | High-efficiency nitride-based light-emitting device |
TWI234298B (en) * | 2003-11-18 | 2005-06-11 | Itswell Co Ltd | Semiconductor light emitting diode and method for manufacturing the same |
JP2005197573A (ja) * | 2004-01-09 | 2005-07-21 | Sharp Corp | Iii族窒化物半導体発光素子 |
JP4368225B2 (ja) * | 2004-03-10 | 2009-11-18 | 三洋電機株式会社 | 窒化物系半導体発光素子の製造方法 |
TWI244222B (en) * | 2004-03-11 | 2005-11-21 | Epistar Corp | A ternary nitride buffer layer containing nitride light-emitting device and manufacturing method of the same |
KR101361630B1 (ko) | 2004-04-29 | 2014-02-11 | 오스람 옵토 세미컨덕터스 게엠베하 | 방사선 방출 반도체 칩의 제조 방법 |
US7534633B2 (en) * | 2004-07-02 | 2009-05-19 | Cree, Inc. | LED with substrate modifications for enhanced light extraction and method of making same |
JP2006066903A (ja) * | 2004-07-29 | 2006-03-09 | Showa Denko Kk | 半導体発光素子用正極 |
JP2006135311A (ja) * | 2004-10-08 | 2006-05-25 | Mitsubishi Cable Ind Ltd | 窒化物半導体を用いた発光ダイオード |
JP3949157B2 (ja) * | 2005-04-08 | 2007-07-25 | 三菱電線工業株式会社 | 半導体素子およびその製造方法 |
JP4297084B2 (ja) * | 2005-06-13 | 2009-07-15 | 住友電気工業株式会社 | 発光装置の製造方法および発光装置 |
JP2007096090A (ja) * | 2005-09-29 | 2007-04-12 | Sanyo Electric Co Ltd | 半導体発光素子及び半導体発光素子の製造方法 |
JP2007150259A (ja) * | 2005-11-02 | 2007-06-14 | Sharp Corp | 窒化物半導体発光素子およびその製造方法 |
JP4895587B2 (ja) * | 2005-11-29 | 2012-03-14 | ローム株式会社 | 窒化物半導体発光素子 |
JP2007157853A (ja) * | 2005-12-01 | 2007-06-21 | Sony Corp | 半導体発光素子およびその製造方法 |
TWI288491B (en) * | 2006-03-02 | 2007-10-11 | Nat Univ Chung Hsing | High extraction efficiency of solid-state light emitting device |
CN100438108C (zh) * | 2006-06-15 | 2008-11-26 | 厦门大学 | 树叶脉络形大功率氮化镓基发光二极管芯片的p、n电极 |
US20080042149A1 (en) * | 2006-08-21 | 2008-02-21 | Samsung Electro-Mechanics Co., Ltd. | Vertical nitride semiconductor light emitting diode and method of manufacturing the same |
-
2007
- 2007-11-30 DE DE102007057756.9A patent/DE102007057756B4/de active Active
-
2008
- 2008-11-21 TW TW97145091A patent/TWI474501B/zh active
- 2008-11-26 CN CN2008801184236A patent/CN101878546B/zh active Active
- 2008-11-26 WO PCT/DE2008/001957 patent/WO2009068006A2/de active Application Filing
- 2008-11-26 US US12/745,683 patent/US20110204322A1/en not_active Abandoned
- 2008-11-26 KR KR1020107014175A patent/KR20100097188A/ko not_active Application Discontinuation
- 2008-11-26 JP JP2010535212A patent/JP2011505073A/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19830838A1 (de) * | 1997-07-10 | 1999-01-14 | Rohm Co Ltd | Halbleiter-Lichtemissionseinrichtung |
US20020117681A1 (en) * | 2001-02-23 | 2002-08-29 | Weeks T. Warren | Gallium nitride material devices and methods including backside vias |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011187873A (ja) * | 2010-03-11 | 2011-09-22 | Toshiba Corp | 半導体発光素子 |
US8729583B2 (en) | 2010-03-11 | 2014-05-20 | Kabushiki Kaisha Toshiba | Semiconductor light-emitting device |
CN102255014A (zh) * | 2010-05-18 | 2011-11-23 | Lg伊诺特有限公司 | 发光器件、发光器件封装以及照明装置 |
Also Published As
Publication number | Publication date |
---|---|
WO2009068006A3 (de) | 2009-09-11 |
DE102007057756B4 (de) | 2022-03-10 |
TW200933936A (en) | 2009-08-01 |
TWI474501B (zh) | 2015-02-21 |
DE102007057756A1 (de) | 2009-06-04 |
CN101878546B (zh) | 2012-05-23 |
US20110204322A1 (en) | 2011-08-25 |
JP2011505073A (ja) | 2011-02-17 |
KR20100097188A (ko) | 2010-09-02 |
CN101878546A (zh) | 2010-11-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1709694B1 (de) | Dünnfilm-led mit einer stromaufweitungsstruktur | |
EP2212931B1 (de) | Led mit stromaufweitungsschicht | |
EP2519980B1 (de) | Lichtemittierender halbleiterchip | |
EP2149159B1 (de) | Optoelektronischer halbleiterkörper und verfahren zur herstellung eines solchen | |
EP2015372B1 (de) | Halbleiterchip und Verfahren zur Herstellung eines Halbleiterchips | |
EP2208240B1 (de) | Optoelektronischer halbleiterchip mit einer mehrfachquantentopfstruktur | |
DE102006057747B4 (de) | Halbleiterkörper und Halbleiterchip mit einem Halbleiterkörper | |
DE112004002809B4 (de) | Verfahren zum Herstellen eines strahlungsemittierenden Halbleiterchips und durch dieses Verfahren hergestellter Halbleiterchip | |
EP1845564A2 (de) | Strahlungsemittierender Körper und Verfahren zur Herstellung eines strahlungsemittierenden Körpers | |
DE102005025416A1 (de) | Lumineszenzdiodenchip mit einer Kontaktstruktur | |
DE102007057756B4 (de) | Verfahren zur Herstellung eines optoelektronischen Halbleiterkörpers | |
EP1748496B1 (de) | Strahlungsemittierender Halbleiterchip | |
EP2559076A1 (de) | Leuchtdiodenchip mit stromaufweitungsschicht | |
DE112018000553B4 (de) | Optoelektronischer Halbleiterchip | |
EP2980864A1 (de) | Optoelektronischer halbleiterchip und verfahren zur herstellung einer kontaktstruktur für einen derartigen chip | |
EP2519979B1 (de) | Optoelektronischer halbleiterchip mit zwei auf algan basierenden zwischenschichten | |
DE102005003460A1 (de) | Dünnfilm-LED mit einer Stromaufweitungsstruktur | |
DE10056475B4 (de) | Strahlungsemittierendes Halbleiterbauelement auf GaN-Basis mit verbesserter p-Leitfähigkeit und Verfahren zu dessen Herstellung | |
WO2017021301A1 (de) | Verfahren zur herstellung eines nitrid-halbleiterbauelements und nitrid-halbleiterbauelement | |
WO2021175635A1 (de) | Strahlungsemittierender halbleiterkörper und dessen verfahren zur herstellung |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200880118423.6 Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 08853749 Country of ref document: EP Kind code of ref document: A2 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2010535212 Country of ref document: JP |
|
ENP | Entry into the national phase |
Ref document number: 20107014175 Country of ref document: KR Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 12745683 Country of ref document: US |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 08853749 Country of ref document: EP Kind code of ref document: A2 |