WO2009030078A1 - Inner lead structure of semiconductor device - Google Patents

Inner lead structure of semiconductor device Download PDF

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Publication number
WO2009030078A1
WO2009030078A1 PCT/CN2007/003214 CN2007003214W WO2009030078A1 WO 2009030078 A1 WO2009030078 A1 WO 2009030078A1 CN 2007003214 W CN2007003214 W CN 2007003214W WO 2009030078 A1 WO2009030078 A1 WO 2009030078A1
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WO
WIPO (PCT)
Prior art keywords
chip
gold
inner lead
semiconductor device
ball
Prior art date
Application number
PCT/CN2007/003214
Other languages
English (en)
French (fr)
Inventor
Weibing Chu
Zhenyu Shi
Xiaoguang Zeng
Weidong Chen
Lixiong Luo
Original Assignee
Agape Package Manufacturing(Shanghai)Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agape Package Manufacturing(Shanghai)Ltd. filed Critical Agape Package Manufacturing(Shanghai)Ltd.
Publication of WO2009030078A1 publication Critical patent/WO2009030078A1/zh

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Definitions

  • the present invention relates to an inner lead structure of a semiconductor device, and more particularly to a bridge structure for an inner lead structure of a semiconductor device.
  • the inner wire I wire is widely used in the packaging of semiconductor devices such as semiconductor integrated circuits, discrete components and modules to complete the connection of the pins in the chip and the lead frame. As shown in FIG. 1 , the chip 1 passes through the inner leads 3 .
  • the wiring area 21 of the lead pin is connected to form a path in which the semiconductor chip 1 exchanges an electric signal to the outside.
  • the current inner leads mainly include gold wires, aluminum wires and the like, and the pins of the chip and the lead frame are connected by special equipment.
  • the cost of the gold wire is also getting higher and higher, and the equipment investment of the aluminum wire is large and the process has many limitations.
  • copper wire or alloy wire has been developed to replace the gold wire and the conventional aluminum wire process.
  • There are many process problems in the direct welding process which makes the development diameter 4mil, 5mil, 6mil... copper wire welding technology is more difficult and stagnant.
  • the copper ball is formed by high voltage discharge through the copper wire, and then the copper ball and the surface of the chip are subjected to pressure and ultrasonic energy through a gold wire welding machine at a certain temperature to achieve the purpose of splicing. Since the copper ball becomes very hard during the formation of the copper ball, the recrystallization of the molecule and the oxidation of the surface of the copper ball, the hard copper ball 31 is highly susceptible to desoldering during the splicing process (as shown in Fig. 2A), or squeezed. The metal layer 11 such as aluminum (as shown in Fig. 2B) of the surface of the soldered chip 1 is removed, and even the metal layer 11 and the chip 1 are broken or cracked, and this problem becomes more prominent as the wire diameter becomes thicker.
  • the present invention provides an inner lead structure of a semiconductor device, including an inner lead for electrically connecting a lead frame and a chip mounted on the lead frame, and is characterized by: corresponding to and inside the surface of the chip The soldered regions of the lead connections are connected to a bridging structure on which the inner leads are soldered.
  • the bridging structure is a metal medium, specifically, a spherical medium formed of at least one gold ball or a gold alloy.
  • the bridging structure of the present invention when a copper material or the like is used as the inner lead, the copper wire is soldered on the gold ball, so that the gold ball plays a good buffering role, avoiding the hard copper ball directly contacting the chip surface.
  • Contact which completely solves the defects of the prior art fine copper wire directly soldered on the surface of the chip, and also provides a good solution for the thicker copper wire application, and the inner lead structure connected by the copper wire and the bridge structure can be Instead of gold wire as the inner lead, the packaging cost is greatly reduced, the production efficiency and product reliability are improved.
  • FIG. 1 is a diagram showing an internal lead structure of a prior art semiconductor device
  • FIGS. 2A and 2B are enlarged schematic views of a conventional copper wire bonding process
  • FIG. 3 is a schematic view showing the structure of an inner lead of a semiconductor device of the present invention.
  • FIGS. 4A and 4B are enlarged schematic views showing a bridge structure in an inner lead structure of the present invention.
  • Figure 5 is an enlarged schematic view showing the structure of an inner lead according to an embodiment of the present invention
  • Figure 6 is a top plan view of the assembly of the inner lead structure of the present invention.
  • the inner lead structure of the semiconductor device of the present invention the wiring region 21 of the lead frame 2 is electrically connected to the chip 1 through the inner leads 3.
  • a gold ball 32 is provided as a bridge structure, and the inner leads 3 are connected to the gold balls 32 to electrically connect the lead frames 2 to the chips 1.
  • the copper wire is used as the inner lead 3 electrically connected to the wiring region 21 of the lead frame 2, as shown in FIGS. 4A and 4B, and the gold wire bonding device is used before the copper wire 3 is connected to the chip.
  • the position and number of the copper wires 3 to be wound are correspondingly, and the gold balls 32 are soldered at the corresponding positions.
  • the end of the copper wire is subjected to high-voltage discharge to form a copper ball 31, and at a certain temperature, the copper ball 31 is welded to the golden ball by the action of the pressure and the ultrasonic energy by the gold wire bonding equipment.
  • the gold ball 32 acts as a bridge medium between the copper wire and the surface of the chip, so that the hard copper ball is directly contacted to the surface of the chip, the dislocation does not occur, and the metal layer 11 is not broken or cracked. The metal layer 11 remains intact. Therefore, the gold ball 32 acts as a buffer for the bridge structure, completely solving the process defect of directly soldering the copper ball 31 to the chip.
  • the soldered gold balls 32 may be one or more, soldered in a superimposed or juxtaposed manner in the surface soldering area of the chip 1, and the copper balls 31 of the inner leads 3 are soldered in parallel or stacked.
  • the gold ball 32 constitutes the inner lead structure of the present invention.
  • FIG. 6 is a top view of the assembly of the inner lead structure of the present invention.
  • a gold ball 32 is soldered, and the gold ball 32 is distributed on the chip 1, and the copper wire 3 is A copper ball 31 is soldered to the gold ball 32 to electrically connect the chip 1 to the lead frame 2.
  • other metals such as aluminum may be used in place of copper as the inner leads.
  • bond to the surface of the chip as a bridge structure using, for example, a gold alloy.
  • the bridging structure is not limited to a spherical shape, and may have any shape such as a square shape or an irregular shape.
  • the bridge structure can be applied to inner wire bonding surfaces of semiconductor integrated circuits, semiconductor discrete components and semiconductor integrated circuit modules, and can also be used in MOSFET series, JFET, Power devices such as SCRs, IGBTs, diodes, and transistors.
  • MOSFET series MOSFET series
  • JFET JFET
  • Power devices such as SCRs, IGBTs, diodes, and transistors.

Description

半导体器件的内引线结构 技术领域 本发明公开了一种半导体器件的内引线结构， 更具体的， 涉及半导体 器件的内引线结构用桥接结构。 背景技术 内弓 I线被广泛用于半导体集成电路、分立元器件和模块等半导体器件 的封装中， 以完成芯片与引线框架内引脚的连接， 如图 1所示， 芯片 1通过 内引线 3与引线脚的配线区 21连接，形成半导体芯片 1向外部交换传递电信 号的路径。
目前的内引线主要有金线、铝线等材料并借助专用设备完成芯片和引 线框架内引脚的连接。 但随着国际市场黄金价格的持续走高， 金线的成本 也越来越高， 而铝线的设备投资大且工艺上有很多局限性。 于是， 近些年 来又开发了用铜线或合金线来替代金线和传统的铝线工艺。虽然铜线能明 显降低成本和提高电性能， 但在实际工艺中， 凸现出铜线 （≤直径 2mil， lmil=0.001英寸） 在直接焊接的过程中存在很多工艺问题， 使得发展直径 4mil、 5mil、 6mil...铜线焊接技术更加困难和停滞不前。 具体的， 通过铜 线经高压放电形成铜球， 然后铜球和芯片表面在一定温度下， 通过金线焊 接机施以压力、 超声波能量的作用， 达到悍接目的。 由于在铜球形成过程 中， 分子再结晶和铜球表面的氧化使得铜球变得很硬， 坚硬的铜球 31在悍 接过程中极易发生脱焊 （如图 2A所示） , 或者挤掉被焊接芯片 1表面的金 属层 11诸如铝 （如图 2B所示） ， 甚至将金属层 11和芯片 1打碎或打裂， 随 着线径变粗， 这种问题更加突出。 而发生上述问题的器件往往又不能在成 品测试中被筛选出来， 使得产品可能有潜在的可靠性问题。 虽然目前依靠 增加芯片表面金属厚度来减少发生可靠性问题的概率，这样又增加了晶元 厂的成本、 生产周期和效率等。 由于上述铜线直接悍接的工艺应用存在的 局限性， 至今也没能达到大规模应用， 无法替换金线。
因此， 为了降低封装成本， 既需要用其它金属代替金线作为半导体器 件的内引线， 同时又要克服利用其它金属作为内引线带来的工艺上的缺 陷、 提高生产效率及产品可靠性。 发明内容 为实现上述目的， 本发明提供一种半导体器件的内引线结构， 包括用 来电连接引线框架与装载在所述引线框架上芯片的内引线， 特点是： 在所 述芯片的表面对应与内引线连接的焊接区域悍接有桥接结构，所述内引线 焊接在所述桥接结构上。
所述桥接结构为金属介质， 具体的， 为至少一个金球或金合金物形成 的球状介质。
通过本发明所述的桥接结构， 在铜材料等作为内引线时， 铜引线焊接 在所述金球上， 这样， 金球起到了很好的缓冲作用， 避免了坚硬的铜球直 接与芯片表面接触， 既彻底解决有现有技术细铜线直接焊接在芯片表面的 缺陷， 也为更粗的铜线应用提供了很好的解决方案， 同时利用铜线与桥接 结构连接的内引线结构，可以代替金线作为内引线，大大降低了封装成本、 提高了生产效率及产品可靠性。
以下将结合附图对本发明的构思、具体结构及产生的技术效果作进一 步说明， 以充分地了解本发明的目的、 特征和效果。 附图说明 图 1为现有技术的半导体器件的内引线结构图；
图 2A、 2B为现有的铜线焊接工艺的放大示意图；
图 3为本发明的半导体器件的内引线结构示意图；
图 4A、 4B为本发明内引线结构中桥接结构的放大示意图；
图 5为本发明的一个具体实施例的内引线结构的放大示意图； 图 6为本发明内引线结构装配的俯视图。 具体实施方式 下面结合附图进一步说明本发明的实施例。
如图 3所示为本发明的半导体器件的内引线结构， 引线框架 2的配线区 域 21通过内引线 3与芯片 1形成电连接。在对应连接内引线 3的芯片 1表面的 焊接区域， 设置有金球 32， 作为桥接结构， 所述内引线 3与金球 32连接， 实现引线框架 2与芯片 1的电连接。
在实施例中，铜线作为芯片 1与引线框架 2的配线区域 21电连接的内引 线 3， 如图 4A、 4B所示， 在铜线 3悍接到芯片上之前， 利用金线焊接设备 在芯片 1表面悍接区域上对应将要悍上的铜线 3的位置和数量，在相应位置 上焊上金球 32。 然后， 再利用现有的工艺， 将铜线的端部经高压放电形成 铜球 31，在一定温度下，通过金线焊接设备施以压力、超声波能量的作用， 将铜球 31焊接在金球 32上， 这样金球 32作为铜线和芯片表面之间的桥介 质， 避免了坚硬的铜球直接接触到芯片表面， 不会发生脱悍， 更不会将金 属层 11打碎或打裂， 金属层 11保持完好。 因此， 通过金球 32作为桥接结构 的缓冲作用， 彻底解决了将铜球 31直接焊接到芯片上的工艺缺陷。
具体的， 如图 5所示， 焊接的金球 32可以为一个或多个， 以叠加或并 列的方式焊接在芯片 1的表面焊接区域内， 内引线 3的铜球 31焊接在并列或 叠加的金球 32上， 构成本发明的内引线结构。
图 6为本发明内引线结构装配的俯视图， 由图可见， 在芯片 1表面对应 铜线 3悍接的位置， 焊接有金球 32， 金球 32分布悍接在芯片 1上， 铜线 3的 铜球 31焊接在所述金球 32上 , 使芯片 1与引线框架 2形成电连接。 在具体实施例中， 可以用其它金属诸如铝替代铜作为内引线。 还可以 用诸如金合金物悍接在芯片表面作为桥接结构。 所述桥接结构不限于球 状， 还可为方形或不规则形状等任意形状。
所述的桥接结构可应用在半导体集成电路、半导体分立元器件和半导 体集成电路模块的内引线键合面上， 还可以用在 MOSFET系列， JFET、 SCR、 IGBT、 二极管、 晶体管等功率器件上。 综上所述， 本说明书中所述的只是本发明的较佳具体实施例， 以上实 施例仅用以说明本发明的技术方案而非限制。凡本技术领域中技术人员依 本发明的构思在现有技术的基础上通过逻辑分析、推理或者有限的实验可 以得到的技术方案， 皆应在本发明的权利要求保护范围之内。

Claims

权 利 要 求 书
一种半导体器件的内引线结构， 包括用来电连接引线框架与装载 在所述引线框架上芯片的内引线， 其特征在于： 在所述芯片的表面对应与 内弓 I线连接的焊接区域焊接有桥接结构，所述内弓 ί线焊接在所述桥接结构 上。
2、 如权利要求 1所述的半导体器件的内引线结构， 其特征在于， 所 述桥接结构为金属介质。
3、 如权利要求 2所述的半导体器件的内引线结构， 其特征在于， 所 述金属介质为金或金合金物形成。
4、 如权利要求 2所述的半导体器件的内引线结构， 其特征在于， 所 述金属介质为球状。
PCT/CN2007/003214 2007-09-03 2007-11-14 Inner lead structure of semiconductor device WO2009030078A1 (en)

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TWI452640B (zh) * 2009-02-09 2014-09-11 Advanced Semiconductor Eng 半導體封裝構造及其封裝方法
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0753891A2 (en) * 1995-06-28 1997-01-15 Texas Instruments Incorporated Low loop wire bonding
US20040072396A1 (en) * 2002-05-29 2004-04-15 Stmicroelectronics S.R.I. Semiconductor electronic device and method of manufacturing thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0753891A2 (en) * 1995-06-28 1997-01-15 Texas Instruments Incorporated Low loop wire bonding
US20040072396A1 (en) * 2002-05-29 2004-04-15 Stmicroelectronics S.R.I. Semiconductor electronic device and method of manufacturing thereof

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