WO2009028040A1 - 試験装置および製造方法 - Google Patents

試験装置および製造方法 Download PDF

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Publication number
WO2009028040A1
WO2009028040A1 PCT/JP2007/066566 JP2007066566W WO2009028040A1 WO 2009028040 A1 WO2009028040 A1 WO 2009028040A1 JP 2007066566 W JP2007066566 W JP 2007066566W WO 2009028040 A1 WO2009028040 A1 WO 2009028040A1
Authority
WO
WIPO (PCT)
Prior art keywords
period
sub
test
window
generating
Prior art date
Application number
PCT/JP2007/066566
Other languages
English (en)
French (fr)
Inventor
Naoyoshi Watanabe
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Priority to JP2009529890A priority Critical patent/JP5202531B2/ja
Priority to PCT/JP2007/066566 priority patent/WO2009028040A1/ja
Publication of WO2009028040A1 publication Critical patent/WO2009028040A1/ja

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31932—Comparators

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

　被試験デバイスを試験する試験装置であって、試験周期を示すメイン周期信号を発生するメイン周期発生部と、試験周期毎に試験周期を分割したサブ周期を示すサブ周期信号を発生するサブ周期発生部と、被試験デバイスから出力された出力信号を閾値と比較して、比較結果に応じた論理値を表す比較信号を出力するレベルコンパレータと、サブ周期信号を基準として、試験周期中の異なる位相範囲を示す複数のウィンドウ期間を指定するウィンドウ期間指定部と、複数のウィンドウ期間のそれぞれにおいて比較信号が所定論理値となったか否かを検出するウィンドウタイミング比較部とを備える試験装置を提供する。
PCT/JP2007/066566 2007-08-27 2007-08-27 試験装置および製造方法 WO2009028040A1 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009529890A JP5202531B2 (ja) 2007-08-27 2007-08-27 試験装置および製造方法
PCT/JP2007/066566 WO2009028040A1 (ja) 2007-08-27 2007-08-27 試験装置および製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/066566 WO2009028040A1 (ja) 2007-08-27 2007-08-27 試験装置および製造方法

Publications (1)

Publication Number Publication Date
WO2009028040A1 true WO2009028040A1 (ja) 2009-03-05

Family

ID=40386784

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/066566 WO2009028040A1 (ja) 2007-08-27 2007-08-27 試験装置および製造方法

Country Status (2)

Country Link
JP (1) JP5202531B2 (ja)
WO (1) WO2009028040A1 (ja)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07151824A (ja) * 1993-11-30 1995-06-16 Ando Electric Co Ltd Ｉｃ検査装置
JPH09231743A (ja) * 1996-02-22 1997-09-05 Mitsubishi Electric Corp 同期型半導体記憶装置および試験方法
JP2000304832A (ja) * 1999-04-21 2000-11-02 Advantest Corp 半導体試験装置
JP2002196051A (ja) * 2000-12-27 2002-07-10 Sony Corp 半導体装置の動作試験装置および動作試験方法
US6708298B2 (en) * 2001-01-23 2004-03-16 International Business Machines Corporation Method for guaranteeing a minimum data strobe valid window and a minimum data valid window for DDR memory devices
JP3519329B2 (ja) * 1999-11-30 2004-04-12 シャープ株式会社 半導体試験装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3574728B2 (ja) * 1996-06-14 2004-10-06 株式会社アドバンテスト 半導体デバイス試験装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07151824A (ja) * 1993-11-30 1995-06-16 Ando Electric Co Ltd Ｉｃ検査装置
JPH09231743A (ja) * 1996-02-22 1997-09-05 Mitsubishi Electric Corp 同期型半導体記憶装置および試験方法
JP2000304832A (ja) * 1999-04-21 2000-11-02 Advantest Corp 半導体試験装置
JP3519329B2 (ja) * 1999-11-30 2004-04-12 シャープ株式会社 半導体試験装置
JP2002196051A (ja) * 2000-12-27 2002-07-10 Sony Corp 半導体装置の動作試験装置および動作試験方法
US6708298B2 (en) * 2001-01-23 2004-03-16 International Business Machines Corporation Method for guaranteeing a minimum data strobe valid window and a minimum data valid window for DDR memory devices

Also Published As

Publication number Publication date
JPWO2009028040A1 (ja) 2010-11-25
JP5202531B2 (ja) 2013-06-05

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