WO2009017146A1 - Film de câblage en cuivre - Google Patents

Film de câblage en cuivre Download PDF

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Publication number
WO2009017146A1
WO2009017146A1 PCT/JP2008/063642 JP2008063642W WO2009017146A1 WO 2009017146 A1 WO2009017146 A1 WO 2009017146A1 JP 2008063642 W JP2008063642 W JP 2008063642W WO 2009017146 A1 WO2009017146 A1 WO 2009017146A1
Authority
WO
WIPO (PCT)
Prior art keywords
wiring film
cu2o
plane
ray diffraction
diffraction peak
Prior art date
Application number
PCT/JP2008/063642
Other languages
English (en)
Japanese (ja)
Inventor
Hideo Murata
Original Assignee
Hitachi Metals, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Metals, Ltd. filed Critical Hitachi Metals, Ltd.
Priority to JP2009525427A priority Critical patent/JP5360595B2/ja
Priority to KR1020097026478A priority patent/KR101088744B1/ko
Priority to CN2008800226157A priority patent/CN101689502B/zh
Publication of WO2009017146A1 publication Critical patent/WO2009017146A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Liquid Crystal (AREA)
  • Physical Vapour Deposition (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

L'invention concerne un nouveau film de câblage en cuivre (Cu) ayant une meilleure adhérence à un substrat. Le film de câblage en Cu a un oxyde de Cu formé sur un substrat en verre, et a un rapport d'intensité de Cu(111)/Cu2O(111) compris dans un intervalle allant de 0,8 à 2,5, Cu(111) étant une intensité de pic de diffraction des rayons X d'un plan (111) d'un plan cristallin principal de Cu, et Cu2O(111) étant une intensité de pic de diffraction des rayons X d'un plan (111) d'un plan cristallin principal de Cu2O. Le film de câblage Cu a, de préférence, une épaisseur de film allant de 200 à 500 nm.
PCT/JP2008/063642 2007-07-31 2008-07-30 Film de câblage en cuivre WO2009017146A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2009525427A JP5360595B2 (ja) 2007-07-31 2008-07-30 Ｃｕ系配線膜
KR1020097026478A KR101088744B1 (ko) 2007-07-31 2008-07-30 Ｃｕ계 배선막
CN2008800226157A CN101689502B (zh) 2007-07-31 2008-07-30 Cu系配线膜

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2007-198939 2007-07-31
JP2007198939 2007-07-31
JP2008001374 2008-01-08
JP2008-001374 2008-01-08

Publications (1)

Publication Number Publication Date
WO2009017146A1 true WO2009017146A1 (fr) 2009-02-05

Family

ID=40304376

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/063642 WO2009017146A1 (fr) 2007-07-31 2008-07-30 Film de câblage en cuivre

Country Status (4)

Country Link
JP (2) JP5360595B2 (fr)
KR (1) KR101088744B1 (fr)
CN (1) CN101689502B (fr)
WO (1) WO2009017146A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013507782A (ja) * 2009-10-15 2013-03-04 アプライド マテリアルズ インコーポレイテッド 半導体デバイスを製造する方法および設備と半導体デバイス
JP2018512736A (ja) * 2015-04-06 2018-05-17 コーニング精密素材株式会社Corning Precision Materials Co., Ltd. 集積回路パッケージ用基板

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5039859B2 (ja) * 2010-07-14 2012-10-03 アルプス電気株式会社 入力装置及びその製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08158036A (ja) * 1994-09-30 1996-06-18 Internatl Business Mach Corp <Ibm> 基板上の薄膜における引張応力および圧縮応力ならびに機械的問題を制御するための方法および装置
JPH11204521A (ja) * 1998-01-09 1999-07-30 Toshiba Corp 半導体装置およびその製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH034214A (ja) * 1989-05-31 1991-01-10 Sharp Corp 液晶表示装置
JP2001144092A (ja) * 1999-11-15 2001-05-25 Toshiba Corp 半導体装置の製造方法
KR100379566B1 (ko) * 2000-08-30 2003-04-10 엘지.필립스 엘시디 주식회사 액정표시장치 제조방법
JP2002305198A (ja) * 2001-04-06 2002-10-18 Toshiba Corp 電子デバイスの製造方法
JP2007005628A (ja) * 2005-06-24 2007-01-11 Sharp Corp 配線構造およびその製造方法
JP2007072428A (ja) * 2005-08-09 2007-03-22 Tohoku Univ 平面電子表示装置及びその製造方法
WO2007060984A1 (fr) * 2005-11-28 2007-05-31 A.L.M.T. Corp. Meule superabrasive a liant en resine et son procede de fabrication
TWI499466B (zh) * 2007-03-22 2015-09-11 Hitachi Chemical Co Ltd 金屬微粒子與其製造方法以及金屬微粒子分散液與其製造方法
US10231344B2 (en) * 2007-05-18 2019-03-12 Applied Nanotech Holdings, Inc. Metallic ink

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08158036A (ja) * 1994-09-30 1996-06-18 Internatl Business Mach Corp <Ibm> 基板上の薄膜における引張応力および圧縮応力ならびに機械的問題を制御するための方法および装置
JPH11204521A (ja) * 1998-01-09 1999-07-30 Toshiba Corp 半導体装置およびその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013507782A (ja) * 2009-10-15 2013-03-04 アプライド マテリアルズ インコーポレイテッド 半導体デバイスを製造する方法および設備と半導体デバイス
JP2018512736A (ja) * 2015-04-06 2018-05-17 コーニング精密素材株式会社Corning Precision Materials Co., Ltd. 集積回路パッケージ用基板

Also Published As

Publication number Publication date
JP5360595B2 (ja) 2013-12-04
KR20100009640A (ko) 2010-01-28
JP5656135B2 (ja) 2015-01-21
JPWO2009017146A1 (ja) 2010-10-21
CN101689502A (zh) 2010-03-31
CN101689502B (zh) 2011-09-28
JP2014059559A (ja) 2014-04-03
KR101088744B1 (ko) 2011-12-01

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