WO2009011023A1 - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

Info

Publication number
WO2009011023A1
WO2009011023A1 PCT/JP2007/064021 JP2007064021W WO2009011023A1 WO 2009011023 A1 WO2009011023 A1 WO 2009011023A1 JP 2007064021 W JP2007064021 W JP 2007064021W WO 2009011023 A1 WO2009011023 A1 WO 2009011023A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
wiring board
manufacturing
groove portion
base
Prior art date
Application number
PCT/JP2007/064021
Other languages
English (en)
French (fr)
Inventor
Michimasa Takahashi
Masakazu Aoyama
Original Assignee
Ibiden Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co., Ltd. filed Critical Ibiden Co., Ltd.
Priority to CN200780100601A priority Critical patent/CN101803482A/zh
Priority to EP07790801A priority patent/EP2173146A1/en
Priority to PCT/JP2007/064021 priority patent/WO2009011023A1/ja
Priority to JP2009523463A priority patent/JP4834157B2/ja
Publication of WO2009011023A1 publication Critical patent/WO2009011023A1/ja

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4688Composite multilayer circuits, i.e. comprising insulating layers having different properties
    • H05K3/4691Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/0353Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/0353Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0373Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement containing additives, e.g. fillers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0183Dielectric layers
    • H05K2201/0187Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203Fillers and particles
    • H05K2201/0206Materials
    • H05K2201/0209Inorganic, non-metallic particles
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/0909Preformed cutting or breaking line
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/0959Plated through-holes or plated blind vias filled with insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/095Conductive through-holes or vias
    • H05K2201/096Vertically aligned vias, holes or stacked vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1536Temporarily stacked PCBs
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4602Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

 配線基板19は、第1基板1と、第1基板1より実装面積が小さい第2基板2と、第1基板1と第2基板2との間に設けられているベース基板3と、を積層して構成され、外周の少なくとも一部の厚みが、中央部よりも薄く形成される。ベース基板3は、無機フィラー配合樹脂を含んで構成される。第1基板1及び前記第2基板2は、可撓性樹脂を含んで構成される。第1基板1と第2基板2とにはヴィア44が設けられている。第1基板1と第2基板2との間には層間溝部11が設けられている。層間溝部11には気体等が充填されている。
PCT/JP2007/064021 2007-07-13 2007-07-13 配線基板及びその製造方法 WO2009011023A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN200780100601A CN101803482A (zh) 2007-07-13 2007-07-13 布线基板及其制造方法
EP07790801A EP2173146A1 (en) 2007-07-13 2007-07-13 Wiring board and manufacturing method thereof
PCT/JP2007/064021 WO2009011023A1 (ja) 2007-07-13 2007-07-13 配線基板及びその製造方法
JP2009523463A JP4834157B2 (ja) 2007-07-13 2007-07-13 配線基板及びその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/064021 WO2009011023A1 (ja) 2007-07-13 2007-07-13 配線基板及びその製造方法

Publications (1)

Publication Number Publication Date
WO2009011023A1 true WO2009011023A1 (ja) 2009-01-22

Family

ID=40259372

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/064021 WO2009011023A1 (ja) 2007-07-13 2007-07-13 配線基板及びその製造方法

Country Status (4)

Country Link
EP (1) EP2173146A1 (ja)
JP (1) JP4834157B2 (ja)
CN (1) CN101803482A (ja)
WO (1) WO2009011023A1 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2866535B1 (en) * 2012-06-22 2019-09-04 Nikon Corporation Substrate, imaging unit and imaging device
CN108882562B (zh) * 2017-05-10 2020-11-10 欣兴电子股份有限公司 线路板单元与其制作方法
CN113194619B (zh) * 2021-04-09 2022-08-26 东莞市多普光电设备有限公司 一种印刷电路板的生产工艺

Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05152693A (ja) 1991-11-30 1993-06-18 Nitto Denko Corp 補強部付フレキシブルプリント基板およびその製法
JPH1174651A (ja) * 1997-03-13 1999-03-16 Ibiden Co Ltd プリント配線板及びその製造方法
JPH11172457A (ja) * 1997-12-05 1999-06-29 Ibiden Co Ltd 無電解めっき用接着剤および多層プリント配線板
JP2000013019A (ja) * 1998-06-23 2000-01-14 Sharp Corp ビルトアップ多層プリント配線板およびその製造方法
JP2002064271A (ja) * 2000-06-09 2002-02-28 Matsushita Electric Ind Co Ltd 複合配線基板及びその製造方法
JP2005079402A (ja) * 2003-09-01 2005-03-24 Fujikura Ltd 回路基板およびその製造方法
JP2005236205A (ja) * 2004-02-23 2005-09-02 Sharp Corp 多層プリント配線板の製造方法及び多層プリント配線板
JP2005268505A (ja) * 2004-03-18 2005-09-29 Fujikura Ltd 多層配線板およびその製造方法
JP2005336287A (ja) * 2004-05-26 2005-12-08 Matsushita Electric Works Ltd フレキシブルプリント配線板用熱硬化性接着シート、その製造方法及びそれを用いた多層フレキシブルプリント配線板並びにフレックスリジッドプリント配線板
JP2006032830A (ja) 2004-07-21 2006-02-02 Fujikura Ltd 部分ビルドアップ配線板の製造方法
JP2006114741A (ja) * 2004-10-15 2006-04-27 Ibiden Co Ltd 多層コア基板及びその製造方法
JP2006202891A (ja) * 2005-01-19 2006-08-03 Fujikura Ltd リジッドフレックスプリント配線板の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004266238A (ja) * 2003-01-09 2004-09-24 Sony Chem Corp 複合配線板、基板素片
JP2005064357A (ja) * 2003-08-19 2005-03-10 Fujikura Ltd 多層配線板およびその製造方法

Patent Citations (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05152693A (ja) 1991-11-30 1993-06-18 Nitto Denko Corp 補強部付フレキシブルプリント基板およびその製法
JPH1174651A (ja) * 1997-03-13 1999-03-16 Ibiden Co Ltd プリント配線板及びその製造方法
JPH11172457A (ja) * 1997-12-05 1999-06-29 Ibiden Co Ltd 無電解めっき用接着剤および多層プリント配線板
JP2000013019A (ja) * 1998-06-23 2000-01-14 Sharp Corp ビルトアップ多層プリント配線板およびその製造方法
JP2002064271A (ja) * 2000-06-09 2002-02-28 Matsushita Electric Ind Co Ltd 複合配線基板及びその製造方法
JP2005079402A (ja) * 2003-09-01 2005-03-24 Fujikura Ltd 回路基板およびその製造方法
JP2005236205A (ja) * 2004-02-23 2005-09-02 Sharp Corp 多層プリント配線板の製造方法及び多層プリント配線板
JP2005268505A (ja) * 2004-03-18 2005-09-29 Fujikura Ltd 多層配線板およびその製造方法
JP2005336287A (ja) * 2004-05-26 2005-12-08 Matsushita Electric Works Ltd フレキシブルプリント配線板用熱硬化性接着シート、その製造方法及びそれを用いた多層フレキシブルプリント配線板並びにフレックスリジッドプリント配線板
JP2006032830A (ja) 2004-07-21 2006-02-02 Fujikura Ltd 部分ビルドアップ配線板の製造方法
JP2006114741A (ja) * 2004-10-15 2006-04-27 Ibiden Co Ltd 多層コア基板及びその製造方法
JP2006202891A (ja) * 2005-01-19 2006-08-03 Fujikura Ltd リジッドフレックスプリント配線板の製造方法

Also Published As

Publication number Publication date
CN101803482A (zh) 2010-08-11
JPWO2009011023A1 (ja) 2010-09-09
JP4834157B2 (ja) 2011-12-14
EP2173146A1 (en) 2010-04-07

Similar Documents

Publication Publication Date Title
WO2009072531A1 (ja) キャビティー部を有する多層配線基板
TW200737380A (en) Multilayer interconnection substrate, semiconductor device, and solder resist
WO2008117383A1 (ja) 電子装置、電子装置が実装された電子機器、電子装置が装着された物品、および電子装置の製造方法
EP1881751A4 (en) CERAMIC MULTILAYER PLATE
WO2008146487A1 (ja) 回路基板およびその製造方法
TWI266396B (en) Semiconductor device
EP1484952A4 (en) MULTILAYER CONDUCTOR PLATE, BASE FOR A MULTIPLE PCB, PRINTED PCB AND METHOD FOR THE PRODUCTION THEREOF
TW200730062A (en) Multilayered wiring substrate and method of manufacturing the same
TW200634999A (en) Multilayer wiring board and its manufacturing method
TW200721932A (en) Adhesion assisting agent-bearing metal foil, printed wiring board, and production method of printed wiring board
WO2008021791A3 (en) Nano structured phased hydrophobic layers on substrates
TW200720090A (en) Laminated film having gas barrier characteristics
TW200731537A (en) Semiconductor device and manufacturing method thereof
MY146044A (en) Prepreg, method for manufacturing prepreg, substrate, and semiconductor device
TW200614886A (en) Wiring substrate and semiconductor device using the same
TW200833200A (en) Wiring board and method of manufacturing the same
WO2008096540A1 (ja) 積層体、積層体を含む回路基板、半導体パッケージおよび積層体の製造方法
WO2007075648A3 (en) Component stacking for integrated circuit electronic package
WO2008129815A1 (ja) キャリア付きプリプレグおよびその製造方法、多層プリント配線板、ならびに半導体装置
TW200740327A (en) Multilayer wiring board, and electronic module and electronics device incorporating the same
TW200702189A (en) Method of manufacturing multi-layered substrate
WO2009061886A3 (en) Tensile strained ge for electronic and optoelectronic applications
WO2009051239A1 (ja) 配線基板、実装構造体、並びに配線基板の製造方法
TW200635472A (en) Multilayered printed circuit board
WO2008073409A3 (en) Composite organic encapsulants

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200780100601.8

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07790801

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2009523463

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 2007790801

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: DE