WO2008107996A1 - 試験装置 - Google Patents

試験装置 Download PDF

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Publication number
WO2008107996A1
WO2008107996A1 PCT/JP2007/054573 JP2007054573W WO2008107996A1 WO 2008107996 A1 WO2008107996 A1 WO 2008107996A1 JP 2007054573 W JP2007054573 W JP 2007054573W WO 2008107996 A1 WO2008107996 A1 WO 2008107996A1
Authority
WO
WIPO (PCT)
Prior art keywords
faulty cells
memory
block
memory bank
fault count
Prior art date
Application number
PCT/JP2007/054573
Other languages
English (en)
French (fr)
Inventor
Masaru Doi
Shinya Sato
Original Assignee
Advantest Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corporation filed Critical Advantest Corporation
Priority to CN200780052065A priority Critical patent/CN101627445A/zh
Priority to JP2007541555A priority patent/JPWO2008107996A1/ja
Priority to PCT/JP2007/054573 priority patent/WO2008107996A1/ja
Priority to KR1020097017761A priority patent/KR101015488B1/ko
Priority to TW097107830A priority patent/TWI361437B/zh
Publication of WO2008107996A1 publication Critical patent/WO2008107996A1/ja

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G11C29/4401—Indication or identification of errors, e.g. for repair for self repair
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C2029/1208—Error catch memory

Landscapes

  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

　メモリバンク毎かつブロック毎に、不良セルの数を記憶する不良カウントメモリと、メモリバンク毎に、試験対象ブロック内で検出された不良セルの数を記憶する不良カウントレジスタと、各メモリバンクから試験対象ブロック内の一部のページずつを順次読み出すメモリ読出部と、メモリ読出部により各ページから読み出されたデータを期待値と比較した結果に基づいて、各ページ内の不良セルを検出する検出部と、不良セルが検出されたページを含むメモリバンクに対応する不良カウントレジスタの値を、検出された不良セルの数分増加させる不良カウント部と、試験対象ブロック内の各ページの不良検出を終えたメモリバンクに対応して不良カウントレジスタに記憶された不良セルの数を、不良カウントメモリ中における当該メモリバンクの当該試験対象ブロックに対応する記憶領域に書き込む書込部とを備える試験装置を提供する。
PCT/JP2007/054573 2007-03-08 2007-03-08 試験装置 WO2008107996A1 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
CN200780052065A CN101627445A (zh) 2007-03-08 2007-03-08 测试装置
JP2007541555A JPWO2008107996A1 (ja) 2007-03-08 2007-03-08 試験装置
PCT/JP2007/054573 WO2008107996A1 (ja) 2007-03-08 2007-03-08 試験装置
KR1020097017761A KR101015488B1 (ko) 2007-03-08 2007-03-08 시험 장치
TW097107830A TWI361437B (en) 2007-03-08 2008-03-06 Test apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/054573 WO2008107996A1 (ja) 2007-03-08 2007-03-08 試験装置

Publications (1)

Publication Number Publication Date
WO2008107996A1 true WO2008107996A1 (ja) 2008-09-12

Family

ID=39737901

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/054573 WO2008107996A1 (ja) 2007-03-08 2007-03-08 試験装置

Country Status (5)

Country Link
JP (1) JPWO2008107996A1 (ja)
KR (1) KR101015488B1 (ja)
CN (1) CN101627445A (ja)
TW (1) TWI361437B (ja)
WO (1) WO2008107996A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4889792B2 (ja) * 2007-11-14 2012-03-07 株式会社アドバンテスト 試験装置

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101312348B1 (ko) * 2009-03-10 2013-09-27 가부시키가이샤 어드밴티스트 시험 장치 및 시험 방법
TWI401691B (zh) * 2009-03-20 2013-07-11 Phison Electronics Corp 具快閃記憶體測試功能的控制器及其儲存系統與測試方法
JP2013007710A (ja) * 2011-06-27 2013-01-10 Advantest Corp 試験装置および試験方法
KR20150006167A (ko) 2013-07-08 2015-01-16 에스케이하이닉스 주식회사 반도체 시스템 및 그 리페어 방법
KR101980689B1 (ko) 2017-02-14 2019-05-22 주식회사 투엔 배송 중개서비스를 위한 역경매 기반 배송비 산정 방법
CN108121628B (zh) * 2017-12-19 2021-01-05 珠海市君天电子科技有限公司 一种读写速度的测试方法、装置及电子设备

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0933615A (ja) * 1995-07-19 1997-02-07 Advantest Corp 半導体メモリ試験装置のメモリ不良解析装置
JPH11102598A (ja) * 1997-09-29 1999-04-13 Toshiba Corp メモリ不良救済解析装置
JP2001014890A (ja) * 1999-06-30 2001-01-19 Mitsubishi Electric Corp 半導体装置および半導体装置のテスト方法
JP2001319493A (ja) * 2000-05-02 2001-11-16 Advantest Corp メモリ試験方法・メモリ試験装置
JP2003228997A (ja) * 2002-02-05 2003-08-15 Mitsubishi Electric Corp 半導体記憶装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4119417B2 (ja) 2004-11-15 2008-07-16 株式会社アドバンテスト 試験装置及び試験方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0933615A (ja) * 1995-07-19 1997-02-07 Advantest Corp 半導体メモリ試験装置のメモリ不良解析装置
JPH11102598A (ja) * 1997-09-29 1999-04-13 Toshiba Corp メモリ不良救済解析装置
JP2001014890A (ja) * 1999-06-30 2001-01-19 Mitsubishi Electric Corp 半導体装置および半導体装置のテスト方法
JP2001319493A (ja) * 2000-05-02 2001-11-16 Advantest Corp メモリ試験方法・メモリ試験装置
JP2003228997A (ja) * 2002-02-05 2003-08-15 Mitsubishi Electric Corp 半導体記憶装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4889792B2 (ja) * 2007-11-14 2012-03-07 株式会社アドバンテスト 試験装置

Also Published As

Publication number Publication date
CN101627445A (zh) 2010-01-13
KR101015488B1 (ko) 2011-02-22
KR20100004983A (ko) 2010-01-13
JPWO2008107996A1 (ja) 2010-06-10
TW200903506A (en) 2009-01-16
TWI361437B (en) 2012-04-01

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