WO2008029579A1 - Tranche de silicium monocristallin et procédé de fabrication associé - Google Patents

Tranche de silicium monocristallin et procédé de fabrication associé Download PDF

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Publication number
WO2008029579A1
WO2008029579A1 PCT/JP2007/065230 JP2007065230W WO2008029579A1 WO 2008029579 A1 WO2008029579 A1 WO 2008029579A1 JP 2007065230 W JP2007065230 W JP 2007065230W WO 2008029579 A1 WO2008029579 A1 WO 2008029579A1
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Prior art keywords
wafer
silicon single
single crystal
heat treatment
region
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PCT/JP2007/065230
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English (en)
Japanese (ja)
Inventor
Ryoji Hoshi
Izumi Fusegawa
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Shin-Etsu Handotai Co., Ltd.
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Publication of WO2008029579A1 publication Critical patent/WO2008029579A1/fr

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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B15/00—Single-crystal growth by pulling from a melt, e.g. Czochralski method
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering

Definitions

  • the present invention relates to a silicon single crystal wafer used as a substrate for a semiconductor device such as a memory or a CPU, and a method for manufacturing the silicon single crystal wafer.
  • the surface layer used in the most advanced field has a defect-free silicon.
  • the present invention relates to a method for producing a single crystal wafer and a silicon single crystal wafer.
  • V vacancy-type point defects
  • Si interstitial silicon
  • the V region is a vacancy, that is, a region having many recesses and holes generated due to a shortage of silicon atoms, and the I region is due to the presence of extra silicon atoms.
  • This is a region where there are many dislocations and excess lumps of silicon atoms, and there is no shortage or excess of atoms between the V region and the I region (neutral region, hereinafter N It may be abbreviated as “region”.
  • the grow-in defects FPD, LSTD, COP, etc.
  • the concentration of both point defects is determined by the relationship between the crystal pulling rate (growth rate) in the CZ method and the temperature gradient G in the vicinity of the solid-liquid interface in the crystal.
  • the N region between the V region and the I region contains OSF (oxidation induced stacking fault, Oxidation Indused
  • the I-rich area the area where these defects exist is called the I-rich area. Furthermore, when the growth rate is reduced to about 0.4 mm / min or less, the OSF ring aggregates and disappears at the center of the wafer, resulting in a full-area SI -rich region.
  • these N regions exist obliquely with respect to the growth axis direction when the growth rate is lowered, and therefore exist only in a part of the wafer plane.
  • the Boronkov theory (V.V.Voron Voronkov Journal of Crystal Growth, 59 (1982) 625-643) is the ratio of the pulling rate (F) and the temperature gradient (G) in the axial direction of the crystal solid-liquid interface.
  • F pulling rate
  • G temperature gradient
  • Parameters determine the total density of point defects Chanting.
  • the pulling speed should be constant in the plane, so that G has a distribution in the plane.For example, at a certain pulling speed, the center is the V-rich region and the N- region is sandwiched around it. I was able to obtain only crystals that would be rich regions.
  • the in-reactor structure of the crystal growth apparatus has a narrow control range of the pulling rate that becomes the N region. Since the (hot zone: HZ) is also limited, it was difficult to stably expand the N region in the axial direction of the crystal.
  • Japanese Patent Application Laid-Open No. 2000-53497 discloses that doping the nitrogen expands the N-region, and the N region can be easily and easily controlled. A method for improving the controllability of the N region using the characteristics of the above is disclosed. In addition, wafers cut out from the N-region obtained in this way have been reported to have high non-defective rates such as TZD Brime Zero Dielectric Breakdown) and TDDB fime Dependent Dielec trie Breakdown). S, the inventors have tried again As a result, it was found that even if TZDB is actually good, TDDB failure may occur.
  • the present invention has been made in view of the above problems, and has excellent TZDB characteristics and TDDB characteristics in the wafer surface layer region, which is a device fabrication region, and a small variation in BMD density in the wafer surface.
  • An object of the present invention is to provide a silicon single crystal wafer and a method for producing the silicon single crystal wafer.
  • the aim is to provide a silicon single crystal wafer having excellent IG capability, in which a uniform and sufficient BMD is formed in the wafer haulta region.
  • the present invention provides a silicon single crystal wafer grown by the Chiyoklarsky method, which is doped with nitrogen and has an entire N region, and has TZDB characteristics and Non-defective product ratio of TDDB characteristics is 90% or more, and the ratio (maximum value / minimum value) of maximum and minimum BMD density in wafer plane after gettering heat treatment or device heat treatment is 50 times or less.
  • a silicon single crystal wafer characterized by the above is provided.
  • the silicon single crystal wafer of the present invention is doped with nitrogen and the entire surface of the wafer is in the N region, and the non-defective rate of both the TZDB characteristic and the TDDB characteristic is 90% or more.
  • the ratio of maximum and minimum BMD density (maximum value / minimum value) in the wafer surface after gettering heat treatment or device heat treatment is 50 times or less. There is no crystal defect and the oxide breakdown voltage characteristics are extremely excellent.Although it is in the N region, the variation in the BMD density in the wafer surface after gettering heat treatment or device heat treatment is small and uniform, and the wafer is deformed by heat treatment. This is a silicon single crystal wafer that can effectively prevent the above.
  • the non-defective product ratio of the TZDB characteristic and the TDDB characteristic is the cell formed in the wafer. In the following, this is simply expressed as the non-defective product rate for the TZDB and TDDB characteristics.
  • the silicon single crystal wafer has an oxygen concentration of 8 ppma or more and less than 13 ppma (JEI DA)! /.
  • the oxygen concentration is 8 ppma or higher
  • the BMD inside the wafer can be made sufficiently dense by heat treatment such as a device manufacturing process, and a silicon single crystal wafer having gettering capability is obtained. If it is less than 13 ppma (JEIDA), not only the TZDB characteristics but also the TDDB characteristics can be more than 90% acceptable.
  • the doped nitrogen concentration is 5 ⁇ 10 U atoms / cm 3 or more and 3 ⁇ 10 13 atoms / cm 3 or less! /.
  • the doped nitrogen concentration is 5 ⁇ 10 U atoms / cm 3 or more
  • the precipitation of oxygen is promoted in the heat treatment such as the device manufacturing process, and the BMD inside the wafer can be made to have a sufficient density. It is possible to make a silicon single crystal wafer with gettering capability, and if it is 3 X 10 13 atoms / cm 3 or less, not only the TZDB characteristics but also the TDDB characteristics are more reliable. It can be over 90%.
  • the BMD density inside the wafer after the gettering heat treatment or device heat treatment is 1 ⁇ 10 7 pieces / cm 3 or more.
  • the BMD density inside the wafer after gettering heat treatment or device heat treatment is 1 ⁇ 10 7 pieces / cm 3 or more, silicon having sufficient BMD density and high gettering ability It can be a single crystal wafer.
  • the gettering heat treatment is a general term for heat treatment performed after the grown silicon single crystal rod is added to the wafer and before entering the device process. This is a generic term for heat treatment performed in the device manufacturing process or simulation heat treatment that simplifies it regardless of the presence or absence of gettering heat treatment and other treatments.
  • the oxygen precipitate on the surface layer of the wafer is heated by heat treatment, and the melting force is accelerated.
  • Nitrogen-doped crystals work with nitrogen force Vacancy to promote oxygen precipitation . For this reason, oxygen precipitate nuclei are formed during crystal growth, and oxygen precipitates may be formed depending on the conditions. When the wafer is cut out from the crystal, if this oxygen precipitate appears on the surface, the electrical characteristics may be degraded. For this reason, by applying heat treatment, oxygen precipitates on the surface layer can be dissolved and a wafer with higher quality can be obtained.
  • a silicon single crystal when a silicon single crystal is grown by the Tyoklalsky method, nitrogen having a concentration of 5 X 1 oHatoms / cm 3 or more and 3 X 10 13 atoms / cm 3 or less, 8 ppma or more and 13 p pma
  • nitrogen having a concentration of 5 X 1 oHatoms / cm 3 or more and 3 X 10 13 atoms / cm 3 or less, 8 ppma or more and 13 p pma Provided is a method for producing a silicon single crystal wafer, characterized in that it is pulled up under the condition that the entire crystal surface becomes an N-region while doping oxygen at a concentration of less than (JEIDA).
  • the silicon single crystal wafer obtained from this silicon single crystal may have the above nitrogen concentration and oxygen concentration if it is pulled up under the condition that the entire surface of the crystal becomes N-region while doping oxygen at a concentration of (JEIDA). it can.
  • a silicon single crystal wafer having a high density BMD inside the wafer and sufficient gettering ability after the gettering heat treatment and device heat treatment can be obtained.
  • there is no crystal defects in the surface layer region. Excellent TZDB and TDDB characteristics. BMD density variation in the wafer surface is small and uniform, so a silicon single crystal wafer with reduced deformation is obtained. Is possible.
  • the silicon single crystal wafer obtained by the above method can be subjected to heat treatment at 1000 to 1300 ° C. for 10 seconds to 1 hour to dissolve oxygen precipitates on the surface layer of the wafer.
  • heat treatment 1000 to 1300 ° C. for 10 seconds to 1 hour to dissolve oxygen precipitates on the surface layer of the wafer.
  • the heat treatment is preferably performed by a rapid heating / rapid cooling device.
  • the heat treatment is performed by a rapid heating / rapid cooling device (hereinafter, referred to as an RTA (Rapid Therma 1 Anneler) device) in a range of several to several hundred seconds of wafers (for example, several times from the wafer surface).
  • RTA Rapid Therma 1 Anneler
  • nm to tens of nm can be dissolved to a level where there is no problem with the oxide film breakdown voltage characteristics, so that a long-lasting thermal history with many harmful effects can be eliminated. It is possible to perform an effective heat treatment in a short time of several seconds to several hundred seconds without giving.
  • the silicon single crystal wafer of the present invention and the silicon single crystal wafer manufacturing method have high quality with both excellent TZDB characteristics and TDDB characteristics, and the entire surface of the wafer is a device in the wafer surface region. Although it is an N-region that does not generate crystal defects that degrade device characteristics when present in the active layer, it is easy to generate BMD inside the device relatively uniformly, which can prevent metal contamination that occurs during device formation. It is possible to provide a silicon single crystal wafer that can be used.
  • FIG. 1 is a conceptual diagram schematically showing a silicon single crystal wafer according to the present invention.
  • FIG. 2 is a schematic view showing an example of a single crystal pulling apparatus that can be used in the method for producing a silicon single crystal wafer of the present invention.
  • FIG. 3 is a schematic view showing an example of an RTA apparatus that can be used in the method for producing a silicon single crystal wafer of the present invention.
  • FIG. 4 is a graph showing the results of nitrogen concentration, oxygen concentration, and TDDB characteristics in silicon single crystal wafers of examples, comparative examples, and reference examples.
  • Japanese Patent Application Laid-Open No. 2005-159028 discloses that a silicon wafer produced from a silicon single crystal grown by the CZ method is subjected to heat treatment.
  • the entire wafer surface is an N region, and the wafer surface is
  • the yield rate of the oxide film withstand voltage at least up to 5 m is 95% or more, and the ratio of the maximum and minimum BMD density inside the wafer (maximum / minimum) is Annie Rueno, characterized in that it is 1 to 10, and its production method are disclosed!
  • the evaluation of the oxide film breakdown voltage characteristic in JP 2005-159028 A is only the TZDB characteristic, the TDDB characteristic is not evaluated, and the manufacturing method described in the examples Thus, the present inventors have found that the non-defective product ratio of the TDDB characteristic cannot satisfy 90%.
  • the present inventors have conducted extensive research on silicon single crystal wafers with respect to oxide film breakdown voltage characteristics, particularly TDDB characteristics, and as described above, as described above, the above-mentioned JP-A-2000-53497
  • the conventional methods such as JP 2005-159028 and JP 11-195565 only ensure wafers with excellent quality such that the non-defective product ratio of both TZDB characteristics and TDDB characteristics is 90% or more. Found that I can not get.
  • the maximum / minimum BMD density in the wafer plane is 50 times or less, the variation in BMD density is sufficiently suppressed, and deformation of the wafer during heat treatment etc. is suppressed, warping, etc.
  • the present invention has been completed by discovering that it can be effectively prevented.
  • the inventors of the present invention have found that the range of the oxygen concentration and the nitrogen concentration for doping the silicon single crystal wafer (silicon single crystal) is particularly important.
  • FIG. 1 schematically shows an example of the silicon single crystal wafer of the present invention.
  • the silicon single crystal wafer 21 of the present invention shown in FIG. 1 is produced by slicing a silicon single crystal grown by the Tjoklarsky method. This silicon single crystal wafer 21 is nitrogen-doped, and the entire surface of the wafer is an N-region. Further, heat treatment is performed, and oxygen precipitates in the wafer surface layer region 22 are dissolved.
  • the silicon single crystal wafer 21 of the present invention has a particularly high concentration of the doped nitrogen.
  • the nitrogen concentration is 3 ⁇ 10 13 at oms / cm 3 or less.
  • the yield rate of both TZDB characteristics and TDDB characteristics can be more reliably 90% or higher, and extremely excellent oxidation Even if a device is fabricated in the wafer surface layer region 22, the device can be made to be a wafer without degrading the device characteristics.
  • the nitrogen concentration in the silicon single crystal wafer 21 is preferably 5 X 10 U atoms / cm 3 or more. By setting such a concentration range, after the gettering heat treatment or the device heat treatment, the BMD density becomes sufficient inside the wafer, and a silicon single crystal wafer having gettering ability can be obtained.
  • the BMD density inside the wafer can be 1 X 10 7 pieces / cm 3 or more.
  • a wafer having such a relatively high density BMD can be provided with higher gettering capability.
  • the upper limit of the BMD density inside the wafer is not particularly limited as long as appropriate gettering capability is obtained.
  • the oxygen concentration is desirably 8 ppma or more and less than 13 ppma (JEIDA), and as described above, it has sufficient BMD density and gettering ability after gettering heat treatment.
  • the quality rate of both TZDB characteristics and TDDB characteristics is 90% or higher, and the quality is excellent.
  • BMD24 is uniformly formed in the wafer plane, and the density variation of BMD24 is small.
  • (maximum value / minimum value) may be 30 times or less. Therefore, an excellent silicon single crystal wafer having uniform gettering ability with small variations in the wafer plane in the Balta region can be obtained.
  • the density distribution of the BMD 24 is uniform, deformation such as wafer warping caused by this density variation can be effectively prevented.
  • BMD should be measured by infrared tomography (LST) after heat treatment simulating the device process for a total of 20 hours centered at 800 ° C, for example, between 750 ° C and 950 ° C. I can do it.
  • the measurement position at this time is, for example, an area of about 50 to 180 m from the surface, with a depth of about 10 mm from the edge to the center at 10 mm intervals.
  • the non-defective product ratio of the TZDB is, for example, an oxide film withstand voltage of room temperature under the condition of an oxide film thickness of 25 nm, a gate area of 8 mm 2 , and a judgment current value of ImA / cm 3. 8
  • the percentage of non-defective products of TDDB is, for example, the ratio of the gate oxide film thickness of 25 nm, the gate area of 4 mm, the stress current value of 0.01 A / cm 2 , and the oxide film breakdown voltage of 5 C / cm 2 or more at room temperature. Indicates.
  • heat treatment may be applied to the wafer to dissolve the oxygen precipitates on the wafer surface layer.
  • the BMD 24 having a sufficient and uniform density in the Balta region 23 is obtained. For this reason, uniform gettering ability can be provided within the wafer plane, and deformation such as warpage is very unlikely to occur in the wafer.
  • the silicon single crystal wafer 21 of the present invention as described above can be obtained, for example, by a method for producing a silicon single crystal wafer of the present invention described later. Hereinafter, an example of the manufacturing method will be described in detail.
  • a single crystal pulling apparatus 18 shown in FIG. 2 includes a crucible 5 and 6 for containing a raw material melt 4, a heater 7 for heating and melting a polycrystalline silicon raw material, and the like provided in the main chamber 1.
  • a pulling mechanism (not shown) for pulling up the grown single crystal is provided on the upper portion of the pulling chamber 2 continuously provided on the main chamber 1.
  • a pulling wire 16 is unwound from a pulling mechanism attached to the upper part of the pulling chamber 2, and a seed holder and a seed crystal 17 are attached to the tip of the pulling wire 16.
  • the single crystal rod 3 is formed under the seed crystal 17 by dipping in the liquid 4 and winding the bow I raising wire 16 by the pulling mechanism.
  • the crucibles 5 and 6 are composed of a quartz crucible 5 on the inside and a graphite crucible 6 for supporting the quartz crucible 5 on the outside. These crucibles 5 and 6 are supported by a crucible rotating shaft that can be rotated and raised by a rotation drive mechanism (not shown) attached to the lower portion of the single crystal pulling device 18.
  • a heat insulating member 8 is provided outside the heater 7 disposed around the crucibles 5 and 6.
  • a gas inlet 10 and a gas outlet 9 are provided in the chambers 1 and 2 so that argon gas or the like can be introduced into the chambers 1 and 2 and discharged.
  • the cooling cylinder 11 extends from at least the ceiling of the main chamber 1 toward the raw material melt surface so as to surround the single crystal rod 3 being pulled up.
  • the cooling medium is introduced from the cooling medium inlet 12 to forcibly cool the cooling cylinder 11, and the single crystal rod 3 is cooled by blocking the radiant heat from the heater 7 between the vicinity of the melt surface and the cooling cylinder 11.
  • a cooling auxiliary member 13 and a heat shield member 14 are provided.
  • a protective cover 15 is provided to prevent the raw material melt 4 that may be scattered when the raw material melts from adhering to the cooling cylinder 11.
  • the single crystal pulling apparatus that can be used in the production method of the present invention can be the same as the conventional one.
  • a magnet (not shown) can be installed outside the main chamber 1 in the horizontal direction, so that a magnetic field in the horizontal direction or the vertical direction is applied to the raw material melt 4 to convect the raw material melt.
  • This is a single crystal pulling device using the so-called MCZ method that suppresses and stabilizes the growth of single crystals.
  • FIG. 3 shows an example of an apparatus that can rapidly heat and cool a silicon single crystal wafer obtained by slicing a silicon single crystal obtained by the single crystal pulling apparatus.
  • the rapid heating / rapid cooling apparatus 32 shown in FIG. 3 has a chamber 33 made of quartz, and heats the silicon single crystal wafer 31 in the chamber 33. Heating is performed by a heating lamp 34 arranged so as to surround the chamber 33 from above, below, left and right.
  • the heating lamps 34 can control the power supplied independently.
  • an auto shutter 35 is provided to seal off the outside air!
  • the auto-shutter 35 is provided with a wafer inlet (not shown) configured to be opened and closed by a gate valve.
  • the auto shutter 35 is provided with a gas exhaust port 30 so that the furnace atmosphere can be adjusted.
  • the silicon single crystal wafer 31 is arranged on a three-point support portion 37 formed on the quartz tray 36.
  • a quartz buffer 38 is provided on the gas inlet side of the tray 36 to prevent the introduced gas from directly hitting the silicon single crystal wafer 31.
  • the chamber 33 is provided with a temperature measurement special window (not shown), and a silicon single crystal is passed through the special window by a pie meter 39 installed outside the chamber 33.
  • the temperature of wafer 31 can be measured.
  • the RTA apparatus that can be used in the present invention can be the same as the conventional one.
  • the N region can be expanded and the N region can be obtained easily and easily by controlling the growth conditions of the single crystal.
  • nitride is put in a quartz crucible in advance, the force for introducing nitride into the silicon melt, the atmosphere gas is an atmosphere containing nitrogen, etc., and the amount of nitride or nitrogen
  • the amount of doping in the crystal can be controlled, and doping can be performed within the above range.
  • the oxygen concentration in the silicon single crystal can be doped within the above range.
  • a magnetic field may be applied to the silicon melt when growing the crystal by the CZ method.
  • the inside of the wafer is The density of the formed BMD can be made 1 ⁇ 10 7 pieces / cm 3 or more, and the power S can be used to produce a silicon single crystal as a wafer with sufficient gettering ability.
  • the BMD density inside the wafer becomes 1 X 10 7 pieces / cm 3 or more after gettering heat treatment, etc., and the gettering capability is sufficient.
  • the silicon single crystal wafers that can be used as wafers can be obtained, and by making it less than 13 ppma (JEIDA), not only the TZDB characteristics but also the TDDB characteristics are excellent quality silicon with a yield rate of 90% or more.
  • a BMD density of 1 ⁇ 10 7 pieces / cm 3 or more is obtained at any location in the wafer plane after the gettering heat treatment or the like. Therefore, it is possible to manufacture a silicon single crystal wafer whose ratio between the maximum value and the minimum value is 50 times or less, and further 30 times or less. As described above, since the variation in the BMD density in the wafer surface is extremely small, an excellent silicon single crystal wafer having uniform gettering ability can be obtained. It is possible to make a silicon single crystal wafer that can effectively prevent the occurrence of deformation.
  • the atmosphere for the heat treatment can prevent the surface of the wafer from being roughened if nitrogen and / or oxygen gas is contained in addition to argon and / or hydrogen gas.
  • the wafer diameter is not particularly limited.
  • a wafer having a large diameter of 200 mm or more, further 300 mm or more can be supported. Therefore, it is possible to meet the demand for larger diameters in recent years, and to obtain a silicon single crystal wafer having uniform in-plane characteristics.
  • Example:! ⁇ 7 Using the single crystal pulling device shown in Fig. 2, a raw material polycrystalline silicon and a silicon wafer with a nitride film were charged into a quartz crucible with a diameter of 24 inches (60 cm), and a silicon single crystal with a diameter of 8 inches (200 mm) was pulled. The nitrogen concentration to be doped was controlled by the thickness of the nitride film. The crucible can be moved up and down in the direction of the crystal growth axis, and the crucible is raised to compensate for the lowering of the raw material melt that has decreased during crystal growth, while maintaining the height of the melt surface at a single crystal. Was raised.
  • the entire surface of the crystal becomes an N-region, and the nitrogen concentration and oxygen concentration doped in the silicon single crystal to be grown are controlled, so that the grown silicon single crystal is
  • the silicon single crystal wafers of the present invention having different nitrogen and oxygen concentrations were obtained by slicing. Table 1 shows the oxygen concentration, nitrogen concentration, TDDB characteristics, and BMD test results described later (Examples;! To 7).
  • Example 1 12.5 1.0E + 12 ⁇ ⁇ 24 3.5E + 08 1.5E + 07
  • Figure 4 shows the results.
  • the case where the non-defective product rate of the TDDB characteristic is less than 90% is indicated by X, and the case of 90% or more is indicated by.
  • a similar wafer was subjected to a heat treatment simulating a device process.
  • a total of 20 hours of heat treatment was performed between 750 ° C and 950 ° C, mainly at 800 ° C.
  • the in-plane distribution of BMD was evaluated using an infrared scattering tomograph (M0441 manufactured by Mitsui Kinzoku).
  • M0441 manufactured by Mitsui Kinzoku
  • all wafers were able to achieve IX 10 7 pieces / cm 3 over the entire surface of the wafer.
  • the ratio between the maximum value and the minimum value of BMD is 50 times or less.
  • the silicon single crystal wafer has a uniform BMD density in the wafer plane, it can exhibit a uniform gettering ability in the plane, and the wafer has a non-uniform BMD density distribution. Use force S to effectively prevent warping.
  • a silicon single crystal wafer was obtained by pulling up and slicing a silicon single crystal in the same manner as in Example 1 except that the nitrogen concentration and oxygen concentration to be doped were changed as shown in Table 1 (Table 1, Comparative Example; ! ⁇ 6, reference example).
  • the operating conditions were adjusted by the thickness of the nitride film (non-dope is 0) and the crucible rotation in the same manner as in the example so that the nitrogen concentration and oxygen concentration shown in Table 1 were obtained.
  • the maximum / minimum value of BMD is 2 ⁇ 10 5 pieces / cm 3 or less, and the BMD density is extremely low. I'll end up.
  • the non-defective product ratio for the TZDB and TDDB characteristics was both over 90%.
  • the silicon single crystal was pulled and sliced in the same manner as in Example 1 except that nitrogen was not doped and the oxygen concentration was changed as shown in Table 1. Examples 7-; 10). The nitrogen concentration at this time was below the detection limit.
  • BMD was investigated in the same manner as in Example 1. Although 1 X 10 7 pieces / cm 3 was partially achieved in the wafer plane, this was achieved over the entire wafer area. There was no UA-8. Therefore, the lack of gettering ability was clearly caused. And the maximum / minimum value of BMD density is 50 times or more, and the gettering ability becomes non-uniform in the wafer plane. Also warp by heat treatment etc. Is likely to occur!
  • the non-defective product ratio for the TZDB and TDDB characteristics was both over 90%.
  • a silicon single crystal wafer was produced in the same manner as in Example 1, and the wafer was subjected to heat treatment using the RTA apparatus shown in FIG. 3 to dissolve oxygen precipitates on the wafer surface layer, and in the wafer. BMD was formed to provide gettering ability.
  • the heat treatment conditions were rapid heating and rapid cooling heat treatment at 1200 ° C for 10 seconds in a mixed atmosphere of argon and hydrogen.
  • This silicon single crystal wafer was tested in the same manner as in Example 1. As a result, FPD, etch pits, and OSF were not observed on the wafer surface layer. It was found that a sufficient defect-free layer without abnormal oxygen precipitation was obtained. In addition, an excellent silicon single crystal wafer having a sufficient gettering capability was obtained because BMD was uniformly formed in the inside at 1 ⁇ 10 7 pieces / cm 3 or more. The wafer was not deformed such as warp even after the heat treatment.
  • the nitrogen concentration is 5 X 10 u atom S / cm 3 or more and 3 X 10 13 atoms / cm 3 or less, and the oxygen concentration is 8 ppma or more and 13 ppma. It can be seen that the non-defective rate of TZDB and TDDB characteristics is 90% or more by setting the ratio to less than (JEI DA).
  • the present invention is not limited to the above-described embodiment.
  • the above embodiment is merely an example, and has any configuration that is substantially the same as the technical idea described in the claims of the present invention and that exhibits the same operational effects. Also technical of the present invention Included in the range.

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  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

La présente invention concerne une tranche de silicium monocristallin développée selon le procédé CZ, dopée avec de l'azote afin de traiter la surface entière en région N, laquelle tranche de silicium monocristallin possède un taux de non-défaillance de 90 % ou plus dans les performances de TZDB et les performances de TDDB, ainsi qu'un rapport de valeur maximum/valeur minimum de densité BMD de 50 ou moins à l'intérieur du plan de tranche après un traitement thermique par effet getter ou traitement thermique de dispositif. En outre, l'invention concerne un procédé destiné à fabriquer une tranche de silicium monocristallin par développement de silicium monocristallin selon le procédé CZ, une traction cristalline ascendante étant réalisée dans des conditions telles que la surface cristalline entière devient une région N tout en la dopant avec de l'azote à une concentration de 5×1011 à 3×1013 atomes/cm3 et de l'oxygène à une concentration de 8 à moins de 13 ppma (JEIDA). En conséquence, la tranche de silicium monocristallin et le procédé de fabrication de la tranche de silicium monocristallin selon l'invention présenteraient d'excellentes performances TZDB et TDDB sur une région de couche de surface de tranche en tant que région de fabrication de dispositif, ainsi qu'une réduction de la dispersion de la densité BMD dans le plan de tranche.
PCT/JP2007/065230 2006-09-05 2007-08-03 Tranche de silicium monocristallin et procédé de fabrication associé WO2008029579A1 (fr)

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CN101768776B (zh) * 2008-12-26 2013-03-13 硅电子股份公司 硅晶片及其制备方法
CN110541191A (zh) * 2018-05-29 2019-12-06 信越半导体株式会社 单晶硅的制造方法、外延硅晶片、以及单晶硅基板

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KR101389058B1 (ko) * 2009-03-25 2014-04-28 가부시키가이샤 사무코 실리콘 웨이퍼 및 그 제조방법
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JP5471359B2 (ja) * 2009-11-26 2014-04-16 信越半導体株式会社 エピタキシャルウェーハの製造方法
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CN110541191A (zh) * 2018-05-29 2019-12-06 信越半导体株式会社 单晶硅的制造方法、外延硅晶片、以及单晶硅基板
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