WO2008025354A3 - Verfahren zum selektiven plasmachemischen trockenätzen von auf oberflächen von silicium-wafern ausgebildetem phosphorsilikatglas - Google Patents

Verfahren zum selektiven plasmachemischen trockenätzen von auf oberflächen von silicium-wafern ausgebildetem phosphorsilikatglas Download PDF

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Publication number
WO2008025354A3
WO2008025354A3 PCT/DE2007/001581 DE2007001581W WO2008025354A3 WO 2008025354 A3 WO2008025354 A3 WO 2008025354A3 DE 2007001581 W DE2007001581 W DE 2007001581W WO 2008025354 A3 WO2008025354 A3 WO 2008025354A3
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WO
WIPO (PCT)
Prior art keywords
phosphosilicate glass
etching
silicon wafers
plasmochemical
dry
Prior art date
Application number
PCT/DE2007/001581
Other languages
English (en)
French (fr)
Other versions
WO2008025354A2 (de
Inventor
Volkmar Hopfe
Ines Dani
Elena Lopez
Rainer Moeller
Moritz Heintze
Original Assignee
Fraunhofer Ges Forschung
Volkmar Hopfe
Ines Dani
Elena Lopez
Rainer Moeller
Moritz Heintze
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fraunhofer Ges Forschung, Volkmar Hopfe, Ines Dani, Elena Lopez, Rainer Moeller, Moritz Heintze filed Critical Fraunhofer Ges Forschung
Priority to EP07801318A priority Critical patent/EP2057670A2/de
Priority to US12/310,441 priority patent/US20100062608A1/en
Publication of WO2008025354A2 publication Critical patent/WO2008025354A2/de
Publication of WO2008025354A3 publication Critical patent/WO2008025354A3/de

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Inorganic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Surface Treatment Of Glass (AREA)
  • Photovoltaic Devices (AREA)

Abstract

Die Erfindung betrifft ein Verfahren zum selektiven plasmachemischen Trockenätzen von auf Oberflächen von Silicium-Wafern ausgebildetem Phosphorsilikatglas ((SiO2) xP2O5)y). Es ist dabei Aufgabe der Erfindung, eine kostengünstige, effektive, selektive und Herstellungsverluste zumindest reduzierende Möglichkeit zu schaffen, mit der Phosphorsilikatglas von Silicium-Wafern entfernt werden kann. Bei der Erfindung wird so vorgegangen, dass kristalline Silicium-Wafer, deren Oberfläche mit Phosphorsilikatglas versehen ist, selektiv plasmachemisch geätzt werden. Dabei werden ein mit einer Plasmaquelle gebildetes Plasma und ein Ätzgas bei Atmosphärendruck auf das Phosphorsilikatglas gerichtet, das so entfernt werden kann.
PCT/DE2007/001581 2006-09-01 2007-08-29 Verfahren zum selektiven plasmachemischen trockenätzen von auf oberflächen von silicium-wafern ausgebildetem phosphorsilikatglas WO2008025354A2 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP07801318A EP2057670A2 (de) 2006-09-01 2007-08-29 Verfahren zum selektiven plasmachemischen trockenätzen von auf oberflächen von silicium-wafern ausgebildetem phosphorsilikatglas
US12/310,441 US20100062608A1 (en) 2006-09-01 2007-08-29 Method for selective palsmochemical dry-etching of phosphosilicate glass deposited on surfaces of silicon wafers

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102006042329A DE102006042329B4 (de) 2006-09-01 2006-09-01 Verfahren zum selektiven plasmachemischen Trockenätzen von auf Oberflächen von Silicium-Wafern ausgebildetem Phosphorsilikatglas
DE102006042329.1 2006-09-01

Publications (2)

Publication Number Publication Date
WO2008025354A2 WO2008025354A2 (de) 2008-03-06
WO2008025354A3 true WO2008025354A3 (de) 2008-09-18

Family

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Family Applications (1)

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PCT/DE2007/001581 WO2008025354A2 (de) 2006-09-01 2007-08-29 Verfahren zum selektiven plasmachemischen trockenätzen von auf oberflächen von silicium-wafern ausgebildetem phosphorsilikatglas

Country Status (4)

Country Link
US (1) US20100062608A1 (de)
EP (1) EP2057670A2 (de)
DE (1) DE102006042329B4 (de)
WO (1) WO2008025354A2 (de)

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JP5679513B2 (ja) * 2009-05-07 2015-03-04 日本電気硝子株式会社 ガラス基板及びその製造方法
US8470784B2 (en) * 2009-08-24 2013-06-25 Stealth Peptides International, Inc. Methods and compositions for preventing or treating ophthalmic conditions
JP6012597B2 (ja) 2010-05-11 2016-10-25 ウルトラ ハイ バキューム ソリューションズ リミテッド ティー／エー ナインズ エンジニアリング 光起電力電池素子のためのシリコンウエハの表面テクスチャ修飾を制御する方法および装置
US9001463B2 (en) 2012-08-31 2015-04-07 International Business Machines Corporaton Magnetic recording head having protected reader sensors and near zero recessed write poles
US9349395B2 (en) 2012-08-31 2016-05-24 International Business Machines Corporation System and method for differential etching
KR101932329B1 (ko) * 2013-07-24 2018-12-24 아반스트레이트 가부시키가이샤 유리 기판의 제조 방법, 유리 기판 및 디스플레이용 패널

Citations (4)

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JPS5491059A (en) * 1977-12-28 1979-07-19 Fujitsu Ltd Etching method for phosphorus glass by plasma etching
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JP2691018B2 (ja) * 1989-04-24 1997-12-17 住友電気工業株式会社 プラズマエッチング法
JP2833946B2 (ja) * 1992-12-08 1998-12-09 日本電気株式会社 エッチング方法および装置
US6734108B1 (en) * 1999-09-27 2004-05-11 Cypress Semiconductor Corporation Semiconductor structure and method of making contacts in a semiconductor structure
JP4221847B2 (ja) * 1999-10-25 2009-02-12 パナソニック電工株式会社 プラズマ処理装置及びプラズマ点灯方法
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Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5491059A (en) * 1977-12-28 1979-07-19 Fujitsu Ltd Etching method for phosphorus glass by plasma etching
US4158591A (en) * 1978-04-24 1979-06-19 Atlantic Richfield Company Solar cell manufacture
JPS62128526A (ja) * 1985-11-29 1987-06-10 Matsushita Electric Ind Co Ltd ドライエツチング装置
DE102004015217B4 (de) * 2004-03-23 2006-04-13 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zur Ausbildung dünner Schichten aus Siliziumnitrid auf Substratoberflächen

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Title
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Also Published As

Publication number Publication date
WO2008025354A2 (de) 2008-03-06
DE102006042329B4 (de) 2008-08-21
US20100062608A1 (en) 2010-03-11
DE102006042329A1 (de) 2008-03-20
EP2057670A2 (de) 2009-05-13

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