WO2007129384A1 - Filtre de bruit lc - Google Patents

Filtre de bruit lc Download PDF

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Publication number
WO2007129384A1
WO2007129384A1 PCT/JP2006/309087 JP2006309087W WO2007129384A1 WO 2007129384 A1 WO2007129384 A1 WO 2007129384A1 JP 2006309087 W JP2006309087 W JP 2006309087W WO 2007129384 A1 WO2007129384 A1 WO 2007129384A1
Authority
WO
WIPO (PCT)
Prior art keywords
noise filter
semiconductor substrate
inductor conductor
inductor
spiral electrode
Prior art date
Application number
PCT/JP2006/309087
Other languages
English (en)
Japanese (ja)
Inventor
Takeshi Ikeda
Hiroshi Miyagi
Kouichi Ikeda
Original Assignee
Niigata Seimitsu Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Niigata Seimitsu Co., Ltd. filed Critical Niigata Seimitsu Co., Ltd.
Priority to PCT/JP2006/309087 priority Critical patent/WO2007129384A1/fr
Publication of WO2007129384A1 publication Critical patent/WO2007129384A1/fr

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/10Inductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0013Printed inductances with stacked layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F2017/0093Common mode choke coil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00Details of transformers or inductances, in general
    • H01F27/40Structural association with built-in electric component, e.g. fuse
    • H01F27/402Association of measuring or protective means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H1/00Constructional details of impedance networks whose electrical mode of operation is not specified or applicable to more than one type of network
    • H03H2001/0021Constructional details
    • H03H2001/0064Constructional details comprising semiconductor material

Definitions

  • the present invention relates to an LC noise filter that removes noise in an electronic device.
  • Patent Document 1 Japanese Patent No. 3029929 (Page 2-3, Figure 1-6)
  • the noise filter disclosed in Patent Document 1 is formed on an insulating substrate (semiconductor substrate) using a semiconductor manufacturing technique, so an instantaneously excessive voltage such as static electricity with a low withstand voltage is applied.
  • an instantaneously excessive voltage such as static electricity with a low withstand voltage is applied.
  • the insulating layer between the double spiral electrode may be destroyed.
  • it is conceivable to insert an anti-static element between the external input terminal and the noise filter it is conceivable to insert an anti-static element between the external input terminal and the noise filter.
  • the increase in the number of parts and the associated assembly man-hours This will lead to an increase in the process complexity and cost.
  • the present invention was created in view of these points, and an object of the present invention is to provide an LC noise filter capable of preventing breakdown due to static electricity or the like by increasing the withstand voltage. Means to solve
  • an LC noise filter of the present invention includes a first inductor conductor formed on a semiconductor substrate, and at least a part of the first inductor conductor formed on the semiconductor substrate. And a second inductor conductor disposed at a position farther from the semiconductor substrate than the first inductor conductor. And an input protection circuit made of a semiconductor element connected to the ends of the first and second inductor conductors and formed on the semiconductor substrate.
  • the second inductor conductor described above is used for a signal line through which signals are input and output, and that one end of the first inductor conductor is grounded.
  • the thickness of the second inductor conductor which is the upper layer, is generally thicker depending on the manufacturing process.
  • the above-described second inductor conductor is provided with an input protection circuit at each of both ends, and the first inductor conductor is provided with an input protection circuit at an end that is grounded. .
  • a distributed constant type LC noise filter can be realized, and a noise component included in a signal input to the second inductor conductor can be removed.
  • the above-described first inductor conductor is provided with an input protection circuit at the other end as well as the end that is grounded. As a result, the breakdown voltage of the LC noise filter can be further increased.
  • the input protection circuit described above is preferably a diode configured by a PN junction formed on a semiconductor substrate.
  • the end portion of the first inductor conductor described above that is grounded is an inner peripheral end portion.
  • the first inductor conductor and the first inductor conductor are formed so as to overlap therewith.
  • the diameter of the outermost peripheral portion of the second inductor conductor can be increased, and a large inductance can be secured.
  • pads are connected to both ends of the second inductor conductor and one end of the first inductor conductor described above, and knocking is performed by wafer level CSP (Chip Scale Package). It is desirable. This makes it possible to reduce the size of the chip component when the LC noise filter is formed as a chip component.
  • the first and second inductor conductors and the input protection circuit are formed on a common semiconductor substrate. As a result, it is possible to realize a small chip component incorporating a large number of LC noise filters.
  • the second inductor conductor described above is used for a signal line through which signals are input and output, and the first inductor conductor is grounded at one end, and a plurality of first inductor conductors corresponding to a plurality of sets. It is desirable that one end of each is connected to each other. As a result, the number of terminals for external connection can be reduced in chip components incorporating a plurality of LC noise filters, and the distance between these terminals can be secured to the maximum. In addition, when it is necessary to ensure a certain distance between the terminals for external connection, it is possible to reduce the size of the chip component.
  • FIG. 1 is a plan view of an LC noise filter according to an embodiment.
  • FIG. 2 is a cross-sectional view of a circumferential portion of a spiral electrode.
  • FIG. 3 is a sectional view of the pad.
  • FIG. 4 is a cross-sectional view of the pad.
  • FIG. 5 is an equivalent circuit diagram of the LC noise filter.
  • FIG. 6 is an explanatory diagram of an outline of a method for manufacturing an LC noise filter.
  • FIG. 7 is an explanatory diagram outlining the manufacturing method of an LC noise filter.
  • FIG. 8 is a cross-sectional view of the LC noise filter shown in FIG.
  • FIG. 9 is a cross-sectional view of a wafer level CSP corresponding to an LC noise filter.
  • FIG. 10 is a diagram showing a wafer level CSP process.
  • FIG. 11 is a diagram showing a wafer level CSP process.
  • FIG. 12 is a diagram showing a wafer level CSP process.
  • FIG. 13 is a diagram showing a wafer level CSP process.
  • FIG. 14 is a diagram showing a specific example of dicing.
  • FIG. 1 is a plan view of an LC noise filter according to an embodiment.
  • the LC noise filter 100 of this embodiment includes spiral electrodes 120 and 130 as double inductor conductors formed on the surface of a semiconductor substrate 110 which is a P-type silicon substrate, and a semiconductor substrate 110.
  • Pads 122 and 124 as input / output terminals formed near both ends of one spiral electrode 120 on the far side (upper layer) and the inner peripheral end of the other spiral electrode 130 on the side closer to the semiconductor substrate 110 (lower layer)
  • a pad 132 as a grounding terminal formed in the vicinity and an N + region 112, 114, 116 formed at the position of the semiconductor substrate 110 facing these three pads 122, 124, 132 are provided. .
  • Each of the double spiral electrodes 120, 130 has a predetermined number of turns and has substantially the same shape.
  • these spiral electrodes 120 and 130 are formed using a two-layer metal wiring using gold or aluminum.
  • the force due to the manufacturing process The upper spiral electrode 120 is thicker than the lower spiral electrode 130.
  • the upper spiral electrode 120 with a large film thickness is used for a signal line
  • the lower spiral electrode 130 with a small film thickness is used for grounding (for the electrical connection state). Will be described later).
  • FIG. 2 is a cross-sectional view of the surrounding portions of the spiral electrodes 120 and 130.
  • a spiral electrode 130 is formed on the surface of the semiconductor substrate 110 with an insulating layer 200 interposed therebetween, and a spiral electrode 120 is formed thereon with an insulating layer 202 interposed therebetween.
  • insulating layers 200 and 202 for example, SiO 2 is used. In the example shown in FIGS. 1 and 2, spiral power is used.
  • a force that makes the shapes of the poles 120 and 130 substantially the same may be shifted from each other with at least a part of the force overlapping.
  • the lengths in the circumferential direction may be different (specifically, the length near the semiconductor substrate 110 and the length on the outer peripheral end side of the spiral electrode 130 may be shortened). That is, in the LC noise filter 100 described above, the spiral electrode 130 as the first inductor conductor formed on the semiconductor substrate 110 and the semiconductor substrate 110 are formed, and at least a part of the spiral electrode 130 and the insulating layer 20 are formed. 2 and a spiral electrode 120 as a second inductor conductor that is disposed at a position farther from the semiconductor substrate 110 than the overlapped partial force spiral electrode 130. I'll do it.
  • the number of turns of the spiral electrodes 120 and 130 may be 1 or less.
  • Pads 122 and 124 formed integrally with the spiral electrode 120 in the vicinity of both ends of one spiral electrode 120 are for inputting and outputting signals to be subjected to noise removal.
  • the pad 122 provided on the inner peripheral side is used as the input terminal 122A
  • the pad 124 provided on the outer peripheral side is used as the output terminal 124A.
  • diodes 112D and 114D formed by a PN junction between the semiconductor substrate 110 and N + regions 112 and 114 formed in a part of the semiconductor substrate 110 are arranged immediately below these pads 122 and 124.
  • FIG. 3 is a cross-sectional view of pad 122.
  • N + region 112 is formed in the vicinity of the surface of the P-type semiconductor substrate 110, and a diode 112D is configured by a PN junction between the semiconductor substrate 110 and the N + region 112.
  • the pad 122 is directly connected to the N + region 112 through a contact hole.
  • the pad 132 formed near the inner peripheral end of the other spiral electrode 130 is used as the ground terminal 132A.
  • an end of the spiral electrode 130 connected through the contact hole is arranged, and further below it is a space between the semiconductor substrate 110 and the N + region 116 formed in a part thereof.
  • a diode 116D formed by a PN junction is disposed.
  • FIG. 4 is a cross-sectional view of the pad 132.
  • An N + region 116 is formed in the vicinity of the surface of the P-type semiconductor substrate 110, and a diode 116D is constituted by these PN junctions.
  • An end portion of the spiral electrode 130 is directly formed on the surface of the N + region 116, and the node 132 is connected to the end portion of the spiral electrode 130 through a contact hole.
  • FIG. 5 is an equivalent circuit diagram of the LC noise filter 100. Since the upper spiral electrode 120 and the lower spiral electrode 130 are arranged so as to overlap each other, a capacitor 140 is formed between them. Accordingly, the spiral electrodes 120 and 130 and the Canon 140 constitute a distributed constant type LC noise filter 100. Also, diodes 112D, 114D, and 116D are connected to the input terminal 122A, the output terminal 124A, and the ground terminal 132A, respectively. These diodes 112D, 114D, and 116D are for input protection, and prevent the insulating layer 202 between the spiral electrodes 120 and 130 from being destroyed when an excessive voltage due to static electricity or the like is applied to the corresponding terminals. .
  • the withstand voltage can be increased by connecting the diode also to the vicinity of the outer peripheral end.
  • an N + region may be formed near the surface of the semiconductor substrate 110 corresponding to the outer peripheral edge of the spiral electrode 130.
  • FIG. 6 and FIG. 7 are explanatory views of the outline of the manufacturing method of the LC noise filter 100. Although one LC noise filter 100 is shown in FIG. 6 and the like, in practice, a large number of LC noise filters 100 are formed simultaneously using one silicon wafer, and one or more LC noise filters 100 are formed. Predetermined packaging is performed in units of pieces.
  • an insulating layer 200 is formed on the surface of a semiconductor substrate (silicon wafer) 110, and regions corresponding to the N + regions 112, 114, and 116 are removed using a photolithography method.
  • N + regions 112, 114, and 116 are formed by thermally diffusing arsenic or the like on the semiconductor substrate 100 through these regions (FIG. 6).
  • a predetermined pattern as a lower spiral electrode 130 is formed by photolithography using a photoresist (FIG. 7). Further, after removing the photoresist, an insulating layer 202 is formed on the surface, and a region corresponding to the N + regions 112 and 114 and a region corresponding to the inner peripheral edge of the spiral electrode 130 are removed by photolithography. Next, the upper layer spiral electrode 120 and the pad 132 having the pads 122 and 124 at both ends are formed. In this way, the LC noise filter 100 shown in FIG. 1 is completed.
  • the above-described LC noise filter 100 of the present embodiment can be manufactured as a chip component by performing a predetermined packaging that can be formed as one component included in an LSI. Next, a specific example will be described assuming that a wafer level CSP (Chip Scale Package) is performed on the LC noise filter 100 described above.
  • a wafer level CSP Chip Scale Package
  • FIG. 8 is a cross-sectional view of the LC noise filter 100 shown in FIG. 1, and shows a state before performing wafer level CSP.
  • FIG. 9 is a cross-sectional view of a wafer level CSP corresponding to the LC noise filter 100. 8 and 9 show structures that focus on the parts related to the solder balls that serve as the external connection terminals of the wafer level CSP, and other structures and positional relationships are simplified or It is omitted.
  • pads 132 are connected to solder balls 340 via UBM (underbump metal) 310, Cu rewiring 320, and Cu post 330. The same applies to the other pads.
  • FIGS. 10 to 13 are diagrams showing a wafer level CSP process.
  • a polyimide pattern 302 is formed on the surface of the passivation 300 (FIG. 10A) on the surface of the LC noise finer (FIG. 10B).
  • the passivation 300 is formed on the surface when the LC noise filter 100 is formed.
  • a UBM 310 is formed on the surface of the polyimide pattern 302 so as to be connected to the pad 132 or the like (FIG. 10C).
  • UBM310 consists of Ti layer and Cu layer, for example.
  • a resist pattern 312 is formed on the surface, and a Cu rewiring 320 is formed (FIG. 11A).
  • FIG. 14 is a diagram showing a specific example of dicing, and shows a case where a chip part including two LC noise filters 100 is manufactured.
  • the chip component shown in FIG. 14 has a size of lmm ⁇ 1.4 mm, and includes two LC noise filters 100 therein.
  • Each of the two LC noise filters 100 has an input terminal 122A force corresponding to solder balls 340 provided in the vicinity of different corners.
  • each of the two LC noise filters 100 corresponds to a solder ball 340 provided in the vicinity of different corners of the input terminal 124A force provided on each of the two LC noise filters 100.
  • solder balls 340 corresponding to the input terminal 122A and the output terminal 124A are arranged at the four corners of the chip component having a rectangular shape, and one solder ball 340 corresponding to the ground terminal 132A is arranged at the center.
  • the grounded central solder ball 340 and the other four solder balls 340 can be largely separated from each other, and the chip component can be miniaturized while ensuring a distance therebetween.
  • the horizontally long rectangular shape is divided into two in the horizontal direction, and the LC noise filter 100 is associated with each divided region.
  • the horizontally long rectangular shape is divided into two in the vertical direction, and The LC noise filter 100 may be associated with the divided areas.
  • the LC noise filter 100 is provided with the diodes 112D, 114D, and 116D as input protection circuits at the ends of the spiral electrodes 120 and 130, thereby providing an anti-resistance.
  • breakdown due to static electricity or the like insulation breakdown of the insulating layer 202 disposed between the spiral electrodes 120 and 130
  • the upper spiral electrode 120 is generally thicker depending on the manufacturing process. Therefore, the resistance of the signal line can be lowered by using the spiral electrode 120 as the signal line.
  • the upper spiral electrode 120 is provided with diodes 112D and 114D as input protection circuits at both ends, and the lower spiral electrode 130 is a diode 116D as an input protection circuit at the grounded end. Is provided. As a result, a distributed constant type LC noise filter 100 can be realized, and a noise component included in a signal input to the upper spiral electrode 120 can be removed.
  • the lower spiral electrode 130 may be provided with a diode as an input protection circuit at the other end as well as at the end to be grounded. As a result, the breakdown voltage of the LC noise filter 100 can be further increased.
  • diodes 112D, 114D, and 116D formed by PN junctions formed on the semiconductor substrate 110 are used as the input protection circuit.
  • a current can flow to the semiconductor substrate 110 side, and insulation breakdown between the spiral electrodes 120 and 130 due to the excessive voltage can be prevented. I can do it.
  • the grounded end of the lower layer spiral electrode 130 is disposed on the inner peripheral side end. This eliminates the need to form a connection pad on the outer peripheral side of the spiral electrode 130, so that when the size of the semiconductor substrate 110 is constant, the spiral electrode 130 and the spiral formed on the spiral electrode 130 are overlapped.
  • the diameter of the outermost periphery of the electrode 120 can be increased, and a large inductance can be secured.
  • the overlapping area of the spiral electrodes 120 and 130 may be varied according to the frequency characteristics. As a result, only the characteristics can be changed without changing the area or terminal arrangement of the LC noise filter 100.
  • Pads are connected to both ends of the upper spiral electrode 120 and one end of the lower spiral electrode 130, respectively, and are connected by a wafer level CSP (Chip Scale Package). Packaging. As a result, when the LC noise filter 100 is formed as a chip component, the chip component can be reduced in size.
  • CSP Chip Scale Package
  • a plurality of sets of spiral electrodes 120 and 130 and diodes 112D, 114D, and 116D as input protection circuits are formed on a common semiconductor substrate 110.
  • a small chip component with a large number of built-in LC noise filters 100 can be realized.
  • one end of the lower layer spiral electrode 130 included in the plurality of sets is connected to each other, thereby reducing the number of terminals for external connection in a chip component incorporating a plurality of LC noise filters 100. Therefore, the maximum distance between these terminals can be secured. In other words, it is possible to reduce the size of the chip component when it is necessary to ensure a certain distance between the terminals for external connection.
  • the spiral electrode 130 may be connected to an external terminal in which the pad 132 is connected to the inner terminal.
  • solder paste may be printed instead of the force used to use the solder balls 340 in the wafer level CSP.
  • the LC noise filter 100 having three or more forces in which two LC noise filters 100 are included in one chip component may be included.
  • the breakdown voltage can be increased and the breakdown due to static electricity or the like can be prevented.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Coils Or Transformers For Communication (AREA)

Abstract

La présente invention concerne un filtre de bruit LC permettant la prévention d'une coupure provoquée par l'électricité statique ou similaire en augmentant la tension de résistance. Le filtre de bruit LC comporte une électrode en spirale (130) disposée sur un substrat semi-conducteur (110) ; une électrode en spirale (120) qui est disposée sur le substrat semi-conducteur (110), recouvre au moins partiellement l'électrode en spirale (130) en maintenant une distance prédéterminée par rapport à l'électrode en spirale, la portion superposée étant disposée plus loin du substrat semi-conducteur (110) que de l'électrode en spirale (130) ; et des diodes (112D, 114D, 116D) qui sont connectées aux sections d'extrémité des électrodes en spirale (130, 120) et qui constituent un circuit de protection d'entrée composé d'un élément semi-conducteur disposé sur le substrat semi-conducteur (110).
PCT/JP2006/309087 2006-05-01 2006-05-01 Filtre de bruit lc WO2007129384A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2006/309087 WO2007129384A1 (fr) 2006-05-01 2006-05-01 Filtre de bruit lc

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2006/309087 WO2007129384A1 (fr) 2006-05-01 2006-05-01 Filtre de bruit lc

Publications (1)

Publication Number Publication Date
WO2007129384A1 true WO2007129384A1 (fr) 2007-11-15

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Application Number Title Priority Date Filing Date
PCT/JP2006/309087 WO2007129384A1 (fr) 2006-05-01 2006-05-01 Filtre de bruit lc

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019160880A1 (fr) * 2018-02-13 2019-08-22 Cirrus Logic International Semiconductor Ltd. Fabrication de circuit intégré comprenant un composant électrique passif

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916364A (ja) * 1982-07-19 1984-01-27 Hitachi Ltd Mis形半導体icの信号入力回路
JPH02280410A (ja) * 1989-04-20 1990-11-16 Takeshi Ikeda Lcノイズフィルタ
JPH03184410A (ja) * 1989-12-13 1991-08-12 Nissan Motor Co Ltd 半導体フィルタ回路
JPH07153919A (ja) * 1993-11-29 1995-06-16 Takeshi Ikeda Lc素子,半導体装置及びlc素子の製造方法
JPH07169920A (ja) * 1993-12-15 1995-07-04 Takeshi Ikeda Lc素子及び半導体装置
JPH07202134A (ja) * 1993-12-28 1995-08-04 Takeshi Ikeda Lc素子,半導体装置及びlc素子の製造方法
JP3029929B2 (ja) * 1992-10-19 2000-04-10 毅 池田 ノイズ・フィルタ

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5916364A (ja) * 1982-07-19 1984-01-27 Hitachi Ltd Mis形半導体icの信号入力回路
JPH02280410A (ja) * 1989-04-20 1990-11-16 Takeshi Ikeda Lcノイズフィルタ
JPH03184410A (ja) * 1989-12-13 1991-08-12 Nissan Motor Co Ltd 半導体フィルタ回路
JP3029929B2 (ja) * 1992-10-19 2000-04-10 毅 池田 ノイズ・フィルタ
JPH07153919A (ja) * 1993-11-29 1995-06-16 Takeshi Ikeda Lc素子,半導体装置及びlc素子の製造方法
JPH07169920A (ja) * 1993-12-15 1995-07-04 Takeshi Ikeda Lc素子及び半導体装置
JPH07202134A (ja) * 1993-12-28 1995-08-04 Takeshi Ikeda Lc素子,半導体装置及びlc素子の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019160880A1 (fr) * 2018-02-13 2019-08-22 Cirrus Logic International Semiconductor Ltd. Fabrication de circuit intégré comprenant un composant électrique passif
GB2585536A (en) * 2018-02-13 2021-01-13 Cirrus Logic Int Semiconductor Ltd Fabrication of integrated circuit including passive electrical component

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