WO2007103870A2 - Regulateur thermique a derivation utilise dans le traitement sous vide des semiconducteurs - Google Patents

Regulateur thermique a derivation utilise dans le traitement sous vide des semiconducteurs Download PDF

Info

Publication number
WO2007103870A2
WO2007103870A2 PCT/US2007/063311 US2007063311W WO2007103870A2 WO 2007103870 A2 WO2007103870 A2 WO 2007103870A2 US 2007063311 W US2007063311 W US 2007063311W WO 2007103870 A2 WO2007103870 A2 WO 2007103870A2
Authority
WO
WIPO (PCT)
Prior art keywords
wafer
vacuum module
sealable enclosure
enclosure
vacuum
Prior art date
Application number
PCT/US2007/063311
Other languages
English (en)
Other versions
WO2007103870A3 (fr
Inventor
Peter Van Der Meulen
Original Assignee
Blueshift Technologies, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Blueshift Technologies, Inc. filed Critical Blueshift Technologies, Inc.
Publication of WO2007103870A2 publication Critical patent/WO2007103870A2/fr
Publication of WO2007103870A3 publication Critical patent/WO2007103870A3/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67184—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the presence of more than one transfer chamber
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/6719—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67748—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber horizontal transfer of a single workpiece
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
    • H01L21/67751—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber vertical transfer of a single workpiece
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68764—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a movable susceptor, stage or support, others than those only rotating on their own vertical axis, e.g. susceptors on a rotating caroussel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68771—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting more than one semiconductor substrate

Definitions

  • the invention herein disclosed generally relates to semiconductor processing systems, and specifically relates to thermal adjustment of work pieces in a vacuum semiconductor processing environment.
  • a bypass thermal adjuster which may be placed between two robots, provides a chamber for isolation and thermal control of wafers while permitting other wafers to be passed through the adjuster by the robots.
  • a system and method disclosed herein may include a vacuum module in a semiconductor manufacturing system; a sealable enclosure within an interior of the vacuum module, the sealable enclosure may include a support for at least one wafer, and the sealable enclosure may be capable of selectively isolating an environment within the sealable enclosure from the interior of the vacuum module; and a thermal management system that may control a temperature of the at least one wafer within the sealable enclosure.
  • the system and method disclosed herein may further include a plurality of sealable enclosures within the interior of the vacuum module.
  • the system and method disclosed herein may further include a plurality of entries to the vacuum module for access by a robotic wafer handler.
  • the system and method disclosed herein may further include a vacuum management system to control a vacuum within the environment of the sealable enclosure.
  • the environment of the sealable enclosure may be an argon environment, a nitrogen environment, a helium environment, or the like.
  • the thermal management system may cool the at least one wafer.
  • the thermal management system may heat the at least one wafer.
  • the thermal management system may directly contact the wafer.
  • the vacuum module may be coupled to a semiconductor fabrication system.
  • the vacuum module may permit additional wafers to pass through the interior while the sealable enclosure holds the at least one wafer in isolation.
  • the system and method may further include a second sealable enclosure within the interior of the vacuum module, the second sealable enclosure may include a second support for at least one second wafer, and the second sealable enclosure may be capable of selectively isolating a second environment within the second sealable EFS-Web PATENT
  • the second sealable enclosure may be vertically stacked with the sealable enclosure.
  • the second sealable enclosure can be isolated independently from the sealable enclosure.
  • the sealable enclosure and the second sealable enclosure may operate in opposition, whereby only one of the enclosures may be isolated at one time.
  • the vacuum module may permit additional wafers to pass through the interior while the sealable enclosure holds the at least one wafer in isolation.
  • the vacuum module may permit additional wafers to pass through the interior while the second sealable enclosure holds the at least one second wafer in isolation.
  • the sealable enclosure may include one or more slot valves.
  • a method and system disclosed herein may include receiving a first wafer in a vacuum module; isolating the first wafer in an isolation environment; heating the first wafer in the isolation environment; and passing a second wafer through the vacuum module while heating the first wafer. Passing the second wafer through the vacuum module may include temporarily storing the second wafer in the vacuum module.
  • the method and system may further include passing a third wafer through the vacuum module while temporarily storing the second module.
  • Fig. 1 shows a generalized semiconductor manufacturing system.
  • Fig. 2 is depicts a work piece being transferred by a flexible transfer robot for thermal adjustment.
  • Fig. 3 depicts a work piece in position in a thermal adjustment enclosure right after the transfer robot has placed the work piece in the enclosure.
  • Fig. 4 depicts a thermal adjustment enclosure closing to fully encapsulate a work piece.
  • Fig. 5 shows an inert gas pressurizing the thermal adjustment enclosure.
  • Fig. 6 is a side view showing a second work piece being loaded into the vacuum module.
  • Fig. 7 shows the second work piece positioned in the vacuum module.
  • Fig. 8 shows an alternate transfer robot removing the second work piece from the vacuum module.
  • Fig. 9 shows the thermal adjustment enclosure opening after the gas has been removed and the work piece has reached a desired temperature.
  • Fig. 10 shows an enclosure fully open and a robot removing the thermally adjusted work piece.
  • Fig. 11 shows an alternate configuration of the thermal adjustment enclosure.
  • Fig. 12 shows two thermal adjustment enclosures in a single vacuum module.
  • Fig. 13 shows the embodiment depicted in Fig. 12 in which the lower thermal adjustment enclosure is closing while an upper thermal adjustment enclosure opens.
  • Fig. 14 shows the lower enclosure being gassed while the work piece from the upper enclosure is removed by a robot.
  • Fig. 15 shows an alternate configuration of dual independent thermal adjustment enclosures with work piece storage between the enclosures.
  • Fig. 16 shows an alternate way of closing the thermal adjustment enclosure without moving the enclosure top or bottom.
  • Fig. 17 shows the embodiment of Fig. 16 with slot valves closed, a work piece in contact with the lower surface, and a gas supply system filling the enclosure.
  • Fig. 18 shows a second work piece being loaded onto support pins above the enclosure.
  • Fig. 19 shows a second work piece in place on support pins above the enclosure, with the enclosure slot valves open, and a robot retrieving the first work piece.
  • Fig. 20 shows an upper and lower fixed enclosure configuration with slot side valves, wherein the upper enclosure is filled with gas.
  • Fig. 21 shows the embodiment of Fig. 20 alternatively with the lower enclosure filing with gas.
  • Fig. 1 shows a generalized layout of a semiconductor manufacturing system.
  • the system 1 may include one or more wafers 2, a load lock 12, one or more transfer robots 4, one or more process modules 8, one or more buffer modules 10, and a plurality of slot valves 14 or other isolation valves for selectively isolated chambers of the system 1, such as during various processing steps.
  • the system 1 operates to process wafers for use in, for example, semiconductor devices.
  • Wafers 2 may be moved from atmosphere to the vacuum environment through the load lock 12 for processing by the process modules 8. It will be understood that, while the following description is generally directed to wafers, a variety of other objects may be handled within the system 1 including a production wafer, a test wafer, a cleaning wafer, a calibration wafer, or the like, as well as other substrates (such as for reticles, magnetic heads, flat panels, and the like), including square or rectangular substrates. All such work pieces that might usefully be processed in a vacuum or other controlled environment are intended to fall within the scope of the term "wafer” as used herein unless a different meaning is explicitly provided or otherwise clear from the context.
  • the transfer robots which may include robotic arms and the like, move wafers within the vacuum environment such as between process modules, or to and from the load lock 12.
  • the process modules 8 may include any process modules suitable for use in a semiconductor manufacturing process.
  • a process module 8 includes at least one tool for processing a wafer 2, such as tools for epitaxy, chemical vapor deposition, physical vapor deposition, etching, plasma processing, lithography, plating, cleaning, spin coating, and so forth.
  • the particular tool or tools provided by a module 8 are not important to the systems and methods disclosed herein, except to the EFS-Web PATENT
  • references to a tool or process module will be understood to refer to any tool or process module suitable for use in a semiconductor manufacturing process unless a different meaning is explicitly provided or otherwise clear from the context.
  • a number of buffers 10 may be employed in the system 1 to temporarily store wafers 2, or facilitate transfer of wafers 2 between robots 4.
  • Buffer modules 10 may be placed adjacent to a transfer robot module 4, between two transfer robot modules 4, between a transfer robot module 4 and an EFEM, between a plurality of robots 4 associated with modules, or the like.
  • the buffer module 10 may hold a plurality of wafers 2, and the wafers 2 in the buffer module 10 may be accessed individually or in batches.
  • the buffers 10 may also offer storage for a plurality of wafers 2 by incorporating a work piece elevator, or multi-level shelving (with suitable corresponding robotics).
  • Wafers 2 may undergo a process step while in the buffer module 10, such as heating, cooling, testing, metrology, marking, handling, alignment, or the like.
  • the bypass thermal adjusters described below will generally, although not necessarily, be positioned where buffers 10 would otherwise be used in a semiconductor manufacturing process.
  • the load lock 12 permits movement of wafers 2 into and out of the vacuum environment.
  • a vacuum system evacuates the load lock 12 before opening to a vacuum environment in the interior of the system, and vents the load lock 12 before opening to an exterior environment such as the atmosphere.
  • the system 1 may include a number of load-locks at different locations, such as at the front of the system, back of the system, middle of the system, and the like.
  • front end load-locks 12 may have a dedicated robot and isolation valve associated with them for machine assisted loading and unloading of the system.
  • These systems which may include equipment front-end modules (EFEM), front opening unified pods (FOUPs), and the like, are used to control wafer movement of wafers into and out of the vacuum processing environment.
  • EFS-Web PATENT equipment front-end modules
  • FOUPs front opening unified pods
  • the isolation valves 14 are generally employed to isolate process modules during processing, or to otherwise isolate a portion of the vacuum environment from other interior regions. Isolation valves 14 may be placed between other components to temporarily isolate the environments of the system 1, such as at one or more entries to the bypass thermal adjusters described below. An isolation valve 14 may open and close, and provide a vacuum seal when closed.
  • the system 1 may include a scanning electron microscope module, an ion implantation module, a flow through module, a multifunction module, a vacuum extension module, a storage module, a transfer module, a metrology module, a heating or cooling station, or any other process module or the like.
  • these modules may be vertically stacked, such as two load-locks stacked one on top of the other, two process modules stacked one on top of the other, or the like.
  • Fig. 1 shows a particular arrangement of modules and so forth, that numerous combinations of process modules, robots, load locks, buffers, and the like may suitably be employed in a semiconductor manufacturing process, and that a thermal bypass adjuster may be usefully employed at a variety of locations therein.
  • the components of the system 1 may be changed, varied, and configured in numerous ways to accommodate different semiconductor processing schemes and customized to adapt to a unique function or group of functions. All such arrangements are intended to fall within this description.
  • Such a vacuum module may include an environmentally sealable enclosure to capture and thermally adjust a wafer in transition before the wafer is EFS-Web PATENT
  • a vacuum module in close proximity to a process chamber in a vacuum semiconductor processing system, such that a wafer may be heated or cooled to meet the particular needs of the process chamber for improved processing. Additionally, including and utilizing such a vacuum module can facilitate effective use of process chambers in the system by allowing a second wafer to be brought up to temperature as a first wafer is being processed.
  • a wafer may be returned to ambient temperature immediately after it is taken from a process chamber, before it is handled by additional transfer robots, thereby eliminating or reducing wait times associated with thermal adjustment.
  • a bypass thermal adjuster including an upper half 132 and a lower half 134 inside a vacuum module 100.
  • the upper half 132 and the lower half 134 collectively form a sealable enclosure that can selectively isolate a portion of the environment within the interior of the vacuum module 100.
  • the vacuum module 100 may be a buffer 10 between semiconductor manufacturing robotic handlers, process modules, load locks, or any other hardware where wafers 110 may be transferred or moved within a system.
  • a wafer 110 may be enclosed in an environment isolated from a remaining interior 112 of the vacuum module 100 to be heated or cooled for a next workstation while another wafer may pass through the vacuum module 100 to a workstation.
  • the interior 114 of the bypass thermal adjuster when in isolation, may use a vacuum pump 116 to control pressure in the interior 114 independently from the remaining interior 112 of the vacuum module 100.
  • a gas supply 118 such as a supply of Argon
  • a gas may be supplied to the bypass vacuum interior 114 to optimize the heating and cooling rates of the wafer 110 within the bypass thermal adjuster.
  • the bypass thermal adjuster may provide localized heating and/or vertical lift control without isolation. So for example, the upper half 132 may receive the wafer 110, lower the wafer 110 out of the path of wafers through the vacuum module 100 onto a direct heating surface or the like, EFS-Web PATENT
  • BLUE-0005-PWO heat cool, or otherwise control heat of the wafer 110, and then raise the wafer for retrieval by the same or a different robot, all without isolating the wafer environment from the remaining interior of the vacuum module 100.
  • the flexible transfer robot 105 is transferring a wafer 110 into the bypass thermal adjuster for purposes of thermally adjusting the wafer 110.
  • the bypass thermal adjuster upper half 132 is shown in the open position allowing the flexible transfer robot 105 to place the wafer 110 onto a set of support clips 120 that are associated with the bypass thermal adapter upper half 132.
  • each support clip 120 may include an "L" shaped or other finger or protuberance upon which an edge of the wafer 110 may be placed, so that a group of suitably positioned support clips 120 can support the wafer 110 around its perimeter.
  • the bypass thermal adjuster upper half 132 contains a sealing facility 121 to form a seal with the bypass thermal adjuster lower half 134, providing for separate enclosure and isolation of the wafer 110 from the remaining interior 112 of the vacuum module 100.
  • the sealing facility may be any type of sealing facility that provides for sealing the two halves of the bypass thermal adjuster. It should also be understood that the sealing facility may be on the bypass thermal adjuster upper half 132, on the bypass thermal adjuster lower half 134, or a combination of these.
  • the vacuum module 100 may include an isolation valve or the like at each entry thereto to permit isolation of the interior 112. At the same time, it will be understood that a wafer 110 sealed within the adjuster interior 114 may be isolated without requiring isolation valves for the vacuum module 100 to be closed.
  • the wafer 110 is shown being supported by the support clips 120 after the flexible transfer robot (not shown) has been retracted. Once the support clips 120 fully engage the wafer 110, the robot may release the wafer 110 and retract out of the module 110.
  • bypass thermal adjuster top half 132 is shown lowering (in the direction of an arrow 402) to make contact with the bypass thermal adjuster bottom half 134 creating an isolation enclosure that encapsulates the wafer 110.
  • Fig. 5 depicts the fully closed bypass thermal adjuster 130 creating an enclosure that is isolated from the remaining interior 112 of the vacuum module 100. Once the bypass thermal adjuster 130 is fully closed and sealed, the environment within the bypass thermal adjuster 130 may be modified to heat or cool the wafer 110.
  • the environment of the bypass thermal adjuster 130 may be modified by changing the vacuum within the bypass thermal adjuster 130, adding a gas to the enclosure 410, heating the enclosure, cooling the enclosure, or the like; the environment modifications may be applied individually or in combination, either simultaneously, serially, or some combination of these.
  • the thermal modification made to the wafer 110 may depend on subsequent process steps. For example, the wafer 110 may have just completed a process that required a high temperature and the next process step may require a cooler wafer temperature. Cooling the wafer may need to be at a controlled rate to avoid contamination of the wafer 110, such as from water condensation, or physical damage.
  • the wafer 110 may be cooled (or heated) at a controlled rate within the bypass thermal adjuster without having to change the environment of an entire vacuum module 100, therefore providing for the temperature control of the wafer 110 while allowing additional wafers to pass through the vacuum module 100.
  • a gas into the bypass thermal adjuster 130 enclosure to an internal pressure of approximately 1 to 5 Torr.
  • the gas may be argon, helium, nitrogen, or other similar gas.
  • the wafer 110 may be heated or cooled to the desired temperature by heating or cooling the bypass thermal adjuster 130.
  • thermal control devices 502 such as heating and/or cooling elements within the bypass thermal adjuster top half 132 and/or the bypass thermal adjuster bottom half 134 to provide the heating or cooling required.
  • the wafer 110 when positioned within the bypass thermal adjuster, the wafer 110 may be in contact with the bypass thermal adjuster lower half 134, may be in contact with the bypass thermal adjuster top half 132, or may be positioned between the two bypass thermal adjuster halves (132 134). With the wafer 110 in contact with the bypass thermal adjuster halves (132 134), the wafer 110 may be directly heated or cooled EFS-Web PATENT
  • bypass thermal adjuster halves BLUE-0005-PWO by the bypass thermal adjuster halves (132 134).
  • the bypass thermal adjuster 130 environmental gas may be heated or cooled by the bypass thermal adjuster halves (132 134) and the wafer 110 may be heated or cooled by conduction. Heating or cooling of the wafer 110 may continue until the wafer 110 is substantially the same as the temperature of the bypass thermal adjuster 130.
  • the bypass thermal adjuster environment may be adjusted to match the environment of the vacuum module 100 by pumping out any environmental gasses and substantially matching the vacuum level between the bypass thermal adjuster 130 and the vacuum module 100.
  • thermal management system with the bypass thermal adjuster described herein.
  • thermal control may generally be administered through radiation, convection, or conduction.
  • a thermal management system used by the bypass thermal adjuster may include temperature sensors, one or more controllers, valves, gauges, and any other suitable hardware, according to the particular thermal management technique(s) employed. All such variations as would be apparent to one of ordinary skill in the art are intended to fall within the scope of this disclosure.
  • a vacuum management system for control the vacuum of the interior of the thermal bypass adjuster may use any techniques know to those of ordinary skill in the art, and may include gauges, vacuum pumps, gas supplies, and so forth.
  • the vacuum management system may also or instead control gas supply to the interior to control the environment within the sealed bypass thermal adjuster.
  • a second set of support clips 520 may be mounted on the bypass thermal adjuster top half 132 and may be used to support a second wafer 510 EFS-Web PATENT
  • the robot 105 may transfer the second wafer 510 to the second support clips 520.
  • the second set of support clips 520 may be mounted on a side wall of the vacuum module 100.
  • the second wafer 510 is held in position by the second set of support clips 520 after the transfer robot (not shown in this view) has placed the second wafer 510 on the second set of support clips 520.
  • the first wafer 110 may be in a first environment within the bypass thermal adjuster 130 while the second wafer 510 is in a second environment within the vacuum module 100. This may allow the first wafer to be prepared for transfer to a work station, process module, or the like (by either heating or cooling) while the second wafer 510 is able to simultaneously pass through the vacuum module 100 in a separate wafer work flow.
  • the second wafer 510 may be held by second support clips 520 temporarily, freeing up the transfer robot 105 until a second robot (not shown) is available to accept the second wafer 510, such as from the other entry to the vacuum module 100.
  • first wafer 110 may remain in enclosure 130 under thermal management. It should be understood that the first wafer 110 may be held within the bypass thermal adjuster for longer than the required time to achieve a target temperature, for example when other wafers are passing through the vacuum module 100 or while waiting for a particular tool or process module to become available.
  • bypass thermal adjuster 130 opening after the wafer 110 has reached a desired temperature, the contact gas 410 (not shown) may have been removed through pump line 810 and valve 820, and the interior of the bypass thermal adjuster 130 may be substantially returned to the same vacuum environment within the vacuum module 100.
  • Fig. 10 shows the bypass thermal adjuster 130 fully open and the robot 105 removing the wafer 110 from the support clips 120 completing the cycle of heating or cooling the wafer 110. It should be understood, that while the first wafer 110 is heated EFS-Web PATENT
  • more than one additional wafer may pass through the vacuum module 100. Additionally, it should be understood that the wafer 110 is shown being removed from the same direction from which it entered, but the wafer 110 may be removed in any other available direction.
  • bypass thermal adjuster 130 one alternate configuration of the bypass thermal adjuster 130 is shown with the bypass thermal adjuster top half 132 fixed to the vacuum module 1100 interior and bypass thermal adjuster bottom half 134 moveable to open and close the bypass thermal adjuster 130.
  • the bypass thermal adjuster top half 132 or bottom half 134 may provide the heating and cooling of the wafer 110.
  • the transfer robot 105 placed the first wafer 110 on the support clips 120 and retreated prior to the bypass thermal adjuster bottom half 134 raising up to environmentally enclose the wafer 110 for thermal adjustment.
  • the transfer robot 105 is shown transferring the second wafer 510 to the second clips 520 as a pass through wafer. Placing or retrieving the second wafer 510 may be performed while the bypass thermal adjuster 130 is fully closed.
  • Fig. 12 depicts a vacuum module 1200 including dual bypass thermal adjusters 1130A and 1130B. These adjusters are vertically stacked with one directly above the other. An upper bypass thermal adjuster 1130A is shown closed and containing the first wafer 110, while lower bypass thermal adjuster 1130B is shown open with the second wafer 510 being supported by the second support clips 520. The second wafer 510 may be ready for thermal adjustment, may be ready to be retrieved by a transfer robot after it has completed thermal adjustment, or may not require thermal adjustment and is being transferred through the vacuum module 1300.
  • wafers (110, 510) may be adjusted to different temperatures in the different bypass thermal adjusters (1130A, 1130B), both bypass thermal adjusters (1130A, 1130B) may adjust to the same temperatures, or the bypass thermal adjusters (1130A, 1130B) may adjust the temperatures differently with each wafer (110, 510) based on the requirements of the semiconductor manufacturing process.
  • the vacuum module 1300 may be a buffer module and may provide access to more than one semiconductor process module where each semiconductor process module requires different wafer temperatures.
  • Fig. 13 shows the same configuration as Fig. 12 but with the upper bypass thermal adjuster 1130A open and lower bypass thermal adjuster 1130B closed. This configuration may result from first wafer 110 having completed thermal adjustment and second wafer 510 undergoing thermal adjustment. Alternatively, first wafer 110 may be recently placed by a transfer robot and is ready for thermal adjustment pending the completion of the thermal adjustment of second wafer 510.
  • first wafer 110 may be recently placed by a transfer robot and is ready for thermal adjustment pending the completion of the thermal adjustment of second wafer 510.
  • bypass thermal adjusters (1130A and 1130B) are shown working in concert, but it should be understood that the two bypass thermal adjusters (1130A, 1130B) may be adapted to work independently from each other such that each may be closed at the same time, each may be open at the same time, one may be open while the other is closed, or the like.
  • Each of the bypass thermal adjusters may also be used for pass through wafers such that the wafer may be placed on one of the support clips within the bypass thermal adjuster (1130A, 1130B) and not processed within the bypass thermal adjuster (1130A, 1130B).
  • Fig. 14 shows the same configuration as Fig. 12 and Fig. 13 with bypass thermal adjuster 1130B being pressurized by the gas 410 while the transfer robot 105 is retrieving the first wafer 110 from the upper bypass thermal adjuster 1130A, and transferring the wafer 110 out of the vacuum module 100.
  • Fig. 15 shows another configuration of the vacuum module 1400 that includes dual bypass thermal adjusters (1130A, 1130B) and an intermediate wafer storage 1410.
  • the intermediate wafer storage 1410 may facilitate flexibility in scheduling the handling of wafers within the vacuum environment by allowing one or more wafer to pass through the vacuum module 1400 while one or more wafer may be thermal treated within the bypass thermal adjusters (1130A, 1130B).
  • the intermediate wafer storage 1410 may store a plurality of pass through wafers.
  • Intermediate wafer storage 1410 such as that shown in Fig. 15 may also allow for load balancing of a process group.
  • FIGs. 16 through 19 show phases of operation of another alternate embodiment of bypass thermal adjuster 1630.
  • the shown bypass thermal adjuster 1630 is different from the earlier depicted bypass thermal adjuster 130 by having a fixed top half 132 and fixed bottom half 134.
  • 1400 environment may be provided by moving slot valves 1610 to form an environmental seal between the bypass thermal adjuster 1630 top half and bottom half.
  • moveable support clips 1620 may be included in the interior 1640 of bypass thermal adjuster 1630 for lowering wafer 110 into the desired position within the bypass thermal adjuster 1630.
  • the slot valves 1610 may provide an advantage of lower cost relative to providing mechanisms for either of the bypass thermal adjuster halves to move up and down. Additionally, since the bypass thermal adjuster 1630 top half is stationary, there is no need to coordinate the transfer robot 105 accessing the exterior support clips 520 with the thermal adjustment operation of bypass thermal adjuster 1630 since the support clips 520 have a fixed location. The fixed positioned exterior support clips 520 may allow the second wafer 510 to pass through the vacuum module 100 using the fixed exterior support clips 520 while the first wafer 110 is in the process of positioning within the bypass thermal adjuster 1630.
  • Fig. 16 further shows the transfer robot 105 loading the first wafer 110 into the bypass thermal adjuster 1630 with the moving slot valves 1610 in the open position.
  • Fig. 17 shows the moving slot valves 1610 the closed position and the bypass thermal adjuster 1630 pressurized for thermally adjusting the first wafer 110.
  • the movable support clips 1620 have lowered the wafer 110 to the bypass thermal adjuster 1630 lower half.
  • the movable support clips 1620 may keep the wafer 110 elevated above the bypass thermal adjuster 1630 bottom half to allow the gas 410 to circulate around the wafer 110.
  • Fig. 18 shows the transfer robot 105 loading the second wafer 510 onto the support clips 520.
  • Fig. 19 shows the transfer robot 105 retrieving the first wafer 110 after the thermal adjustment is complete and the moving slot valves 1610 are open.
  • the advantage of this configuration with fixed upper support clips 520 is shown, the second wafer 510 remains stationary while the first wafer is removed from the bypass thermal adjuster 1630. Additionally, with the fixed upper support clips 520, the second wafer 510 EFS-Web PATENT
  • BLUE-0005-PWO may be removed from the vacuum module 1600 using a second transfer robot at the same time the first wafer is removed from the bypass thermal adjuster 1630.
  • Fig. 20 and Fig. 21 show a dual configuration of the fixed bypass thermal adjuster embodiment of Fig. 16. Independent operation of upper bypass thermal adjuster 2030A and lower bypass thermal adjuster 2030B may enable independent thermal adjustment of two wafers within the vacuum module 2000.
  • Alternative embodiments may include one or more bypass thermal adjusters without exterior support clips.
  • each adjuster may be adapted to handle multiple wafers, and may provide for independent or common thermal management of such multiple wafers.
  • the vacuum module may also be adapted for more versatile temporary storage, such as by permitting storage of one or more wafers without placing them in isolation, while passing additional wafers through the vacuum module. While such bypass functions are known, a combination of temporary storage, isolation and thermal adjustment, and bypass, provides significant additional advantages in terms of processing flexibility for a semiconductor fabrication facility.
  • the systems and methods disclosed herein may be usefully employed in a non vacuum environment, and may be useful in processing systems other than semiconductor manufacturing.
  • the vacuum modules and/or bypass thermal adjusters described herein may incorporate additional features that support functions such as metrology, alignment, marking, or any other functional suitable for use in a wafer handling system.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Robotics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Human Computer Interaction (AREA)
  • Mechanical Engineering (AREA)
  • Length Measuring Devices By Optical Means (AREA)
  • Element Separation (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)

Abstract

L'invention concerne un régulateur thermique à dérivation pouvant être placé entre deux robots. Ce régulateur forme une chambre d'isolation et de régulation thermique pour certaines plaquettes tout en permettant à d'autres plaquettes envoyées par les robots de le traverser.
PCT/US2007/063311 2006-03-05 2007-03-05 Regulateur thermique a derivation utilise dans le traitement sous vide des semiconducteurs WO2007103870A2 (fr)

Applications Claiming Priority (18)

Application Number Priority Date Filing Date Title
US77960906P 2006-03-05 2006-03-05
US77970706P 2006-03-05 2006-03-05
US77947806P 2006-03-05 2006-03-05
US77968406P 2006-03-05 2006-03-05
US77946306P 2006-03-05 2006-03-05
US60/779,684 2006-03-05
US60/779,707 2006-03-05
US60/779,609 2006-03-05
US60/779,463 2006-03-05
US60/779,478 2006-03-05
US78483206P 2006-03-21 2006-03-21
US60/784,832 2006-03-21
US74616306P 2006-05-01 2006-05-01
US60/746,163 2006-05-01
US80718906P 2006-07-12 2006-07-12
US60/807,189 2006-07-12
US82345406P 2006-08-24 2006-08-24
US60/823,454 2006-08-24

Publications (2)

Publication Number Publication Date
WO2007103870A2 true WO2007103870A2 (fr) 2007-09-13
WO2007103870A3 WO2007103870A3 (fr) 2008-11-27

Family

ID=39494162

Family Applications (3)

Application Number Title Priority Date Filing Date
PCT/US2007/063311 WO2007103870A2 (fr) 2006-03-05 2007-03-05 Regulateur thermique a derivation utilise dans le traitement sous vide des semiconducteurs
PCT/US2007/063345 WO2007103896A2 (fr) 2006-03-05 2007-03-05 Procedes pour identifier le centre d'une plaquette.
PCT/US2007/063333 WO2007103887A2 (fr) 2006-03-05 2007-03-05 Modules de procedes de fabrication de semi-conducteurs

Family Applications After (2)

Application Number Title Priority Date Filing Date
PCT/US2007/063345 WO2007103896A2 (fr) 2006-03-05 2007-03-05 Procedes pour identifier le centre d'une plaquette.
PCT/US2007/063333 WO2007103887A2 (fr) 2006-03-05 2007-03-05 Modules de procedes de fabrication de semi-conducteurs

Country Status (4)

Country Link
JP (2) JP5959138B2 (fr)
KR (2) KR20080111036A (fr)
SG (1) SG172675A1 (fr)
WO (3) WO2007103870A2 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7988399B2 (en) 2003-11-10 2011-08-02 Brooks Automation, Inc. Mid-entry load lock for semiconductor handling system
US8500388B2 (en) 2003-11-10 2013-08-06 Brooks Automation, Inc. Semiconductor wafer handling and transport
US10086511B2 (en) 2003-11-10 2018-10-02 Brooks Automation, Inc. Semiconductor manufacturing systems

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20100137429A (ko) 2008-01-25 2010-12-30 어플라이드 머티어리얼스, 인코포레이티드 입출력 및 챔버 슬릿 밸브를 위한 일체형 로컬 기판 중심 탐지장치를 위한 방법 및 장치
WO2011028597A1 (fr) * 2009-08-26 2011-03-10 Veeco Instruments, Inc. Système de fabrication d'un motif sur des supports d'enregistrement magnétiques
US8406918B2 (en) * 2009-12-21 2013-03-26 WD Media, LLC Master teaching jig
US11587813B2 (en) 2013-12-17 2023-02-21 Brooks Automation Us, Llc Substrate transport apparatus
JP7409800B2 (ja) 2019-08-09 2024-01-09 川崎重工業株式会社 ロボット制御装置、ロボット、及びロボット制御方法
CN110767587B (zh) * 2019-10-21 2022-04-01 西安奕斯伟材料科技有限公司 一种晶圆处理装置和上下料方法
KR102289382B1 (ko) * 2019-12-31 2021-08-12 한국기술교육대학교 산학협력단 반도체 공장용 위치보정방법
US11813757B2 (en) * 2020-10-13 2023-11-14 Applied Materials, Inc. Centerfinding for a process kit or process kit carrier at a manufacturing system
KR20220077384A (ko) 2020-12-02 2022-06-09 에스케이실트론 주식회사 블록 위치 조정장치 및 방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5183547A (en) * 1989-09-13 1993-02-02 Sony Corporation Sputtering apparatus and system for sputtering employing same
US6530732B1 (en) * 1997-08-12 2003-03-11 Brooks Automation, Inc. Single substrate load lock with offset cool module and buffer chamber

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3740617A (en) * 1968-11-20 1973-06-19 Matsushita Electronics Corp Semiconductor structure and method of manufacturing same
JPS6245041A (ja) * 1985-08-23 1987-02-27 Canon Inc 円形板状物体の位置決め装置
JPS62162342A (ja) * 1986-01-13 1987-07-18 Canon Inc ウエハの位置合せ装置
JPS62204109A (ja) * 1986-03-04 1987-09-08 Yokogawa Electric Corp ロボツトア−ム姿勢測定装置
US4819167A (en) * 1987-04-20 1989-04-04 Applied Materials, Inc. System and method for detecting the center of an integrated circuit wafer
JP3063999B2 (ja) * 1990-09-28 2000-07-12 株式会社アマダ 柔軟構造物のフレキシビリティ制御装置
US5452078A (en) * 1993-06-17 1995-09-19 Ann F. Koo Method and apparatus for finding wafer index marks and centers
US6126380A (en) * 1997-08-04 2000-10-03 Creative Design Corporation Robot having a centering and flat finding means
US6405101B1 (en) * 1998-11-17 2002-06-11 Novellus Systems, Inc. Wafer centering system and method
JP4402811B2 (ja) * 2000-05-26 2010-01-20 東京エレクトロン株式会社 被処理体の搬送システムおよび被処理体の位置ずれ量の検出方法
US6553280B2 (en) * 2000-07-07 2003-04-22 Applied Materials, Inc. Valve/sensor assemblies
KR100803414B1 (ko) * 2000-08-16 2008-02-13 레이던 컴퍼니 근거리 물체 감지 시스템
JP2002270672A (ja) * 2001-03-09 2002-09-20 Olympus Optical Co Ltd アライメント方法及び基板検査装置
US6962644B2 (en) * 2002-03-18 2005-11-08 Applied Materials, Inc. Tandem etch chamber plasma processing system
US6760976B1 (en) * 2003-01-15 2004-07-13 Novellus Systems, Inc. Method for active wafer centering using a single sensor
DE602004010262T2 (de) * 2003-06-24 2008-09-25 Koninklijke Philips Electronics N.V. Verfahren zum bewegen einer mit einer kamera versehenen vorrichtung zu einer zielposition mittels eines steuersytems und steuersystem dafür
JP2005093807A (ja) * 2003-09-18 2005-04-07 Hitachi Kokusai Electric Inc 半導体製造装置
US20050113976A1 (en) * 2003-11-10 2005-05-26 Blueshift Technologies, Inc. Software controller for handling system
US7458763B2 (en) * 2003-11-10 2008-12-02 Blueshift Technologies, Inc. Mid-entry load lock for semiconductor handling system
JP4445293B2 (ja) * 2004-03-11 2010-04-07 株式会社リコー 画像形成装置における記録紙形状測定方法及び装置、並びに、画像形成装置における記録紙形状異常診断機能付き画像形成装置
JP2006005242A (ja) * 2004-06-18 2006-01-05 Canon Inc 画像処理装置、画像処理方法、露光装置、およびデバイス製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5183547A (en) * 1989-09-13 1993-02-02 Sony Corporation Sputtering apparatus and system for sputtering employing same
US6530732B1 (en) * 1997-08-12 2003-03-11 Brooks Automation, Inc. Single substrate load lock with offset cool module and buffer chamber

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7988399B2 (en) 2003-11-10 2011-08-02 Brooks Automation, Inc. Mid-entry load lock for semiconductor handling system
US8500388B2 (en) 2003-11-10 2013-08-06 Brooks Automation, Inc. Semiconductor wafer handling and transport
US8672605B2 (en) 2003-11-10 2014-03-18 Brooks Automation, Inc. Semiconductor wafer handling and transport
US9884726B2 (en) 2003-11-10 2018-02-06 Brooks Automation, Inc. Semiconductor wafer handling transport
US10086511B2 (en) 2003-11-10 2018-10-02 Brooks Automation, Inc. Semiconductor manufacturing systems

Also Published As

Publication number Publication date
SG172675A1 (en) 2011-07-28
WO2007103887A2 (fr) 2007-09-13
JP5689920B2 (ja) 2015-03-25
KR101570626B1 (ko) 2015-11-19
WO2007103896A3 (fr) 2008-07-10
JP2009529248A (ja) 2009-08-13
JP5959138B2 (ja) 2016-08-02
JP2013231726A (ja) 2013-11-14
WO2007103887A3 (fr) 2008-06-12
KR20140042925A (ko) 2014-04-07
KR20080111036A (ko) 2008-12-22
WO2007103870A3 (fr) 2008-11-27
WO2007103896A2 (fr) 2007-09-13

Similar Documents

Publication Publication Date Title
US8403613B2 (en) Bypass thermal adjuster for vacuum semiconductor processing
WO2007103870A2 (fr) Regulateur thermique a derivation utilise dans le traitement sous vide des semiconducteurs
US11990358B2 (en) Sealed substrate carriers and systems and methods for transporting substrates
US6375746B1 (en) Wafer processing architecture including load locks
US10832926B2 (en) High throughput serial wafer handling end station
US6431807B1 (en) Wafer processing architecture including single-wafer load lock with cooling unit
CN106449471B (zh) 衬底处理装置
TWI497633B (zh) 線狀分佈半導體工件的處理工具
US6079927A (en) Automated wafer buffer for use with wafer processing equipment
US6042623A (en) Two-wafer loadlock wafer processing apparatus and loading and unloading method therefor
KR100618355B1 (ko) 전방 말단 연장부 및 내부 기판 버퍼를 갖춘 기판수송기를 구비한 기판 처리 장치
US6696367B1 (en) System for the improved handling of wafers within a process tool
US7949425B2 (en) High throughput wafer notch aligner
US6530732B1 (en) Single substrate load lock with offset cool module and buffer chamber
JP2001524267A (ja) 複数のシングル・ウェーハ・ロードロック・ウェーハ加工装置ならびにそのローディングおよびアンローディングの方法
KR20100095371A (ko) 기판 처리 장치
US20200090966A1 (en) Processing system having a front opening unified pod (foup) load lock
US6079928A (en) Dual plate gas assisted heater module
US20060285944A1 (en) FOUP loading load lock
US11211269B2 (en) Multi-object capable loadlock system
KR101058597B1 (ko) 프로세싱 툴에 기판을 공급하는 방법 및 장치
US6231289B1 (en) Dual plate gas assisted heater module
WO2002082507A1 (fr) Systeme et dispositif de manutention de plaquettes

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase in:

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07757915

Country of ref document: EP

Kind code of ref document: A2