WO2007099922A1 - プラズマ酸化処理方法および半導体装置の製造方法 - Google Patents
プラズマ酸化処理方法および半導体装置の製造方法 Download PDFInfo
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- WO2007099922A1 WO2007099922A1 PCT/JP2007/053561 JP2007053561W WO2007099922A1 WO 2007099922 A1 WO2007099922 A1 WO 2007099922A1 JP 2007053561 W JP2007053561 W JP 2007053561W WO 2007099922 A1 WO2007099922 A1 WO 2007099922A1
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- Prior art keywords
- plasma
- treatment
- layer
- plasma oxidation
- oxidation treatment
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- 238000007254 oxidation reaction Methods 0.000 title claims abstract description 154
- 230000003647 oxidation Effects 0.000 title claims abstract description 151
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 44
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 41
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 38
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- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 claims abstract description 22
- 229910001882 dioxygen Inorganic materials 0.000 claims abstract description 22
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 96
- 229920005591 polysilicon Polymers 0.000 claims description 96
- 229910021332 silicide Inorganic materials 0.000 claims description 36
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 35
- 238000010306 acid treatment Methods 0.000 claims description 23
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- 230000015654 memory Effects 0.000 claims description 7
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- 150000004767 nitrides Chemical class 0.000 claims description 4
- 238000003672 processing method Methods 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 1
- 239000001301 oxygen Substances 0.000 claims 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 33
- 229910021342 tungsten silicide Inorganic materials 0.000 description 33
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 23
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- 239000003870 refractory metal Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
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- QGLKJKCYBOYXKC-UHFFFAOYSA-N nonaoxidotritungsten Chemical compound O=[W]1(=O)O[W](=O)(=O)O[W](=O)(=O)O1 QGLKJKCYBOYXKC-UHFFFAOYSA-N 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 230000001603 reducing effect Effects 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- 239000004071 soot Substances 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 229910001930 tungsten oxide Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
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- WNUPENMBHHEARK-UHFFFAOYSA-N silicon tungsten Chemical compound [Si].[W] WNUPENMBHHEARK-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32192—Microwave generated discharge
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28247—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/3165—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
- H01L21/31654—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
- H01L21/31658—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe
- H01L21/31662—Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself by thermal oxidation, e.g. of SiGe of silicon in uncombined form
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
- H01L29/4011—Multistep manufacturing processes for data storage electrodes
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
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- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
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- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
- H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
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Definitions
- the present invention relates to a plasma oxidation treatment method for treating a semiconductor substrate using plasma and a method for manufacturing a semiconductor device.
- a silicide layer of a refractory metal such as tungsten is laminated on a polysilicon layer as a metal having excellent adhesion and workability with silicon having a low resistance value.
- a gate electrode having a metal polycide structure such as tungsten polycide (laminated film of WSiZpoly-Si) is attracting attention.
- the gate of a transistor is generally formed in the order of a well, a gate insulating film, and a gate electrode.
- An etching process is performed to form the gate electrode.
- the side surface of the polysilicon layer in the gate electrode is exposed, so when a voltage is applied to the gate electrode, electric field concentration occurs in the exposed portion, causing a product failure such as an increase in leakage current.
- the oxidation of polysilicon has been performed by thermal oxidation. Recently, plasma oxidation using plasma has been proposed (for example, WO2004Z073073).
- the oxidation of the metal-containing layer can be suppressed and the oxidation of only the polysilicon layer can be selectively performed by selecting the conditions of the plasma oxidation. At the same time, it is possible to suppress the formation of a biting portion of an oxide film called a parse beak at the edge of the polysilicon layer.
- parse beaks are suppressed when the polysilicon layer is oxidized by plasma. If it is restricted too much, the shape of the edge portion of the polysilicon layer becomes sharp without changing substantially, and there may be a problem that the electric field concentrates on this part and the leakage current increases. Therefore, contrary to the above, by selecting the conditions of plasma oxidation, it is also possible to intentionally advance the oxidation laterally at the edge of the polysilicon layer to form a so-called parse beak. RU
- the oxidation effect is relatively strong. Since the conditions must be selected, the selectivity of the polysilicon oxide to the metal in the metal silicide layer is reduced. As a result, the metal in the metal silicide layer is oxidized, causing problems such as shape change such as expansion of the metal silicide layer and generation of particles due to metal oxides, thereby improving the reliability of the semiconductor device. It will be greatly reduced.
- An object of the present invention is to appropriately form an oxide film at the edge of a silicon layer when a silicon oxide film is formed by oxidizing a silicon layer in a structure having a silicon layer and a metal-containing layer.
- Another object of the present invention is to provide a plasma oxidation treatment method capable of suppressing the acidity of a metal in a metal-containing layer while forming a parse beak shape having a proper thickness.
- a structure having at least a silicon layer and a metal-containing layer is subjected to an acid treatment to form a silicon oxide film on at least the silicon layer.
- a plasma oxidation treatment method comprising: performing a first plasma oxidation treatment at a treatment pressure of 1.33-66.67 Pa using a treatment gas containing at least hydrogen gas and oxygen gas; and And performing a second plasma oxidation treatment at a treatment pressure of 133.33 to 1333 Pa using a treatment gas containing at least hydrogen gas and oxygen gas after the oxidation treatment. .
- an insulating film is formed on a semiconductor substrate, and a laminated film having at least a polysilicon layer and a metal-containing layer is formed on the insulating film. Then, the laminated film is etched to form a laminated body of a polysilicon layer and a metal silicide layer, and a processing gas containing at least hydrogen gas and oxygen gas is applied to the laminated body.
- the first plasma acid treatment at a processing pressure of 1. 33-66. 67 Pa and a treatment containing at least hydrogen gas and oxygen gas after the first plasma acid treatment.
- a second plasma oxidation treatment at a processing pressure of 133.3 to 1333 Pa using a gas.
- a substrate on which an oxide film, a first polysilicon layer, an insulating film, a second polysilicon layer, and a metal-containing layer are sequentially formed.
- Pressure 1. 33-66. Performing the first plasma oxidation treatment at 67 Pa, and after the first plasma oxidation treatment, using a processing gas containing at least hydrogen gas and oxygen gas, processing pressure 133.
- Performing a second plasma oxidation treatment at 3 to 1333 Pa, and a plasma oxidation treatment method is provided.
- the silicon layer also has a polysilicon layer force
- the metal-containing layer is a metal silicide layer
- the structure is a stacked body formed by laminating them. is there.
- a tungsten silicide layer can be used as the metal silicide layer.
- the processing temperature of the first plasma oxidation treatment, the second plasma oxidation, The treatment temperature is preferably 250 to 800 ° C.
- the surface of the polysilicon layer is oxidized, the silicon on the surface of the metal silicide layer is oxidized, and the surface of the polysilicon layer is oxidized.
- the second plasma oxidization treatment may be performed by forming the silicon oxide film on the surface of the polysilicon layer and the metal silicide layer. It is possible to further advance the oxidation of the surface of the layer and to advance the oxidation of the edge of the polysilicon layer.
- the plasma oxidation treatment includes a plasma processing apparatus that generates plasma by introducing microwaves into a processing chamber using a planar antenna having a plurality of slots. Can be used.
- a MOS semiconductor device may be used as the semiconductor device. Togashi.
- the polysilicon layer may include a first polysilicon layer and a second polysilicon layer, and an insulating film is interposed between them.
- the first polysilicon layer can constitute a floating gate electrode
- the second polysilicon layer can constitute a control gate electrode.
- the insulating film may be formed by sequentially stacking an oxide film, a nitride film, and an oxide film. An example of such a structure is a flash memory device.
- a storage medium storing a program for controlling a plasma processing apparatus, wherein the program at the time of execution includes at least a silicon layer, a metal-containing layer, A plasma oxidation treatment method for forming a silicon oxide film at least on the surface of the polysilicon layer by oxidizing a structure having a gas, using a treatment gas containing at least hydrogen gas and oxygen gas , After performing the first plasma oxidation treatment at a treatment pressure of 1.33-66.67Pa and the first plasma oxidation treatment, a treatment gas containing at least hydrogen gas and oxygen gas is used.
- a storage medium is provided for causing a computer to control the processing apparatus so that a plasma oxidation treatment method is performed, including performing a second plasma oxidation treatment at a pressure of 133.3 to 1333 Pa.
- a planar antenna having a processing chamber capable of being evacuated for processing an object to be processed using plasma, and a plurality of slots for introducing microwaves into the processing chamber. And a plasma acid that forms a silicon oxide film on at least the surface of the polysilicon layer by oxidizing the structure having at least the silicon layer and the metal-containing layer in the processing container.
- a first plasma oxidation treatment using a treatment gas containing at least hydrogen gas and oxygen gas at a treatment pressure of 1.33-66.67 Pa, and the first plasma oxide solution.
- a plasma acid treatment method including performing a second plasma acid treatment at a treatment pressure of 133.3 to 1333 Pa using a treatment gas containing at least hydrogen gas and oxygen gas is performed.
- To control And control unit comprising a plasma processing apparatus is provided.
- a structure having at least a silicon layer and a metal-containing layer is oxidized. Therefore, when the silicon oxide film is formed on the surface of the polysilicon layer, the two-step plasma acid treatment as described above is performed to appropriately reduce the acid at the edge of the silicon layer. It is possible to suppress the oxidation of the metal in the refractory metal-containing layer while controlling the portion of the oxide film in a parsbeak shape having an appropriate thickness.
- the metal-containing layer typically in the first plasma acid treatment under the condition that the selectivity of silicon oxide to metal is high.
- this functions as a protective film, and the second plasma oxide is performed at a higher pressure than the first plasma oxide treatment.
- the metal in the metal silicide can be prevented from oxidizing during the treatment. Therefore, generation of particles due to metal oxides and expansion of the metal silicide layer can be prevented.
- the oxidation of the edge portion of the silicon layer can be actively promoted.
- the edge portion of the oxide film can be formed into a parsbeak shape having an appropriate thickness.
- FIG. 1 is a schematic cross-sectional view showing an example of a plasma processing apparatus suitable for carrying out the method of the present invention.
- FIG. 2 is a drawing showing the structure of a planar antenna member.
- FIG. 3 is a drawing schematically showing the structure of a gate electrode.
- FIG. 4A is a diagram schematically showing a gate electrode before plasma oxidation treatment.
- FIG. 4B is a diagram schematically showing the gate electrode after the first oxidation step.
- FIG. 4C is a diagram schematically showing the gate electrode after the second oxidation step.
- FIG. 5 is a flowchart showing the main process steps of plasma oxidation treatment.
- FIG. 6A TEM photograph showing the shape of the edge part of the bottom of the polysilicon layer of the gate electrode when treated with 6. 7 Pa.
- FIG. 6B is a TEM photograph showing the shape of the edge part of the lower part of the polysilicon layer of the gate electrode when treated with 400 Pa.
- FIG. 7 is a graph of a tungsten 2p spectrum obtained by surface analysis using an XPS apparatus.
- FIG. 8 is a graph of tungsten 2p spectrum by surface analysis using an XPS apparatus.
- FIG. 9A is a diagram schematically showing the structure of a flash memory element.
- FIG. 9B is a diagram showing a state in which the plasma oxidation treatment is applied to the flash memory element shown in FIG. 9A.
- FIG. 10 A TEM photograph showing the state of the flash memory device after acid treatment.
- FIG. 1 is a cross-sectional view schematically showing an example of a plasma processing apparatus that can be suitably used in the plasma oxidation treatment method of the present invention.
- the plasma processing apparatus 100 has a high density and high density by generating plasma by introducing microwaves into a processing chamber using a planar antenna having a plurality of slots, particularly an RLSA (Radial Line Slot Antenna). It is configured as an RLSA microwave plasma processing device that can generate microwave-excited plasma with a low electron temperature, and it has a plasma density of 1 X 10 1G to 5 X 10 12 Zcm 3 and is powerfully low at 0.7 to 2 eV. Low damage plasma treatment by electron temperature plasma is possible. Therefore, it can be suitably used for the purpose of forming a silicon oxide film in the manufacturing process of various semiconductor devices.
- the plasma processing apparatus 100 has a substantially cylindrical chamber 11 that is airtight and grounded.
- a circular opening 10 is formed in a substantially central portion of the bottom wall la of the chamber 11, and an exhaust chamber 11 that communicates with the opening 10 and protrudes downward is provided in the bottom wall la. ing.
- the exhaust chamber 11 is connected to an exhaust device 24 via an exhaust pipe 23.
- a silicon wafer which is a substrate to be processed (hereinafter simply referred to as "wafer").
- a mounting table 2 made of ceramics such as A1N with high thermal conductivity is provided.
- the mounting table 2 is supported by a support member 3 having a ceramic force such as a cylindrical A1N extending upward in the center of the bottom of the exhaust chamber 11.
- the mounting table 2 is provided with a cover ring 4 for covering the outer edge and guiding the wafer W.
- This cover ring 4 is made of, for example, quartz, A1N, Al ON
- a resistance heating type heater 5 is embedded in the mounting table 2.
- the heater 5 is heated by the heater power source 5a to heat the mounting table 2, and the heat is a substrate to be processed. Heat wafer W uniformly.
- the mounting table 2 is provided with a thermocouple 6 so that the heating temperature of the wafer W can be controlled, for example, in the range from room temperature to 900 ° C.
- wafer support pins (not shown) for supporting the wafer W and moving it up and down are provided so as to protrude and retract with respect to the surface of the mounting table 2.
- a cylindrical liner 7 having a quartz force is provided on the inner periphery of the chamber 11 to prevent metal contamination due to the material constituting the chamber.
- a baffle plate 8 for uniformly exhausting the inside of the chamber 11 is provided in an annular shape on the outer peripheral side of the mounting table 2, and the baffle plate 8 is supported by a plurality of columns 9.
- An annular gas introduction part 15 is provided on the side wall of the chamber 11, and a gas supply system 16 is connected to the gas introduction part 15.
- the gas introduction part may be arranged in a nozzle shape or a shutter shape.
- the gas supply system 16 includes, for example, an Ar gas supply source 17 and an O gas supply source.
- the gas introduction unit 15 is reached via the gas line 20 and is introduced into the chamber 11 from the gas introduction unit 15.
- Each of the gas lines 20 is provided with a mass flow controller 21 and opening / closing valves 22 around it.
- Ar gas instead of Ar gas, other rare gases such as Kr gas, Xe gas, and He gas can also be used.
- An exhaust pipe 23 is connected to a side surface of the exhaust chamber 11, and the exhaust apparatus 24 including a high-speed vacuum pump is connected to the exhaust pipe 23. Then, by operating the exhaust device 24, the exhaust device 24 is uniformly discharged into the space 11 a of the exhaust chamber 11 through the gas force notch plate 8 in the chamber 11 and exhausted through the exhaust pipe 23. As a result, the inside of the chamber 11 can be depressurized at a high speed to a predetermined degree of vacuum, for example, 0.133 Pa.
- a loading / unloading port 25 for loading / unloading the wafer W to / from a transfer chamber (not shown) adjacent to the plasma processing apparatus 100, and the loading / unloading port 25 are opened and closed.
- a gate valve 26 is provided!
- the upper portion of the chamber 11 has an opening, and an annular upper plate 27 is joined to the opening by the force.
- the lower part of the inner periphery of the upper plate 27 protrudes toward the inner space of the chamber and forms an annular support part 27a.
- a dielectric material such as quartz, Al 2 O, or A1N ceramics is used to transmit microwaves.
- the overplate 28 is provided in an airtight manner via the seal member 29. Therefore, the inside of the chamber 1 is kept airtight.
- a disk-shaped planar antenna member 31 is provided above the transmission plate 28 so as to face the mounting table 2.
- the shape of the planar antenna member 31 is not limited to a disk shape, and may be a square plate shape, for example.
- the planar antenna member 31 is locked to the upper end of the side wall of the chamber 11.
- the planar antenna member 31 is formed of, for example, a copper plate or aluminum plate force with a surface plated with gold or silver, and a plurality of slot-like microwave radiation holes 32 that radiate microwaves are formed in a predetermined pattern. It has been configured.
- the microwave radiation holes 32 have, for example, a long groove shape as shown in FIG. 2, and the adjacent microwave radiation holes 32 are typically arranged in a "T" shape. Radiation holes 3 2 are arranged concentrically. The length and the arrangement interval of the microwave radiation holes 32 are determined according to the wavelength ( ⁇ g) of the microwave. For example, the intervals of the microwave radiation holes 32 are arranged to be ⁇ gZ4, gZ2 or g. . In FIG. 2, the interval between adjacent microwave radiation holes 32 formed concentrically is indicated by Ar. Further, the microwave radiation holes 32 may have other shapes such as a circular shape and an arc shape. Furthermore, the arrangement form of the microwave radiation holes 32 is not particularly limited, and may be, for example, a spiral shape or a radial shape in addition to a concentric shape.
- a slow wave member 33 having a dielectric constant larger than that of vacuum is provided on the upper surface of the planar antenna member 31.
- the slow wave material 33 has a function of adjusting the plasma by shortening the wavelength of the microwave because the wavelength of the microwave becomes longer in vacuum.
- Planar It is preferable that the antenna member 31 and the transmission plate 28, and the slow wave member 33 and the planar antenna member 31 are in close contact with each other, but they are in close contact with each other.
- a shield lid 34 made of a metal material such as aluminum or stainless steel is provided on the upper surface of the chamber 11 so as to cover the planar antenna member 31 and the slow wave material 33.
- the upper surface of the chamber 11 and the shield cover 34 are sealed by a seal member 35.
- a cooling water flow path 34a is formed in the shield lid 34, and cooling water is allowed to flow therethrough to cool the shield lid 34, the slow wave material 33, the planar antenna member 31, and the transmission plate 28. It has become.
- the shield lid 34 is grounded.
- An opening 36 is formed in the center of the upper wall of the shield lid 34, and a waveguide 37 is connected to the opening.
- a microwave generator 39 for generating microwaves is connected to the end of the waveguide 37 via a matching circuit 38. Thereby, for example, a microwave having a frequency of 2.45 GHz generated by the microwave generator 39 is propagated to the planar antenna member 31 through the waveguide 37.
- the microwave frequency 8.35 GHz, 1.98 GHz, or the like can be used.
- the waveguide 37 includes a coaxial waveguide 37a having a circular cross section extending upward from the opening 36 of the shield lid 34, and a mode converter 40 at the upper end of the coaxial waveguide 37a. And a rectangular waveguide 37b extending in the horizontal direction.
- the mode change 40 between the rectangular waveguide 37b and the coaxial waveguide 37a has a function of converting the microphone mouth wave propagating in the TE mode in the rectangular waveguide 37b into the TEM mode.
- An inner conductor 41 extends in the center of the coaxial waveguide 37a, and the inner conductor 41 is connected and fixed to the center of the planar antenna member 31 at the lower end thereof. Thereby, the microwave is efficiently and uniformly propagated radially and uniformly to the planar antenna member 31 through the inner conductor 41 of the coaxial waveguide 37a.
- Each component of the plasma processing apparatus 100 is connected to and controlled by a process controller 50 having a CPU.
- the process controller 50 includes a keyboard that allows the process manager to input commands to manage the plasma processing apparatus 100, a display that displays and displays the operating status of the plasma processing apparatus 100, and the like.
- One interface 51 is connected!
- the process controller 50 performs various processes executed by the plasma processing apparatus 100.
- a storage unit 52 storing a recipe in which a control program (software) to be realized by the control of the process controller 50 and processing condition data is stored is connected.
- recipes such as the control program and processing condition data may be stored in a computer-readable storage medium such as a CD-ROM, a hard disk, a flexible disk, or a flash memory. For example, it is possible to transmit the data from time to time through a dedicated line and use it online.
- the plasma processing apparatus 100 configured in this way is capable of proceeding with damage-free plasma processing to the underlayer film and the like at a low temperature of 800 ° C or lower, and is excellent in plasma uniformity. Uniformity can be realized.
- this plasma processing apparatus 100 can be suitably used for, for example, the oxidation treatment of the polysilicon layer of the gate electrode.
- gate electrodes high-precision control of the side wall oxide of the gate electrode and low resistance of the gate electrode are required due to the demand for high integration of LSIs and miniaturization of design rules associated with high-speed gates.
- a tungsten polycide in which a polysilicon layer 63 is formed on a Si substrate 61 via a gate insulating film 62 and a tungsten silicide (WSi) layer 64 is further formed thereon as a metal-containing layer.
- WSi tungsten silicide
- the metal constituting the metal-containing layer is not limited to tungsten, and examples thereof include other high melting point metals such as molybdenum, tantalum, and titanium. Moreover, metals other than high melting
- a gate electrode formed with a nitride, an alloy, a single metal, or the like may be used.
- reference numeral 67 denotes a hard mask layer made of an insulating film such as silicon nitride (SiN) used for etching the gate electrode
- reference numeral 68 denotes silicon formed by selective oxidation. It is an acid film.
- FIG. 4A-4C show a tungsten polycide structure with a tungsten silicide layer 64 and a silicon oxide film 68.
- FIG. 4 schematically shows how the is formed.
- FIG. 4A shows the gate electrode 200 after etching.
- Reference numeral 61 denotes a Si substrate.
- a Si substrate 61, a P + or N + well region (diffusion region; not shown) doped with a p-type impurity or an n-type impurity is formed,
- a gate insulating film 62 SiO film is formed by thermal oxidation or the like.
- a polysilicon film is formed on the upper surface by CVD to form a polysilicon layer 63, and further, a high melting point electrode material for the purpose of reducing the specific resistance in order to increase the speed of the gate electrode 200.
- a tungsten silicide layer 64 is formed.
- the tungsten silicide layer 64 is formed by, for example, a CVD method in which the tungsten silicide layer 64 is directly deposited and a tungsten film is formed by sputtering, and then the tungsten silicide layer 64 is formed by thermal annealing. Methods can be used.
- a hard mask layer 67 such as silicon nitride is formed on the tungsten silicide layer 64, and a photoresist film (not shown) is further formed.
- the hard mask layer 67 is etched using the photoresist film as a mask by photolithography, and the tungsten silicide layer 64 and the polysilicon layer 63 are further formed using the photoresist film + hard mask layer 67 or the hard mask layer 67 as a mask.
- the gate electrode 200 is formed by sequentially etching. Through the series of etching processes, the side walls of the polysilicon layer 63 and the tungsten silicide layer 64 are exposed on the side surfaces of the gate electrode 200, and the gate insulating film 62 is also etched.
- FIG. 5 shows the main process steps for this plasma oxidation treatment.
- the gate valve 26 is opened, and the UE and W in which the gate electrode 200 is formed from the loading / unloading port 25 are loaded into the chamber 1 and placed on the susceptor 2 (step Sl). Then, the first acidification process is performed. In the first acid / oxidation process, first, the inside of the chamber 11 is evacuated (step S2), and the Ar gas supply source 17, O gas supply source 18 and H gas of the gas supply system 16 are supplied.
- step S3 a flow rate Ar gas: 0-2000mLZmin (sccm), H gas: 10
- ZO is preferably 1 or more, more preferably 2 or more, for example, 2-8.
- the inside of the chamber 11 is set to the processing pressure of the first oxidation process (step S 4).
- the chamber internal pressure is 1.33 to 66.
- the power of 67Pa is preferably 250 to 800 ° C, more preferably 300 to 500 ° C! /.
- the microwave from the microwave generator 39 is guided to the waveguide 37 through the matching circuit 38.
- the microwave power is preferably set to 1000 to 4000 W.
- the microphone mouth wave is supplied to the planar antenna member 31 through the rectangular waveguide 37b, the mode change 40, and the coaxial waveguide 37a in this order, and is supplied from the planar antenna member 31 through the microwave transmission plate 28 to the chamber 1. Radiated into the space above the wafer W inside.
- the microwave propagates in the TE mode in the rectangular waveguide 37b.
- the TE mode microwave is converted into the TEM mode by the mode change ⁇ 40, and the inside of the coaxial waveguide 37a becomes the planar antenna member 31. It is propagated towards.
- An electromagnetic field is formed in the chamber 1 by the microwave radiated from the microwave radiation hole 32 of the planar antenna member 31 through the microwave transmission plate 28 toward the chamber 1, and H
- the side wall of the polysilicon layer 63 exposed to the W gate electrode 200 is selectively oxidized to form a silicon oxide film (step S6).
- the microwave plasma has an electron density of approximately 1 ⁇ 10 1G to 5 ⁇ 10 12 Zcm 3 or higher when microwaves are emitted from a large number of microwave radiation holes 32 of the planar antenna member 31.
- the electron temperature is about 0.7-2 eV and the uniformity of plasma density is ⁇ 5% or less. Therefore, the surface of the polysilicon layer 63 is selectively oxidized at a low temperature for a short time to form a silicon oxide film 68.
- plasma damage such as ions to the underlying film is small.
- the silicon oxide film (SiO 2) is selectively formed on the surface of the exposed polysilicon layer 63 while suppressing the oxidation of tandastane in the tungsten silicide layer 64.
- Film) 68 can be formed.
- the surface of the tungsten silicide layer 64 is selectively oxidized while the silicon in the tungsten silicide layer 64 is selectively oxidized.
- a silicon oxide film SiO film
- the H / O ratio is set to 1 or more, preferably 2 to 8.
- the selectivity of the silicon oxide is increased by increasing the silicon oxide relative to the metal oxide such as tungsten.
- a silicon oxide film 68 is also formed on the surface of the tungsten silicide layer 64 (and the node mask layer 67).
- the silicon oxide film 68 on the surface of the tungsten silicide layer 64 is protected to suppress the oxidation of the tungsten (W) in the tungsten silicide layer 64 in the second oxidation process performed later. It can function as a film.
- step S7 After the plasma oxide treatment is performed until the silicon oxide film 68 reaches a predetermined thickness, the microphone mouth wave power is turned off and the first oxide process is completed (step S7).
- the parsbeak-shaped portion is formed at both ends of the gate oxidation film.
- a second acidifying step is carried out under high pressure conditions.
- step S8 the inside of the chamber 11 is evacuated (step S8), and then Ar gas, H gas and O gas are supplied from the Ar gas supply source 17, O gas supply source 18 and H gas supply source 19 of the gas supply system 16.
- step S9 the inside of the chamber 11 is set to a predetermined pressure (step S10).
- step S10 the pressure is set to a pressure relatively higher than the treatment pressure in the first oxidation step, and the oxidation treatment is performed.
- the pressure in the chamber it is preferable to set the pressure in the chamber to a high pressure of 133.3 to 1333 Pa, more preferably 266.6 to 66.5 Pa.
- the processing temperature is preferably 250 to 800 ° C. S is preferable, and 300 to 500 ° C. is more preferable.
- the flow rate is Ar gas: 0 to 2000 mLZmin (sccm), H gas: 10
- H ZO H and O
- the second acidifying step can be continued in the same chamber of the plasma processing apparatus 100 that has performed the first acidifying step. It is also possible to carry out by using another plasma processing apparatus.
- the microwave from the microwave generator 39 is guided to the waveguide 37 through the matching circuit 38.
- the microwave power is preferably 100 to 4000 W.
- an electromagnetic field is formed in the chamber 11 by the microwave radiated from the planar antenna member 31 through the microwave transmitting plate 28 to the chamber 1, and the H gas
- Ar gas and O gas are turned into plasma (step S11). This plasma further causes acid
- the acid at the lower edge portion of the polysilicon layer 63 is advanced to cause the gate acid treatment.
- Appropriate parsbeak-shaped portions 69 are formed on both ends of the film (step S12).
- the film thickness of the silicon oxide film 68 itself is somewhat increased by the plasma oxidation treatment at this time. As a result, a state like the gate electrode 202 shown in FIG. 4C is obtained.
- the surface of the tungsten silicide layer 64 In addition, a silicon oxide film 68 is selectively formed, and this silicon oxide film 68 is used to prevent oxidation of tungsten (W) in the tungsten silicide layer 64 in the second oxide process. Functions as a protective film. Accordingly, tungsten oxide in the tungsten silicide layer 64 (oxide WO is generated and scattered) is suppressed, and particle contamination of the wafer W due to the oxide and the tungsten silicide layer 64 is reduced. Expansion and the like are avoided. Therefore, the reliability of the semiconductor device using the gate electrode 202 can be ensured. In addition, particle contamination in the processing chamber 1 can be suppressed.
- step S13 After the plasma oxide treatment is performed until the silicon oxide film 68 reaches a predetermined film thickness, the microphone mouth wave power is turned off and the second oxide process is completed (step S13). Thereafter, the inside of the chamber 11 is evacuated (step S14), the gate valve 26 is opened, and the wafer W is unloaded from the loading / unloading port 25 (step S15). In this way, the processing for one wafer W is completed.
- Ar, O, and H are flow rates of ArZO / H.
- processing temperature is set temperature 600 ° C (wafer temperature 450 ° C)
- plasma supply power is 3400W
- processing time is silicon acid formed on the side wall of polysilicon layer 63
- the thickness of the film 68 was set to 10 nm.
- a wafer having a tungsten layer formed on a silicon substrate was prepared, and plasma treatment was performed using the plasma treatment apparatus 100 while changing the treatment pressure.
- the processing pressure was 6.7 Pa (50 mTorr) and 400 Pa (3 Torr).
- processing temperature is set temperature 600 ° C (wafer temperature 450 ° C)
- plasma power is 3400W
- processing time is silicon oxide film 68 formed on the side wall of polysilicon layer 63 The thickness was set to 10 nm.
- FIGS. 7 and 8 show surface analysis of the tungsten layer at the center (center) and edge (periphery) of the blanket wafer before and after the plasma treatment using an XPS analyzer (X-Ray Photoelectron Spectroscopy Analysis). Results are shown.
- FIG. 7 shows the results when the processing pressure of the plasma oxidation treatment is 6.7 Pa (50 mTorr), and
- FIG. 8 shows the results when the processing pressure is 400 Pa (3 Torr).
- curve A shows the measurement result of As depo (untreated; acidified, no state)
- curve C shows the measurement result of the center after plasma treatment
- curve E shows The measurement results at the edge after plasma treatment are shown.
- the tungsten oxide of the tungsten silicide layer 64 can be reduced. It was speculated that an appropriate parsbeak-shaped portion could be formed at the edge portion of the gate oxide film 62 on the lower surface of the polysilicon layer 63 while suppressing.
- a flash memory device was created, and a two-step plasma oxidation process was performed using the plasma processing apparatus 100 shown in FIG.
- a tunnel oxide film 304 is formed with a predetermined thickness in a memory cell region partitioned by the LOCOS oxide film 302.
- a first polysilicon layer 305 (FG Poly) is formed as a floating gate, and a first silicon oxide film 306, a nitride film 307, and a second silicon oxide film 308 are sequentially formed thereon.
- an insulating film having a so-called ONO laminated structure (ONO laminated film 330) is formed.
- a second polysilicon layer 309 (CG Poly) as a control gate and a tungsten silicide layer 310 (WSi) are formed on the ONO laminated film 330.
- an etch stopper layer such as SiN is formed on the tungsten silicide layer 310 (WSi). Then, the first polysilicon layer 305 (FG Poly), the second polysilicon layer 309 (CG Poly), and the side surface of the tungsten silicide layer 310 (WSi) are exposed by etching or the like. .
- the silicon substrate 301 having the above-described structure in which polysilicon and tungsten silicide are exposed is carried into the chamber 11, the processing pressure is 6.7 Pa (50 mTorr), and Ar, O, and H are used as processing gases.
- Flow ratio ArZO ZH 1000Zl00Z200mLZmin (sccm)
- the processing temperature is set to 800 ° C (wafer temperature 650 ° C), the power supplied to the plasma is 3.4 kW, and the processing time is the film thickness nm of the oxide film formed on the silicon substrate 301.
- the first oxidation process under the low pressure condition was performed in the chamber 11.
- the treatment pressure is 400 Pa (3 Torr), and Ar, O, and H are used as treatment gases.
- the temperature is set to 800 ° C (wafer temperature 650 ° C), the power supplied to the plasma is 3.4 kW, and the processing time is set so that the thickness of the oxide film formed on the silicon substrate 301 is 8 nm.
- the second oxidation process under high pressure conditions is performed in the chamber 11, and the first polysilicon layer 305 (FG Poly), the second polysilicon layer 309 (CG Poly), and the tungsten silicide layer A silicon oxide film was selectively formed on the exposed surface of 3 10 (WSi).
- FG Poly first polysilicon layer 305
- CG Poly second polysilicon layer 309
- tungsten silicide layer A silicon oxide film was selectively formed on the exposed surface of 3 10 (WSi).
- the flash memory element 300 subjected to the plasma oxidation treatment as described above was observed with a TEM (transmission electron microscope). The results are shown in FIG. As shown in FIG.
- the silicon oxide film was formed with a substantially uniform film thickness.
- the expansion of the tungsten silicide layer 310 (WSi) was not observed, and the oxidation of tungsten (W) was suppressed.
- FG Poly first polysilicon layer 305
- a parsbeak-shaped portion was formed.
- FIG. 9B schematically shows the flash memory device 300 after the above-described plasma oxidation treatment. That is, a silicon oxide film 311 is formed with a uniform thickness on the side wall of the first polysilicon layer 305 (FG Poly) as a floating gate, and the second polysilicon layer 309 (CG). The silicon oxide film 312 was formed with a uniform thickness on the side wall of Poly), and the silicon oxide film 313 was formed with a uniform thickness on the side wall of the tungsten silicide layer 310 (WSi). .
- a pars-beak-shaped portion 31 la is formed at the edge of the tunnel oxide film 304 on the lower surface of the first polysilicon layer 305 (FG Poly), and the first silicon oxide film on the upper surface of the first polysilicon layer 305 is formed.
- a parsbeak-shaped portion 3 l ib was formed on the edge portion of 306.
- a parsbeak-shaped portion 312a was formed on the edge portion of the second silicon oxide film 308 on the lower surface of the second polysilicon layer 309 (CG Poly) as the control gate.
- the present invention is not limited to the above-described embodiment, and various modifications can be made.
- the force shown in the example in which the present invention is applied to the oxidation treatment of the stacked body of the polysilicon layer and the tungsten silicide layer is not limited to this.
- a silicide layer of another refractory metal can be used, and a metal-containing layer other than silicide can also be used.
- a silicon layer other than the polysilicon layer may be used.
- the force shown in the example in which the polysilicon layer and the tungsten silicide layer form a stacked body is not necessarily stacked.
- the plasma processing apparatus is not limited to the RLS A microwave plasma processing apparatus, and various plasma processing apparatuses such as an ICP (inductively coupled plasma) system, a surface wave plasma system, an ECR plasma system, and a magnetron system are used. It is also possible.
- the present invention is not limited to the gate electrode of a transistor or a flash memory device.
- the semiconductor substrate is not limited to a silicon substrate, and a compound semiconductor substrate can be used.
- the semiconductor substrate is not limited to a semiconductor substrate, and can be applied to other substrates such as a glass substrate for a liquid crystal device. .
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US12/281,046 US7825018B2 (en) | 2006-02-28 | 2007-02-27 | Plasma oxidation method and method for manufacturing semiconductor device |
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JP (1) | JP5073645B2 (ja) |
KR (1) | KR100956705B1 (ja) |
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Cited By (6)
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WO2011013616A1 (ja) * | 2009-07-27 | 2011-02-03 | 東京エレクトロン株式会社 | 選択酸化処理方法、選択酸化処理装置およびコンピュータ読み取り可能な記憶媒体 |
JP2012516577A (ja) * | 2009-01-28 | 2012-07-19 | アプライド マテリアルズ インコーポレイテッド | 半導体デバイス上に共形酸化物層を形成するための方法 |
US8679970B2 (en) | 2008-05-21 | 2014-03-25 | International Business Machines Corporation | Structure and process for conductive contact integration |
JP2017022377A (ja) * | 2015-07-14 | 2017-01-26 | 株式会社半導体エネルギー研究所 | 半導体装置 |
JP2018056173A (ja) * | 2016-09-26 | 2018-04-05 | 株式会社日立国際電気 | 半導体装置の製造方法、記録媒体および基板処理装置 |
WO2020054038A1 (ja) * | 2018-09-13 | 2020-03-19 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置、及びプログラム |
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KR20090068020A (ko) * | 2007-12-21 | 2009-06-25 | 주식회사 하이닉스반도체 | 전하트랩층을 갖는 불휘발성 메모리소자의 게이트 형성방법 |
US7947561B2 (en) * | 2008-03-14 | 2011-05-24 | Applied Materials, Inc. | Methods for oxidation of a semiconductor device |
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US8492292B2 (en) * | 2009-06-29 | 2013-07-23 | Applied Materials, Inc. | Methods of forming oxide layers on substrates |
JP5567392B2 (ja) * | 2010-05-25 | 2014-08-06 | 東京エレクトロン株式会社 | プラズマ処理装置 |
JP2012216633A (ja) * | 2011-03-31 | 2012-11-08 | Tokyo Electron Ltd | プラズマ窒化処理方法、プラズマ窒化処理装置および半導体装置の製造方法 |
WO2013122874A1 (en) | 2012-02-13 | 2013-08-22 | Applied Materials, Inc. | Methods and apparatus for selective oxidation of a substrate |
JP6096470B2 (ja) * | 2012-10-29 | 2017-03-15 | 東京エレクトロン株式会社 | プラズマ処理方法及びプラズマ処理装置 |
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- 2007-02-27 CN CN2007800002240A patent/CN101313393B/zh not_active Expired - Fee Related
- 2007-02-27 TW TW096106851A patent/TWI396234B/zh not_active IP Right Cessation
- 2007-02-27 WO PCT/JP2007/053561 patent/WO2007099922A1/ja active Application Filing
- 2007-02-27 JP JP2008502779A patent/JP5073645B2/ja not_active Expired - Fee Related
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Publication number | Priority date | Publication date | Assignee | Title |
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US8679970B2 (en) | 2008-05-21 | 2014-03-25 | International Business Machines Corporation | Structure and process for conductive contact integration |
JP2012516577A (ja) * | 2009-01-28 | 2012-07-19 | アプライド マテリアルズ インコーポレイテッド | 半導体デバイス上に共形酸化物層を形成するための方法 |
JP2016028411A (ja) * | 2009-01-28 | 2016-02-25 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | 半導体デバイス上に共形酸化物層を形成するための方法 |
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JP2018056173A (ja) * | 2016-09-26 | 2018-04-05 | 株式会社日立国際電気 | 半導体装置の製造方法、記録媒体および基板処理装置 |
JPWO2020054038A1 (ja) * | 2018-09-13 | 2021-08-30 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置、及びプログラム |
WO2020054038A1 (ja) * | 2018-09-13 | 2020-03-19 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置、及びプログラム |
JP7165743B2 (ja) | 2018-09-13 | 2022-11-04 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置、及びプログラム |
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Also Published As
Publication number | Publication date |
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US20090047778A1 (en) | 2009-02-19 |
CN101313393A (zh) | 2008-11-26 |
CN101313393B (zh) | 2010-06-09 |
JPWO2007099922A1 (ja) | 2009-07-16 |
TWI396234B (zh) | 2013-05-11 |
KR100956705B1 (ko) | 2010-05-06 |
JP5073645B2 (ja) | 2012-11-14 |
TW200739730A (en) | 2007-10-16 |
US7825018B2 (en) | 2010-11-02 |
KR20080009755A (ko) | 2008-01-29 |
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