WO2006081881A1 - Verfahren und schaltungsanordnung zum überprüfen von elektrischen kontaktierungen zwischen einem ersten ausgangspin eines ersten leistungsschalters einer leistungsschaltvorrichtung und einem externen knoten und einem zweiten ausgangspin eines zweiten leistungsschalters der leistungsschaltvorrichtung und dem knoten - Google Patents
Verfahren und schaltungsanordnung zum überprüfen von elektrischen kontaktierungen zwischen einem ersten ausgangspin eines ersten leistungsschalters einer leistungsschaltvorrichtung und einem externen knoten und einem zweiten ausgangspin eines zweiten leistungsschalters der leistungsschaltvorrichtung und dem knoten Download PDFInfo
- Publication number
- WO2006081881A1 WO2006081881A1 PCT/EP2005/056236 EP2005056236W WO2006081881A1 WO 2006081881 A1 WO2006081881 A1 WO 2006081881A1 EP 2005056236 W EP2005056236 W EP 2005056236W WO 2006081881 A1 WO2006081881 A1 WO 2006081881A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- output pin
- circuit breaker
- voltage
- power circuit
- comparison value
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
- G01R19/16533—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
- G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/12—Modifications for increasing the maximum permissible switched current
- H03K17/122—Modifications for increasing the maximum permissible switched current in field-effect transistor switches
Definitions
- the invention relates to a method for checking electrical contacts between a first output pin of a first power switch of a power switching device and an external node and a second output pin of a second power switch of the power switching device and the node.
- Electronic circuit breakers such as half bridges, full bridges, high-side switches, low-side switches or the like, are known to be used in many applications for switching loads.
- Electronic power switching devices often include multiple power switches, which are interconnected and used as a unit.
- two output pins for such a power switching device.
- Such power switching devices are often equipped with diagnostic circuits. Currents and voltages can be measured via the diagnostic circuits. By means of the measured currents and voltages become hardware-technically
- Error symptoms such as "overcurrent” (OC), "low power overvoltage” (LVT, low voltage overvoltage) gate) or “line break voltage” (VOL, open load voltage) detected.
- OC overcurrent
- LVT low power overvoltage
- VOL line break voltage
- the existing diagnostic circuits are known to be used for the detection of error symptoms and not for checking the contacts of the output pins of the power switching devices, for example on a printed circuit board.
- a known diagnostic circuit consists, for example, of a pull-up structure and a pull-down structure, for example of resistors or current sources.
- a capacitive measuring method In a method used today for checking whether both output pins of the power switching device are contacted, a capacitive measuring method is used. In the capacitive measuring method used, an increased capacitance is indicated if there is no electrical connection between the two output pins and their respective circuit breakers present. Alternatively, the output pins can also be X-rayed during production and evaluated via a special image processing system. These above-mentioned, generally known methods for checking the contacting of the two output pins each require special measuring devices in order to be able to carry out the measurements. However, the special measuring devices for carrying out the measurements are cost-intensive.
- the object of the present invention is therefore to carry out the electrical contacts of sixteenzuallerden output pins of a power switching device in a simple manner and as inexpensively. As far as possible, no additional measuring devices should be necessary for the check.
- the diagnosis circuit present for diagnostic purposes that the two output pins to be connected outside the power switching device can be checked for their correct contacting without additional measuring devices.
- the pull-up structure of the power switching device is connected to an output pin and the pull-down structure of the power switching device to the other output pin. This saves costs for the verification of the two output pins, since no specially provided measuring devices are necessary.
- the use of this diagnostic circuit ensures that the implementation of the The method according to the invention is very simple in contrast to complex alternatives.
- the pull-up resistor and the pull-down resistor are interconnected in such a way that they form a voltage divider between a test voltage and ground.
- the pull-up resistor and the pull-down resistor are interconnected in such a way that they form a voltage divider between a test voltage and ground.
- the pull-up resistor and the pull-down resistor are designed such that they have an identical resistance value.
- the inventive method is further simplified by the identical resistance value for the pull-up resistor and the pull-down resistor.
- the first reference voltage is set such that it is less than half a test voltage.
- the second reference voltage is set such that it is greater than half a test voltage.
- the first comparison value is set to a positive logical signal level if the first voltage is greater than the first reference voltage. According to a further preferred development, the first comparison value is set to a negative logic signal level if the first voltage is less than the first reference voltage.
- the second comparison value is set to a negative logical signal level if the second voltage is less than the second reference voltage.
- FIG. 1 shows a schematic block diagram of an embodiment of a power switching device in which the method according to the invention according to FIG. 2 can be used;
- FIG. 2 is a schematic flow diagram of a preferred embodiment of the method according to the invention.
- identical or functionally identical elements and signals have been provided with the same reference numerals, unless stated otherwise.
- FIG. 1 shows a schematic block diagram of an exemplary embodiment of a power switching device 6 in which the inventive method described below with reference to FIG. 2 can be used.
- the power switching device 6 has a first power switch 3 and a second power switch 5.
- the two power switches 3, 5 are controlled by means of a control signal S.
- the first power switch 3 is coupled to a pull-down resistor 7 of the power switching device 6.
- the second power switch 5 is coupled to a pull-up resistor 8 of the power switching device 6.
- the first circuit breaker 3 is connected to the first output pin 2 when it is correctly manufactured.
- the second power switch 5 is connected to the second output pins 4 when correctly manufactured.
- the to be switched with the switching device 6 load 10 which is operated with a supply voltage Ubat, is connected to a node 9, with which also the first output pin 2 and the second output pin 4 of the power switching device 6 are connected.
- the pull-up resistor 8 and the pull-down resistor 7 are preferably interconnected in such a way that they form a voltage divider between see the test voltage Vt and ground 13.
- the pull-up resistor 8 and the pull-down resistor 7 preferably have the identical resistance value R.
- the first reference voltage Uref is preferably set to be less than half the test voltage Ut / 2.
- the second reference voltage Uref2 is preferably se set to be greater than half the test voltage Ut / 2.
- the first comparison value V1 is set to a positive logical signal level if the first one
- the first comparison value V1 is set to a negative logical signal level.
- the second comparison value V2 is set, for example, to a positive logic signal level, if the second voltage U2 is greater than the second reference voltage Uref2. Otherwise, the second comparison value V2 is set to a negative logical signal level.
- the power switching device 6 has a first comparator 11 and a second comparator 12 which are known to be used in conventional methods for determining fault symptoms such as overcurrent, low power switching device voltage or open circuit voltage.
- the first comparator 11 and the second comparator 12 are used to check whether there is an electrical contact Ia between the first output pin 2 and the first power switch 3 and an electrical contact Ib between the second output pin 4 and the second power switch 5 ,
- the first comparator 11 compares the first voltage Ul applied to the output pin 2 with the first reference voltage Uref, which is adjusted such that it is smaller than half the test voltage Ut / 2.
- the first comparator 11 sets the first comparison value V1 to a positive logical signal level when the first voltage Ul is greater than the first reference voltage Uref.
- the second comparator 12 compares the second voltage U2 applied to the second output pin 4 with the second reference voltage Uref2, which is adjusted such that it is greater than half the test voltage Ut / 2.
- the second comparator 12 sets the second comparison value V2 to a positive logical signal level when the second voltage U2 is greater than the second reference voltage Uref2.
- the contact Ia between the first output pin (2) and the external node (9) and / or the contact (Ib) between the second output pin (4) and the external node (9) is interrupted, if the first Comparison value (Vl) to a negative logic signal level and the second comparison value (V2) are set to a positive logic signal level. If this is determined, the power switching device 6 checked after production is not suitable for transmitting the desired current via the common node 9 by means of the two output pins 2, 4.
- Figure 2 shows a schematic flow diagram of a preferred embodiment of the inventive method for checking electrical contacts Ia, Ib between see the first output pin 2 and the external node 9 and between the second output pin 4 and the node 9 of a power switching device 6.
- the first Circuit breaker 3 is coupled to the pull-down resistor 7 of the power switching device 6 and the second power switch 5 is coupled to the pull-up resistor 8 of the power switching device 6.
- the first output pin 2 and the second output pin 4 are connected to a common node 9 outside the power switching device 6 (see in particular FIG. 1).
- the method according to the invention will be explained below with reference to the block diagram in FIG.
- the method according to the invention comprises the following method steps:
- the first power switch 3 is coupled to a pull-down resistor 7 and the second power switch is coupled to a pull-up resistor 8.
- the first output pin 2 and the second output pin 4 are connected to each other via a node 9 arranged outside the power switching device 6.
- a dropping at the pulldown resistor 7 first voltage Ul is compared with an adjustable first reference voltage U refl for determining a first comparison value Vl.
- the first reference voltage Urefl is set to be less than half a test voltage Ut / 2.
- the first comparison value V1 is set to a positive logic signal level if the first voltage Ul is greater than the first reference voltage Uref, and the first comparison value V1 is set to a negative logic signal level if the first voltage Ul is smaller than the first reference voltage U - refl is.
- Method step d A second voltage U2 applied to the output pin 4 is compared with an adjustable second reference voltage Uref2 to determine a second comparison value V2.
- the second reference voltage Uref2 is set to be greater than half the test voltage Ut / 2.
- the second comparison value V2 is set to a positive logical signal level if the second voltage U2 is greater than the second reference voltage Uref2 is, and the second comparison value V2 is set to a negative logic signal level, if the second voltage U2 is smaller than the second reference voltage Uref2.
- the pull-up resistor 8 and the pull-down resistor 7 are formed to have an identical resistance value R (see FIG. 2).
- the manufactured power switching device 6 is not useful to the currents of the first circuit breaker 3 and 3 via the external node 9 of the second power switch 5 to increase the Stromtragfä- ability to transmit together.
- the first output pin 2 with the first power switch 3 and the second output pin 4 are not contacted with the second power switch 5, if the first comparison value Vl set to a negative logic signal level and the second comparison value V2 to a positive logic signal level are.
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Keying Circuit Devices (AREA)
- Electronic Switches (AREA)
- Direct Current Feeding And Distribution (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
Description
Claims
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/815,212 US7719286B2 (en) | 2005-02-01 | 2005-11-25 | Method and circuit arrangement for verifying electrical contacts between a first output pin of a first power switch of a power switch device and an external node and a second output pin of a second power switch of said power switch device and said node |
JP2007552536A JP2008528979A (ja) | 2005-02-01 | 2005-11-25 | 電力スイッチ装置の第1電力スイッチの第1出力ピンと、外部ノードと、前記電力スイッチ装置の第2電力スイッチの第2出力ピンと、ノードとの間の電気的接触接続を検査するための方法および回路装置 |
KR1020077020001A KR101206893B1 (ko) | 2005-02-01 | 2005-11-25 | 전력 회로 차단기 장치의 제 1 전력 회로 차단기의 제 1 출력 핀과 외부 노드 사이 및 상기 전력 회로 차단기 장치의 제 2 전력 회로 차단기의 제 2 출력 핀과 노드 사이의 전기 콘택들을 검사하기 위한 방법 및 회로 |
EP05816268A EP1844341A1 (de) | 2005-02-01 | 2005-11-25 | Verfahren und schaltungsanordnung zum überprüfen von elektrischen kontaktierungen zwischen einem ersten ausgangspin eines ersten leistungsschalters einer leistungsschaltvorrichtung und einem externen knoten und einem zweiten ausgangspin eines zweiten leistungsschalters der leistungsschaltvorrichtung |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005004608.8 | 2005-02-01 | ||
DE102005004608A DE102005004608B3 (de) | 2005-02-01 | 2005-02-01 | Verfahren und Schaltungsanordnung zum Überprüfen von elektrischen Kontaktierungen zwischen einem ersten Ausgangspin eines ersten Leistungsschalters einer Leistungsschaltvorrichtung und einem externen Knoten |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006081881A1 true WO2006081881A1 (de) | 2006-08-10 |
Family
ID=35962164
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2005/056236 WO2006081881A1 (de) | 2005-02-01 | 2005-11-25 | Verfahren und schaltungsanordnung zum überprüfen von elektrischen kontaktierungen zwischen einem ersten ausgangspin eines ersten leistungsschalters einer leistungsschaltvorrichtung und einem externen knoten und einem zweiten ausgangspin eines zweiten leistungsschalters der leistungsschaltvorrichtung und dem knoten |
Country Status (7)
Country | Link |
---|---|
US (1) | US7719286B2 (de) |
EP (1) | EP1844341A1 (de) |
JP (1) | JP2008528979A (de) |
KR (1) | KR101206893B1 (de) |
CN (1) | CN100549703C (de) |
DE (1) | DE102005004608B3 (de) |
WO (1) | WO2006081881A1 (de) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006045308B4 (de) * | 2006-09-26 | 2011-07-21 | Continental Automotive GmbH, 30165 | Schaltungsanordnung zum Detektieren des Zustandes einer an einen Schaltanschluss verbindbaren Lasteinrichtung und Verfahren zum Betreiben einer solchen Schaltungsanordnung |
DE102008018244B3 (de) * | 2008-04-10 | 2009-11-19 | Continental Automotive Gmbh | Vorrichtung und Verfahren zum Erkennen eines Fehlers in einer Leistungsbrückenschaltung |
EP2609436B1 (de) | 2010-08-26 | 2014-07-23 | Inergy Automotive Systems Research (Société A.) | Verfahren zur diagnose einer elektrischen schaltung |
DE102011088912A1 (de) * | 2011-12-16 | 2013-06-20 | Continental Automotive Gmbh | Schaltungsanordnung zur Detektion eines Kurzschlusses bei einer Leistungsschalteranordnung |
CN102608456B (zh) * | 2012-03-02 | 2014-08-13 | 华为技术有限公司 | 并机线故障检测装置和系统 |
DE102014219468A1 (de) * | 2014-09-25 | 2016-03-31 | Siemens Aktiengesellschaft | Schaltungsanordnung mit einem mindestens einen binären Eingang aufweisenden Steuergerät und zugehöriges Betriebsverfahren |
JP6522201B1 (ja) * | 2018-05-14 | 2019-05-29 | ウィンボンド エレクトロニクス コーポレーション | 半導体装置 |
DE102018219692A1 (de) * | 2018-11-16 | 2020-05-20 | Siemens Aktiengesellschaft | Schutzschaltgerät für einen Niederspannungsstromkreis zur Erkennung von seriellen Fehlerlichtbögen |
CN113219323A (zh) * | 2021-04-29 | 2021-08-06 | 深圳数马电子技术有限公司 | 一种芯片引脚连通性的测试装置、方法和可读存储介质 |
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EP0287919A1 (de) * | 1987-04-10 | 1988-10-26 | Siemens Aktiengesellschaft | Schaltungsanordnung zum Überwachen eines Stromkreises auf Unterbrechung |
JPH0823074A (ja) * | 1994-07-05 | 1996-01-23 | Mitsubishi Denki Semiconductor Software Kk | 半導体集積装置 |
EP0706265A2 (de) * | 1994-10-06 | 1996-04-10 | Kabushiki Kaisha Toshiba | Stromdetektorschaltung |
US5867014A (en) * | 1997-11-20 | 1999-02-02 | Impala Linear Corporation | Current sense circuit having multiple pilot and reference transistors |
EP1306680A1 (de) * | 2001-10-24 | 2003-05-02 | Delphi Technologies, Inc. | Schaltungsanordnung zur Laststromüberwachung |
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DE214462C (de) | ||||
DD214462A1 (de) * | 1983-04-11 | 1984-10-10 | Greifswald Nachrichtenelekt | Schaltungsanordnung zum digitalen kontaktierungstest |
US5357519A (en) * | 1991-10-03 | 1994-10-18 | Apple Computer, Inc. | Diagnostic system |
EP0747930B1 (de) * | 1995-05-19 | 2000-09-27 | STMicroelectronics S.r.l. | Elektronische Schaltung mit mehreren Banddrähten, Herstellungsmethode und Testverfahren des Banddrahtzusammenhangs |
JP3011234B2 (ja) * | 1997-10-07 | 2000-02-21 | 日本電気株式会社 | 半導体装置のワイヤオープン検出方法及び装置 |
JP3149925B2 (ja) * | 1998-08-28 | 2001-03-26 | 日本電気株式会社 | 回路基板プロービング方式 |
US6385739B1 (en) * | 1999-07-19 | 2002-05-07 | Tivo Inc. | Self-test electronic assembly and test system |
TW451212B (en) * | 1999-12-03 | 2001-08-21 | Macronix Int Co Ltd | Read only memory chip having a built in testing circuit |
DE10025908A1 (de) * | 2000-05-26 | 2001-08-02 | Voith Turbo Kg | Leistungsschalter |
US6573753B1 (en) * | 2001-07-20 | 2003-06-03 | Cypress Semiconductor Corporation | Microcontroller input/output nodes with both programmable pull-up and pull-down resistive loads and programmable drive strength |
US6792378B2 (en) * | 2002-11-21 | 2004-09-14 | Via Technologies, Inc. | Method for testing I/O ports of a computer motherboard |
JP2004347423A (ja) * | 2003-05-21 | 2004-12-09 | Denso Corp | 電気負荷の異常検出装置及び電子制御装置 |
DE10347979A1 (de) * | 2003-10-15 | 2005-05-19 | Voith Turbo Gmbh & Co. Kg | Diagnostizierbare Schalteranordnung |
JP2006047006A (ja) * | 2004-08-02 | 2006-02-16 | Denso Corp | 断線検出回路 |
-
2005
- 2005-02-01 DE DE102005004608A patent/DE102005004608B3/de active Active
- 2005-11-25 CN CNB2005800476233A patent/CN100549703C/zh active Active
- 2005-11-25 US US11/815,212 patent/US7719286B2/en active Active
- 2005-11-25 KR KR1020077020001A patent/KR101206893B1/ko active IP Right Grant
- 2005-11-25 EP EP05816268A patent/EP1844341A1/de not_active Ceased
- 2005-11-25 WO PCT/EP2005/056236 patent/WO2006081881A1/de active Application Filing
- 2005-11-25 JP JP2007552536A patent/JP2008528979A/ja active Pending
Patent Citations (5)
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EP0287919A1 (de) * | 1987-04-10 | 1988-10-26 | Siemens Aktiengesellschaft | Schaltungsanordnung zum Überwachen eines Stromkreises auf Unterbrechung |
JPH0823074A (ja) * | 1994-07-05 | 1996-01-23 | Mitsubishi Denki Semiconductor Software Kk | 半導体集積装置 |
EP0706265A2 (de) * | 1994-10-06 | 1996-04-10 | Kabushiki Kaisha Toshiba | Stromdetektorschaltung |
US5867014A (en) * | 1997-11-20 | 1999-02-02 | Impala Linear Corporation | Current sense circuit having multiple pilot and reference transistors |
EP1306680A1 (de) * | 2001-10-24 | 2003-05-02 | Delphi Technologies, Inc. | Schaltungsanordnung zur Laststromüberwachung |
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Title |
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PATENT ABSTRACTS OF JAPAN vol. 1996, no. 05 31 May 1996 (1996-05-31) * |
See also references of EP1844341A1 * |
Also Published As
Publication number | Publication date |
---|---|
DE102005004608B3 (de) | 2006-04-20 |
EP1844341A1 (de) | 2007-10-17 |
CN100549703C (zh) | 2009-10-14 |
US20080150539A1 (en) | 2008-06-26 |
KR101206893B1 (ko) | 2012-11-30 |
KR20070105352A (ko) | 2007-10-30 |
US7719286B2 (en) | 2010-05-18 |
JP2008528979A (ja) | 2008-07-31 |
CN101111773A (zh) | 2008-01-23 |
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