WO2006057335A1 - ダイボンディング装置 - Google Patents
ダイボンディング装置 Download PDFInfo
- Publication number
- WO2006057335A1 WO2006057335A1 PCT/JP2005/021671 JP2005021671W WO2006057335A1 WO 2006057335 A1 WO2006057335 A1 WO 2006057335A1 JP 2005021671 W JP2005021671 W JP 2005021671W WO 2006057335 A1 WO2006057335 A1 WO 2006057335A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- electrode
- die bonding
- semiconductor chip
- insulating film
- gripping device
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Definitions
- the present invention relates to a die bonding apparatus capable of effectively holding an object such as a semiconductor chip when the object is die bonded.
- a semiconductor chip is formed by forming circuit elements on the surface of a silicon wafer, then attaching a wafer sheet to the back surface of the silicon wafer, and then dividing (dicing) each semiconductor chip.
- the manufactured and divided semiconductor chips are peeled one by one from the wafer sheet, picked up and mounted on a mounting substrate such as a lead frame, tape substrate, organic hard substrate, etc., previously coated with an adhesive such as silver paste. Then, die bonding is performed sequentially (see, for example, Japanese Patent Laid-Open No. 9289219 (page 2 and FIG. 1, FIG. 2) and Japanese Patent Laid-Open No. 8-186132 (page 2 and FIG. 1, FIG. 3)).
- thermocompression film adhesive on both surfaces of a bonding resin such as an insulating film.
- thermocompression bonding film is cut into a predetermined size and attached onto a mounting substrate, and a semiconductor chip is thermocompression bonded onto the mounting substrate with a thermocompression film (for example, (See JP 2004-6599, pages 3, pages 5 to 10, and FIGS. 1 and 3).
- thermocompression bonding film In a die bonding apparatus using such a thermocompression bonding film, it is necessary to sequentially carry a thermocompression bonding film and a semiconductor chip.
- an adhesive sheet for attaching a wafer which has both a wafer fixing function at the time of processing a semiconductor wafer and a die attaching function in a die bonding process, has already been proposed (for example, JP 2002-294177 A (Refer to page 2)) By using such an adhesive sheet for wafer bonding, the process can be simplified.
- reference numeral 4 indicates a bonding wire
- reference numeral 5 indicates a wiring board.
- an adhesive insulating film is conveyed, the lower semiconductor chip 1 is conveyed in a temporarily bonded state, and die bonded to manufacture a die bonder.
- a second layer stacking is performed on top.
- This second layer stack can be stacked in the second step through substantially the same process by being put back into the same apparatus as the first step, for example. That is, an adhesive insulating film is transported to the land above the die bonder, and after the temporary bonding, the upper semiconductor chip 2 is transported and heated at a predetermined temperature to perform die bonding to perform two steps. A laminate is obtained.
- the obtained laminated body is stocked directly or temporarily, and is transported to a wire bonding process as a next process of the die bonding process.
- the wire on the circuit forming surface of the lower semiconductor chip 1 is transferred.
- the bonding electrode pattern and the wire bonding electrode pattern of the upper semiconductor chip 2 and the wire bonding electrode pattern on the surface side wiring forming surface of the mounting substrate are connected by the bonding wire 4 to form a stacked structure as shown in FIG. A package is obtained.
- any die bonding method and apparatus a semiconductor chip is held (picked up) onto a mounting apparatus.
- the mounting process to convey is an essential process.
- an insulating film is used as an adhesive or an insulating material
- an insulating film mounting process is required in addition to the semiconductor chip mounting process.
- collets vacuum suction pads
- an insulating film (such as an adhesive film) is adsorbed and transported onto a mounting substrate for mounting.
- a collet attached to the tip of such a gripping device has a pyramid collet 6 (see Fig. 3) having a recess 6c communicating with the suction port 6b at the tip 6a, and the tip surface 7a is flat.
- a flat collet 7 (see FIG. 4 or FIG. 5) having a suction port 7b opened at the center of the flat front end surface 7a and various other shapes is known.
- the pyramid collet 6 is made of a metal and is relatively expensive. Further, since the semiconductor chip 8 as an object is held in the recess 6c, a dedicated collet corresponding to the size of the semiconductor chip 8 is required, and the collet needs to be replaced whenever the chip specification is changed. There is a problem. In addition, since the semiconductor chip 8 is held by the inclined surface 6d in the recess 6c, the thin semiconductor chip 8 of about 100 m or less is caused by the concentrated stress generated at the end 8a of the semiconductor chip 8. There is a problem that a crack may occur in the semiconductor chip 8 and the yield decreases.
- the size of the insulating film similar to that of the pyramid collet having the recess 6c is limited depending on the position of the force suction port for solving the void generation by the shape of the collet This may cause a problem that the characteristics of the flat collet may be impaired.
- An object of the present invention is to solve such a problem of the vacuum suction type collet, so that the object can be dealt with even when the size of the object is changed, and the object is damaged.
- a die bonding device equipped with a gripping device that can be gripped and transported without causing voids even when the object is a flexible material such as a film material. Is to provide.
- a gripping device for gripping an object such as a semiconductor chip or an insulating film and the gripping device has an electrostatic adsorption mechanism for electrostatically attracting the object.
- a concave portion is not required as compared with a collet by vacuum attraction, so that the size of an object is changed. And can be transported without damaging the object.
- FIG. 1 is a perspective view showing a first embodiment of a die bonding apparatus according to the present invention.
- FIG. 2 is an elevational view, partly in section, showing an example of a gripping device provided in the die bonding apparatus shown in FIG.
- FIG. 3 is a cross-sectional view showing a state where a semiconductor chip is held by a conventional pyramid collet.
- FIG. 4 is a cross-sectional view showing a state where a semiconductor chip is held by a conventional flat collet.
- FIG. 5 is a cross-sectional view showing a state where an insulating film is gripped by a conventional flat collet.
- FIG. 6 is a cross-sectional view showing an example of a general stacked package.
- Substrate feeder 200 Gripping device
- FIG. 1 shows a first embodiment of a die bonding apparatus according to the present invention.
- the die bonding apparatus 100 includes a supply base 103 on which a plurality of objects 104 such as semiconductor chips are placed, and a base on which a mounting substrate 105 to which the objects 104 are attached is placed.
- the material supply device 108 and the object 104 on the supply table 103 are grasped one by one, for example, and each of the grasped objects 104 is conveyed onto the corresponding mounting substrate 105.
- a gripping device 200 is provided.
- the object 104 is not limited to the semiconductor chip as described above, and a film or a sheet-like member can be used.
- the mounting substrate 105 includes a lead frame, a tape substrate, an organic hard substrate, and the like.
- the supply table 103 is moved in two plane directions X and Y orthogonal to each other by an XY table (not shown).
- a wafer sheet 102 is arranged on the supply table 103, and a plurality of semiconductor chips as the target object 104 cut into chips are pasted on the wafer sheet 102 (see FIG. 1). .
- the substrate supply device 108 has a conveyor or a transport rail that moves in the X direction, which is the traveling direction.
- the substrate supply device 108 includes a mounting substrate 105, for example, a lead. A frame is placed.
- the mounting substrate that is, the object package on the upper surface 107 of the lead frame 105 is used.
- Adhesive 106 is pre-applied to the landing location (land).
- the adhesive 106 is, for example, a silver paste, and is supplied onto the lead frame 105 by an adhesive supply device (not shown) or the like disposed on the upstream side of the base material supply device 108.
- the gripping device 200 grips the object 104 by electrostatic adsorption. More specifically, the gripping device 200 has an electrostatic adsorption mechanism that holds the object 104 by static electricity. This electrostatic adsorption mechanism will be described later.
- the gripping device 200 is connected to a moving mechanism (not shown). As shown in FIG. 1, the moving mechanism reciprocates the gripping device 200 in the Y direction (lateral direction) between the upper position of the supply table 103 and the upper position of the base material supply device 108, and moves up and down. Move in the Z direction, which is the direction, and then move in the X direction (vertical direction) substantially perpendicular to the Y direction.
- This gripping device adsorbs a semiconductor chip 104 as an object on a supply base 103 by an electrostatic adsorption mechanism, and the adsorbed object 104 is placed on an adhesive 106 provided on a mounting substrate 105.
- the object 104 is configured to be mounted on the mounting substrate 105 by being released at the above.
- the electrostatic adsorption mechanism includes a base member 204, an insulating plate 203 attached to one surface of the base member 204, an electrode device 202 embedded in the insulating plate 203, and A voltage control unit 205 connected to the electrode device 202.
- the electrode device 202 includes, for example, a pair of electrode elements 202a and 202b having the same area.
- the pair of electrode elements 202a and 202b are arranged so that the surfaces thereof are alternately adjacent to each other and form a plane.
- the electrode elements 202a and 202b are each connected to the voltage control unit 205. Controlled voltages having different polarities are applied from the voltage control unit 205 to the electrode elements 202a and 202b. When the voltage control unit 205 cuts off the voltage, the respective electrode elements 202a and 202b are grounded. Thus, these electrode elements are controlled.
- the holding surface 201 of the insulating plate is a surface that sucks and holds the object 104.
- the holding surface 201 also has a substantially flat surface force of the insulating plate.
- substantially flat means to include a surface provided with fine concaves and convexes that do not substantially affect electrostatic attraction of an object.
- the holding surface 201 is configured to attract the object 104 by a surface having a certain area, it can cope with a case where the size of the object 104 changes. Is possible. In other words, objects of various sizes can be adsorbed.
- the holding surface 201 applies a uniform electrostatic attraction force toward the surface of the object 104, the object 104 is thin, so that no local stress is generated on the object. Even a semiconductor chip does not generate cracks or the like in the object.
- the electrode elements 202a and 202b have the same area, the object 104 is not charged.
- the crack generation rate of the semiconductor chip was about 5%.
- the die bonding apparatus of the present invention According to the results, it was found that this crack can be reduced to substantially 0%.
- a film adhesive is used instead of the adhesive 106 in the first embodiment.
- an insulating film (polyimide tape) supply section having a thickness of about 20 m is disposed near the supply base 103 in the first embodiment.
- An insulating film gripping device having substantially the same function as that of the above-described gripping device 200 is disposed.
- a first gripping device that sucks the insulating film and a second gripping device that sucks the semiconductor chip are provided.
- the first gripping device is arranged upstream of the second gripping device in the transport direction of the mounting substrate on which the insulating film and the semiconductor chip are fixed! Speak.
- At least one of the first gripping device and the second gripping device has an electrostatic chucking mechanism that electrostatically chucks the insulating film or the semiconductor chip as described in the first embodiment. is doing.
- the insulating film supply unit has a configuration in which an insulating film cut in advance to a predetermined size is stored, or a tape-like insulating film is cut each time with a cutter or the like and supplied to the insulating film gripping device. .
- the insulating film is supplied by the insulating film supply unit force and is mounted on the mounting location (land) using the insulating film gripping apparatus.
- the insulating film is fixed, and then preheating is performed and the die bonding apparatus shown in FIG.
- a die bonding apparatus having substantially the same function as the die bonding apparatus described in FIG. 1 of Japanese Patent Application Laid-Open No. 2004-6599 is used, and the suction port 7b shown in FIG.
- the void rate when using a thin polyimide tape of about 20 m is about 20%.
- the void rate is about 20%. Was reduced to 5%.
- a lead frame is used as the mounting substrate 105, but the same effect can be obtained even with a tape substrate, an organic hard substrate, or other mounting substrate. Can do.
- the present invention is not limited to the object 104 as long as the object 104 is an object used in the force die bonding apparatus described as an example of the semiconductor chip and the insulating film.
- an insulating film may be temporarily fixed on the back surface of the semiconductor chip in advance.
- the gripping device 200 is movable in the vertical and horizontal directions and in the up-and-down direction. You may change suitably according to the movement of these supply apparatuses.
- the electrostatic adsorption mechanism has a structure including a pair of electrode elements and an insulating plate, but is not limited to this structure.
- the die bonding apparatus as described above can be mounted not only on a thin material that is fragile as the object 104 but also on a mounting substrate such as a soft material such as a film.
- a mounting substrate such as a soft material such as a film.
- insulating films and semiconductor chips can be stacked alternately to be used for manufacturing various types of memory and stacked packages with high integration.
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004-342189 | 2004-11-26 | ||
JP2004342189A JP2006156550A (ja) | 2004-11-26 | 2004-11-26 | ダイボンディング装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006057335A1 true WO2006057335A1 (ja) | 2006-06-01 |
Family
ID=36498069
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/021671 WO2006057335A1 (ja) | 2004-11-26 | 2005-11-25 | ダイボンディング装置 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2006156550A (ja) |
TW (1) | TW200620494A (ja) |
WO (1) | WO2006057335A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101220920B1 (ko) * | 2010-12-23 | 2013-02-08 | (주)아폴로테크 | 와이어 본딩장치 및 본딩방법 |
JP6667326B2 (ja) * | 2016-03-17 | 2020-03-18 | ファスフォードテクノロジ株式会社 | ダイボンダおよびボンディング方法 |
JP6824520B2 (ja) * | 2016-10-12 | 2021-02-03 | 株式会社昭和真空 | 電子部品の製造方法および装置 |
JP6832720B2 (ja) * | 2017-01-25 | 2021-02-24 | 株式会社日本マイクロニクス | チャック装置、及びチャック方法 |
JP7015707B2 (ja) * | 2018-02-15 | 2022-02-03 | 株式会社ディスコ | 被加工物の加工方法 |
DE102018125903A1 (de) * | 2018-10-18 | 2020-04-23 | Osram Opto Semiconductors Gmbh | Haftstempel und Verfahren zum Transfer fehlender Halbleiterchips |
EP3846334A4 (en) | 2019-09-11 | 2021-12-08 | Creative Technology Corporation | FASTENING / RELEASING DEVICE |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002299384A (ja) * | 2001-04-04 | 2002-10-11 | Toray Eng Co Ltd | チップボンディング方法およびその装置 |
JP2003007810A (ja) * | 2001-06-26 | 2003-01-10 | Mitsubishi Heavy Ind Ltd | 静電チャック |
JP2003285289A (ja) * | 2002-03-27 | 2003-10-07 | Tsukuba Seiko Co Ltd | ハンドリング装置及び搬送装置並びにハンドリング方法 |
-
2004
- 2004-11-26 JP JP2004342189A patent/JP2006156550A/ja active Pending
-
2005
- 2005-11-24 TW TW094141245A patent/TW200620494A/zh unknown
- 2005-11-25 WO PCT/JP2005/021671 patent/WO2006057335A1/ja active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002299384A (ja) * | 2001-04-04 | 2002-10-11 | Toray Eng Co Ltd | チップボンディング方法およびその装置 |
JP2003007810A (ja) * | 2001-06-26 | 2003-01-10 | Mitsubishi Heavy Ind Ltd | 静電チャック |
JP2003285289A (ja) * | 2002-03-27 | 2003-10-07 | Tsukuba Seiko Co Ltd | ハンドリング装置及び搬送装置並びにハンドリング方法 |
Also Published As
Publication number | Publication date |
---|---|
TW200620494A (en) | 2006-06-16 |
JP2006156550A (ja) | 2006-06-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US10748802B2 (en) | Placing ultra-small or ultra-thin discrete components | |
WO2006057335A1 (ja) | ダイボンディング装置 | |
JP2006332563A (ja) | ウェハ搬送装置、ウェハ積層体搬送装置及び積層型半導体装置製造方法 | |
US11728201B2 (en) | Methods for releasing ultra-small or ultra-thin discrete components from a substrate | |
JP2005507172A (ja) | ダイ取付用途のための接着剤ウェファー | |
JP2008277688A (ja) | 移載装置及び移載方法 | |
JP2003243430A (ja) | 半導体素子用デュアルダイボンディング装置及びその方法 | |
JP2019054209A (ja) | 半導体製造装置、半導体装置の製造方法およびコレット | |
JP2008103390A (ja) | 半導体装置の製造方法 | |
US9038264B2 (en) | Non-uniform vacuum profile die attach tip | |
JP5493713B2 (ja) | 基板ホルダ、基板貼り合わせ装置、基板ホルダ対および搬送装置 | |
KR101304282B1 (ko) | 임시 본딩된 디바이스 웨이퍼의 디본딩 방법 | |
WO2024070009A1 (ja) | 静電キャリア、処理システム及び処理方法 | |
JP4184993B2 (ja) | 部品実装方法及びその装置 | |
JP2002353401A (ja) | チップ吸着用ダイコレット及び半導体製造方法 | |
JP2005089007A (ja) | 剥離装置及び剥離方法 | |
JP2005203413A (ja) | 電子部品、電子部品保持方法および実装済基板 | |
JP2005129912A (ja) | 受動素子の供給方法および半導体パッケージ製造用受動素子ならびに受動素子 | |
JPH11121491A (ja) | バンプボンディング装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KM KN KP KR KZ LC LK LR LS LT LU LV LY MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU LV MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 05809634 Country of ref document: EP Kind code of ref document: A1 |