WO2006030814A1 - 抵抗変化素子及びそれを用いた不揮発性メモリ - Google Patents
抵抗変化素子及びそれを用いた不揮発性メモリ Download PDFInfo
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- WO2006030814A1 WO2006030814A1 PCT/JP2005/016913 JP2005016913W WO2006030814A1 WO 2006030814 A1 WO2006030814 A1 WO 2006030814A1 JP 2005016913 W JP2005016913 W JP 2005016913W WO 2006030814 A1 WO2006030814 A1 WO 2006030814A1
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- Prior art keywords
- electrode
- material layer
- resistance change
- resistance
- oxygen
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- 229910052739 hydrogen Inorganic materials 0.000 description 9
- 229910052786 argon Inorganic materials 0.000 description 7
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- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
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- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/004—Reading or sensing circuits or methods
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- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0021—Auxiliary circuits
- G11C13/0069—Writing or programming circuits or methods
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of switching materials, e.g. deposition of layers
- H10N70/026—Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/041—Modification of switching materials after formation, e.g. doping
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/061—Shaping switching materials
- H10N70/066—Shaping switching materials by filling of openings, e.g. damascene method
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
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- G11C2013/0054—Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
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- G—PHYSICS
- G11—INFORMATION STORAGE
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- G11C13/0069—Writing or programming circuits or methods
- G11C2013/009—Write using potential difference applied between cell electrodes
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- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/30—Resistive cell, memory material aspects
- G11C2213/31—Material having complex metal oxide, e.g. perovskite structure
Definitions
- the present invention relates to a resistance change element and a nonvolatile memory using the resistance change element.
- a variable resistance element having V is disclosed.
- Patent Document 1 US Patent No. 6204139
- Patent Document 2 JP 2003-068983 A
- Non-Patent Document 1 Physics Reports Vol.346 (2001) pp.387-531
- the resistance change element using the oxide shown by PCMO has room for improvement in terms of operation stability and reproducibility.
- the manufacturing process of the variable resistance element may include a heat treatment process in a hydrogen atmosphere (that is, in a reducing atmosphere) for the purpose of reducing leakage current, as in a general semiconductor process.
- a heat treatment process in a hydrogen atmosphere that is, in a reducing atmosphere
- oxygen desorption occurs during heat treatment in a reducing atmosphere.
- the electrical conduction mechanism of the oxide changes, the resistance change capability disclosed in Patent Document 1 is inhibited, and in the worst case, the resistance change does not occur.
- the present invention has been made in view of the strong point, and it is a main object of the present invention to provide a resistance change element in which a decrease in resistance change capability is suppressed even when heat treatment is performed in a reducing atmosphere. .
- the present invention relates to the following resistance change element, a manufacturing method thereof, and a nonvolatile memory using the resistance change element.
- [0012] It is composed of a material layer and a first electrode and a second electrode, which are two electrodes electrically connected to the material layer, and a current flows between the first electrode and the second electrode. Or a resistance change element in which the resistance of the material layer changes by applying a voltage,
- An oxide semiconductor having a perovskite structure has a composition formula: Pr Ca CoO (where X Is 0. 4 ⁇ x ⁇ 0.6)).
- a resistance change element in which the resistance of the material layer is changed by applying a current or voltage between the electrode and the second electrode.
- An oxide semiconductor having a perovskite structure has a composition formula: Pr Ca CoO (where X
- variable resistance element according to Item 7, wherein 1 -X X 3 indicates 0.4 ⁇ x ⁇ 0.6.
- variable resistance element according to Item 7, wherein a current or voltage is applied in a pulse shape.
- a nonvolatile memory including the variable resistance element according to item 7 and a transistor, wherein the variable resistance element and the transistor are electrically connected.
- variable resistance element of the present invention has a material layer of RMCoO (where R represents a rare earth element, M
- the material layer exhibits a resistance change characteristic equal to or better than that of a conventional PCMO by being subjected to a heat treatment in an oxygen atmosphere (hereinafter also referred to as "oxygen treatment").
- oxygen treatment oxygen atmosphere
- the resistance change element of the present invention can be suitably applied to a nonvolatile memory.
- a nonvolatile memory can be obtained by combining the variable resistance element of the present invention and a transistor.
- the resistance change element of the present invention can be applied to a sensor that detects light, heat, stress, magnetism, and the like in addition to a logic circuit.
- the resistance change element of the present invention can also be applied to an electronic device that requires a random access memory function, such as an image display.
- FIG. 1 is a schematic configuration diagram of a resistance change element.
- FIG. 2 is a conceptual diagram of the configuration of a memory element.
- FIG. 3 is a configuration diagram of memory elements arranged in an array.
- FIG. 4 is a diagram showing a memory operation method of the memory element.
- FIG. 5 is an explanatory diagram of an output detection operation of the resistance change element.
- FIG. 6 is a schematic configuration diagram of a memory element.
- FIG. 7 is a diagram showing a method for manufacturing a memory element.
- FIG. 8 is an external view of a variable resistance element of Example 1 and a memory element of Example 2.
- FIG. 9 is a diagram showing a method for manufacturing a memory element (resistance change element).
- FIG. 10 is a diagram showing a memory operation method of a memory element (resistance change element).
- variable resistance element of the present invention and a nonvolatile memory using the variable resistance element will be described.
- the resistance change element of the present invention has a chemical formula: RMCoO (where R represents a rare earth element, and M represents
- the resistance of the material layer is changed by applying a current or a voltage between the first electrode and the second electrode.
- the material layer is made of an oxide semiconductor having a perovskite structure represented by a chemical formula: RMCoO.
- R represents a rare earth element
- M represents an alkaline earth element (the same applies hereinafter).
- the material layer (oxide semiconductor) represented by the above chemical formula does not exhibit resistance change characteristics only by being formed by a thin film manufacturing method.
- the oxygen treatment in which the material layer is heated in an oxygen atmosphere, It exhibits resistance change characteristics equivalent to or better than PCMO of the product.
- a decrease in resistance change capability is suppressed. That is, the resistance change characteristic developed by oxygen treatment is stably maintained against the non-stoichiometry of RMCoO. Even if oxygen desorption occurs due to the heat treatment, it is stably maintained.
- R may be a rare earth element, and among these, Pr is preferable.
- M may be an alkaline earth element, but Ca is preferred among them. That is, as the oxide semiconductor having a perovskite structure, a compound represented by the chemical formula: PrCaCoO is preferable. More specifically
- An oxide semiconductor is preferable.
- the R and M elements in the oxide semiconductor having a perovskite structure are not limited to one type.
- a part of Ca may be replaced with Sr, Ba, or the like.
- the combination of powerful elements can be selected as appropriate according to the characteristics of the variable resistance element that is the final product.
- the first electrode and the second electrode are electrically connected to the material layer, respectively. Then, by applying a current or a voltage between the first electrode and the second electrode, the resistance of the material layer changes.
- Examples of the electrically connected mode include a mode in which the material layer is sandwiched, in which the first electrode is stacked on one side of the material layer and the second electrode is stacked on the other side. It is done.
- the first electrode also referred to as the lower electrode
- the first electrode is an electrode on which a material layer can be formed. That is, when the variable resistance element of the present invention is manufactured by laminating an electrode and a material layer, after forming the material layer on the first electrode (lower electrode), the second electrode (upper portion) is formed on the material layer. It is also manufactured by forming an electrode).
- the resistance change element may be formed on a substrate as indicated by 14 in FIG.
- An example of the substrate is a Si (100) substrate having a thermal oxide film on the surface.
- the first electrode an electrode on which a material layer can be formed is used.
- the material of the first electrode include platinum (Pt), iridium (Ir), and oxides thereof.
- Pt platinum
- Ir iridium
- oxides thereof When the material is used, it is preferable because the crystal structure of the first electrode is stably maintained even when exposed to a high-temperature oxygen atmosphere in the oxygen treatment process of the material layer.
- Other materials include conductive oxides such as SrTiO and SrRuO that partially contain Nb, Cr, La, and the like. The material is
- the first electrode may be a single layer made of the above-described materials, or may be a multilayer formed by combining a plurality of materials.
- the first electrode has a multilayer of Pt and Ti, and Ti adheres to SiO.
- the second electrode may be a conductive material!
- the material of the second electrode include gold (Au), platinum (Pt), noretium (Ru), iridium (Ir), iridium tantanole (Ir-Ta), titanium (Ti), aluminum (A1 ), Copper (Cu), tantalum (Ta), tin-doped indium oxide (ITO), and the like. These materials are preferable from the viewpoint of reducing the consumption electrode of the resistance change element having a low resistivity.
- the second electrode may be a single layer made of the above materials or a multilayer composed of a plurality of materials.
- the thicknesses of the material layer, the first electrode, and the second electrode are not particularly limited.
- the thickness of the material layer is usually preferably about 50 to 1000 nm.
- the thickness of the first electrode is usually preferably about 50 to 1000 nm.
- the thickness of the second electrode is usually preferably about 50 to about LOOOnm.
- the resistance of the material layer is changed by applying a current or a voltage between the first electrode and the second electrode. And the resistance value after a change is hold
- the application mode of the current or voltage is not limited, but it is preferable to apply a pulsed power in view of reducing the power consumption of the variable resistance element and increasing the speed.
- the resistance value of the material layer can be easily controlled by adjusting the polarity and magnitude of the pulse.
- pulsed voltage shown waveform
- current is also called pulse current.
- variable resistance element of the present invention has the above characteristics, it can be suitably applied to a nonvolatile memory (memory element).
- a nonvolatile memory memory element
- it can be applied as a nonvolatile memory by electrically connecting a resistance change element and a transistor.
- variable resistance element of the present invention and a nonvolatile memory using the variable resistance element will be specifically described with reference to the drawings.
- variable resistance element shown in FIG. 1 has a perovskite structure represented by a chemical formula: RMCoO
- the resistance value of the material layer 12 changes and the resistance value is maintained.
- the application of current or voltage is preferably pulsed. In this case, it is possible to reduce the power consumption during writing / erasing / reading of the resistance change element and to speed up the resistance change operation. In addition, the pulse shape is preferred from the viewpoint of Joule heat loss and device efficiency.
- the resistance of the material layer 12 can be changed to a high state force and a low state force. it can.
- the resistance can be changed from a low state to a high state by applying the pulse with the polarity reversed.
- a positive bias is defined as the positive sign of the potential of the second electrode 13 and a negative bias is defined as the reverse.
- the resistance change element of the present invention can be applied to a nonvolatile memory (memory element).
- the nonvolatile memory can be manufactured by electrically connecting the variable resistance element and the transistor.
- a memory element 20 can be formed by electrically connecting a transistor (switching element) 21 and a resistance change element.
- the memory element 20 may be used alone or in combination.
- the memory elements 20 may be used arranged in a matrix (see FIG. 3).
- a random access nonvolatile memory can be obtained.
- Bn of the bit line 33 and Wn of the word line 31 Bn, Wn
- Writing to and reading from the memory element can be performed by changing the magnitude of the applied pulse bias.
- the positive bias is SET (write)
- the negative bias is R ESET (erase)
- READ (read) is about 1Z1000 to 1Z4 compared to the voltage at SET 'RESET. Changes in current obtained by applying a small voltage to are detected.
- a reference resistor 51 as shown in FIG. 5 so as not to be affected by variations in the absolute value of the resistor.
- variable resistance element of the present invention includes the following steps:
- a second electrode forming step of forming a second electrode on the material layer that has undergone the oxygen treatment step can be suitably manufactured by the manufacturing method.
- an insulating acid such as SiO is formed on the substrate 14 on which the transistor 21 is arranged.
- the insulating oxide film 66 separates the upper and lower electrodes (lower wiring and upper wiring) of the memory element and acts as an interlayer insulating layer.
- an insulating material such as 2 2 3 or a laminate strength thereof.
- the insulating oxide film 66 can be formed by a general thin film process. For example, pulsed laser deposition (PLD); ion beam deposition (IBD); cluster ion beam; sputtering methods such as RF, DC, ECR, helicon, ICP, counter target; PVD (Physical Vapor Deposition) such as MBE, ion plating method, etc.
- PLD pulsed laser deposition
- IBD ion beam deposition
- cluster ion beam cluster ion beam
- sputtering methods such as RF, DC, ECR, helicon, ICP, counter target
- PVD Physical Vapor Deposition
- MBE Physical Vapor Deposition
- the thin film process can also be applied to the formation of the first electrode 11 (lower electrode), the contact electrode 61, the material layer 12, and the second electrode 13 (upper electrode).
- a contact hole 71 is formed in the insulating oxide film 66.
- the contact hole 71 can be formed by general fine processing. For example, microfabrication used in semiconductor processes; GMR, TMR magnetic head, magnetic memory (MRAM), etc.
- microfabrication used in the process for manufacturing a functional device can be used. Specific examples include physical or chemical etching methods such as ion milling, RIE (Reactive Ion Etching), and FIB (Focused Ion Beam).
- RIE Reactive Ion Etching
- FIB Flucused Ion Beam
- a photolithography technique using a stepper, an EB (Electron Beam) method, or the like may be combined.
- the microfabrication technology can also be applied to the processing of other layers.
- the planarization process can be performed by CMP (Chemical Mechanical Polishing), cluster ion beam etching, or the like.
- an acid oxide having a perovskite structure represented by RMCoO is deposited and the surface is deposited.
- the material layer 12 embedded in the contact hole 71 exhibits resistance change characteristics by performing oxygen treatment.
- the resistance change characteristic of the material layer 12 after the oxygen treatment is sufficiently maintained even when the material layer 12 is subsequently subjected to heat treatment in a reducing atmosphere.
- the oxygen treatment step is a step of heating the material layer 12 in an oxygen atmosphere (an atmosphere containing one or more oxygen molecules, ozone, and a group force including atomic oxygen force is also selected).
- the heating temperature is a temperature at which oxygen can react actively with the material layer 12.
- the atmosphere contains oxygen molecules, about 400 to 800 ° C is preferable.
- the heating temperature can be set as appropriate depending on the type of atmosphere, such as a range force of 100 to 800 ° C.
- the heating time is appropriately set according to the heating temperature. Usually, it is about 30 minutes to 12 hours, and when the heating temperature is low! In general, set the heating time longer.
- the oxygen treatment step may be performed on the material layer that is in the process of being formed only by the formed material layer 12. Yes. Depending on the thickness, type, and the like of the material layer 12, it may be difficult to diffuse oxygen only by subjecting the formed material layer to oxygen treatment. Therefore, oxygen can be sufficiently diffused throughout the material layer by incorporating an oxygen treatment step in the middle of the formation of the material layer. In this case, the material layer 12 finally subjected to the oxygen treatment is obtained by repeating the material layer formation step and the oxygen treatment step.
- the second electrode 13 (upper electrode) is provided.
- the film is formed by combining a thin film process, fine processing, flattening, and the like.
- the variable resistance element shown in Fig. 1 was fabricated by magnetron sputtering.
- the first electrode 11 was made of 200 nm Pt.
- Pr_Ca CoO hereinafter referred to as “PCCO” in Example 1
- the second electrode 13 was made of lOOOnm Ag.
- PCCO material layer 12
- Atmospheric gas Mixed gas of oxygen and argon (oxygen partial pressure is 20% of total pressure) • Input power: 100W.
- the substrate temperature was again set to 650 ° C, and 300 nm of PCCO was further deposited.
- Example 1 When returning to room temperature after deposition, the same oxygen treatment as described above was performed again. That is, in Example 1, the material layer forming step and the oxygen treatment step were repeated twice.
- Example 1 nine types of resistance change elements were manufactured by shaking the composition X of PCCO.
- a resistance change element was manufactured in the same manner as in Example 1 except that oxygen treatment was not performed.
- Comparative Example 2 (Conventional Example B), Pr Ca MnO (hereinafter referred to as Comparative Example 2) was applied to the material layer 12.
- the resistance change element was manufactured using “PCMO”.
- a method of manufacturing the variable resistance element of Comparative Example 2 is as follows.
- the substrate 14 a Si (lOO) substrate having a thermal oxide film on its surface was used.
- the materials and formation methods of the first electrode 11 and the second electrode 13 were the same as those in Example 1.
- PCMO material layer 12
- Atmospheric gas Mixed gas of oxygen and argon (oxygen partial pressure is 20% of total pressure) • Input power: 100W.
- the growth was temporarily stopped and oxygen treatment was performed.
- the oxygen treatment was performed by holding the material layer at 500 ° C. for 5 hours in a pure oxygen atmosphere of 50 Pa.
- the substrate temperature was again set to 700 ° C, and 300 nm of PCMO was further deposited.
- PCMO Pr Ca MnO
- variable resistance element was manufactured using the above. In Comparative Example 3, except that oxygen treatment was not performed Then, a resistance change element was produced in the same manner as in Comparative Example 2.
- Example 1 The material layer 12 formed in Example 1 and Comparative Examples 1 to 3 was all polycrystalline as a result of examination by X-ray diffraction.
- FIG. 8 shows an external view of the variable resistance element manufactured in Example 1 and Comparative Examples 1 to 3. Such an appearance was formed by using a metal mask in the following manner.
- a first metal mask having a rectangular opening with a width of 0.5 mm and a length of 10 mm was disposed on the substrate 14.
- a second metal mask having a 1 mm ⁇ 1 mm square opening was prepared and arranged so that the center of the opening coincided with the center of the rectangle of the first electrode 11.
- the material layer 12 was formed by depositing PCCO or PCMO on the metal mask.
- the first metal mask is placed so that the center of the opening coincides with the center of the material layer 12, and the long side direction of the first electrode 11 and the long side direction of the opening of the metal mask are Arranged to be orthogonal.
- the second electrode 13 having a width of 0.5 mm and a length of 10 mm was formed.
- Example 1 and Comparative Examples 1 to 3 resistance change elements having a junction area (overlapping area of the first electrode, the material layer, and the second electrode) of 0.5 mm ⁇ O.5 mm were manufactured.
- Example 1 and Comparative Examples 1 to 3 a Pt single layer film was used as the first electrode 11, but it is not limited to a single layer film, and may be a multilayer film in combination with other materials.
- Pt and SiO on the substrate surface have poor adhesion, Ti or other material can be used between Pt and the substrate to prevent separation.
- An adhesive layer may be provided to form a multilayer film.
- conductive materials such as Au, Pt, Cu, Al, and ITO may be used alone. Use a combination of conductive materials.
- writing to the resistance change element was performed by applying a SET voltage and a RESET voltage as shown in FIG. 4, and the resistance value of the resistance change element was measured with the READ voltage.
- the voltage was a pulse voltage, and was applied between the first electrode 11 and the second electrode 13 using a pulse generator.
- the SET voltage was 5V
- the RESET voltage was 15V
- both pulse widths were 25 Ons.
- the READ voltage was IV and the pulse width was 250ns.
- the resistance change rate (%) is the maximum resistance value read after applying the SET voltage and RESET voltage, and R is the minimum value.
- Resistance change rate (%) (R -R) / R X IOO
- Table 1 shows the value of the resistance change rate of each resistance change element.
- each resistance change element was heated to 400 ° C at room temperature and 0.5 hours at 400 ° C. Retained. Thereafter, after the temperature was lowered to room temperature, the resistance change rate of each resistance change element was examined in the same manner as described above. Table 1 shows the resistance change rate of each resistance variable element.
- the resistance change elements of Sample Nos. 11 to 19 maintained a resistance change rate of 10% or more after the heat treatment in a reducing atmosphere. In particular, a large resistance change rate was maintained in the composition range of 0.4 ⁇ x ⁇ 0.6.
- the resistance change elements of Conventional Example A (Comparative Example 1) and Conventional Example B (Comparative Example 2) have a resistance change rate of 5% or less after heat treatment in a reducing atmosphere, and have stable characteristics. It deteriorated to the point where it was difficult to detect it automatically. The writing and erasing operations with the SET voltage and RESET voltage are also unstable.
- PCMO is sensitive to oxygen deficiency in a reducing atmosphere even when oxygen treatment is applied, and has poor resistance change characteristics. It is remarkable.
- RMCoO such as PCCO and PCMO are similar in that oxygen non-stoichiometry is slight.
- PCMO like the Mn oxide having the perovskite structure described in Non-Patent Document 1, has a characteristic change with respect to the oxygen non-stoichiometry, or the resistance change characteristic is rapidly increased by heat treatment in a reducing atmosphere. It is changing sharply.
- RMCoO has a slight change in the absolute conductivity due to the heat treatment.
- the resistance change characteristic is highly retainable.
- PC CO is gold at a low temperature specifically near the composition of Pr Ca CoO (0.4 ⁇ x ⁇ 0.6).
- the material layer 12 includes Pr Ca CoO (hereinafter referred to as Pr Ca CoO
- FIG. 9 shows a manufacturing procedure of the memory element. Hereinafter, the manufacturing procedure will be described with reference to FIG.
- a substrate 14 having a MOS transistor 21 and a Si (100) plane on the surface was prepared.
- An insulating oxide film 66 was deposited on the substrate 14 by sputtering (FIG. 9 (a)).
- a contact hole 71 was formed in the insulating oxide film 66 by photolithography and ion milling (FIG. 9 (b)).
- an Ir layer 72 having a thickness of 600 nm was formed by a sputtering method (FIG. 9 (c)), and then the surface was treated with CMP to obtain the embedded first electrode shown in FIG. 9 (d). 11 and contact electrode 61 were formed.
- an extraction electrode 91 made of Ir and having a thickness of 200 nm was formed by sputtering. From the above, a lower electrode with a diameter of 0.8 m was formed at a location avoiding the top of the transistor (Fig. 9 (e)).
- the material layer 12 (PCCO) was formed.
- the material layer 12 was formed by a magnetron notter under the following conditions (Fig. 9 (f)).
- Atmospheric gas Mixed gas of oxygen and argon (oxygen partial pressure is 20% of total pressure) • Input power: 100W.
- the growth was once stopped and oxygen treatment was performed.
- the oxygen treatment was performed by holding the material layer at 500 ° C. for 5 hours in a pure oxygen atmosphere of 50 Pa.
- the substrate temperature was again set to 650 ° C, and PCCO was further deposited by lOOnm.
- the same oxygen treatment as described above was performed.
- a PCCO thin film (12 in Fig. 9 (f)) with a total thickness of 400 nm was obtained.
- the PCCO thin film was subjected to photolithography and ion milling to obtain a diameter of 0.
- a contact hole 71 having a diameter of 0.35 / z m was formed on the material layer 12 (PCCO) by photolithography (FIG. 9 (i)).
- the second electrode 13 having a thickness of 300 nm is formed. Formed. (Fig. 9 (j))
- the second electrode was formed by magnetron sputtering.
- the atmosphere of magnetron sputtering was an argon atmosphere of 0.7 Pa.
- Example 2 the extraction electrode 91 is provided, and the material layer 12 (PCCO) is formed at a location avoiding the top of the transistor for the following reason.
- a flat portion that avoids this is more advantageous for forming a highly crystalline material layer 12 (PCCO) than directly above a transistor that is prone to unevenness due to many processes.
- the present invention is not limited to this, and a configuration in which the material layer 12 is disposed directly on the transistor may be employed.
- Example 2 The memory element fabricated in Example 2 corresponds to the conceptual diagram shown in FIG. Such a memory element is provided with a bit line connected to the second electrode 13 and a word line connected to the gate electrode 65, and by controlling these, memory performance by writing, erasing and reading is exhibited.
- Example 2 an output obtained by writing and erasing was detected by applying a voltage to the word wiring, and a read signal was obtained by detecting a differential output with the resistance change element for comparison. The transistor was turned on at the timing of writing, erasing, and reading.
- a timing chart showing the operation of the memory element is shown in FIG.
- the memory element manufactured in Example 2 can be a random access type memory element by arranging in an array as shown in FIG.
- Example 4 For comparison with the memory element of Example 2, a memory element of Comparative Example 4 (Conventional Example D) was fabricated.
- the memory element of Comparative Example 4 was fabricated by the same procedure as in Example 2 except that PCMO was used as the material layer 12.
- Example 2 The memory power of Example 2 and Comparative Example 4 (Conventional Example D) was also evaluated in terms of heat treatment resistance in a reducing atmosphere, from the viewpoint of memory operation.
- each memory element was raised to 400 ° C at room temperature in an atmosphere in which a mixed gas of hydrogen and nitrogen (with 5% of the total amount of hydrogen) flowed, and then 0 ° C at 400 ° C. Hold for 5 hours. Thereafter, the memory operation was confirmed after the temperature was lowered to room temperature.
- the memory operation was confirmed by detecting the output obtained by writing and erasing by applying a voltage to the word wiring. Specifically, the MOS transistor is operated and FIG. After applying SET and RESET voltages as shown in 0, reading and applying the READ voltage, the memory operation was confirmed from the change in current characteristics.
- Example 3 (Sample Nos. 3-1 to 3-8)
- variable resistance elements Eight types were fabricated according to the following procedure.
- a substrate 14 having a Si (100) surface was prepared.
- the first electrode 11 (Pt) having a thickness of 400 nm was formed on the substrate 14 by magnetron sputtering.
- the first electrode 11 is a Pt single layer film, but as described above, it may be a multilayer film.
- the conditions for magnetron sputtering were as follows.
- next material layer 12 was formed on the first electrode 11.
- Sample number 3—3 La Ba CoO (hereinafter referred to as “LBCO”).
- Atmospheric gas Mixed gas of oxygen and argon (oxygen partial pressure is 20% of total pressure) • Input power: 100W.
- the material layer 12 was kept at 500 ° C for 5 hours in a pure oxygen atmosphere of lOOPa. Raw processing was performed. As described above, a material layer 12 having a thickness of 600 nm subjected to oxygen treatment was obtained. The material layer 12 (LCCO, LSCO and LBCO) was confirmed to be all polycrystalline by X-ray diffraction.
- a second electrode 13 (Ag) having a thickness of lOOOnm was formed using a metal mask having an opening with a diameter of 0.5 mm.
- the second electrode 13 was formed by magnetron sputtering under the following conditions.
- the material layer 12 was changed to the following to produce a resistance change element. Other conditions are the same as above.
- the material layer was changed to the following one in which Ca of LCCO and Sr of LSCO were partially replaced with Ba, to produce a resistance change element.
- Other conditions are the same as described above.
- Example 3 The eight types of resistance change elements fabricated in Example 3 were evaluated for heat resistance by the same heat treatment as in Example 1, and a mixed gas of hydrogen and nitrogen (the amount of hydrogen was 5% of the total) was flowed. In this state, the temperature was raised to 400 ° C at room temperature and held at 400 ° C for 0.5 hours. Table 2 shows the resistance change rate. All of the resistance change elements Nos. 3-1 to 3-8 produced in Example 3 maintained good characteristics even after the heat treatment, but in particular, Sample 3-8 was stable before and after the heat treatment. Retains resistance change characteristics!
- Nd 0 B Sr 0. 5 Co0 3 advantageously 840 600 71.4
- variable resistance element of the present invention has a perovskite structure whose material layer is represented by RMCoO.
- the material layer By subjecting the material layer to an oxygen treatment that is heated in an oxygen atmosphere, the material layer exhibits resistance change characteristics equivalent to or better than conventional PCMO. In addition, the resistance of the material layer after oxygen treatment is sufficiently maintained even when heat treatment is performed in a reducing atmosphere later.
- the resistance change element of the present invention can be preferably applied to a nonvolatile memory.
- a nonvolatile memory can be obtained by combining the variable resistance element of the present invention and a transistor.
- the resistance change element of the present invention can be applied to sensors that detect light, heat, stress, magnetism, and the like in addition to logic circuits.
- the variable resistance element of the present invention can also be applied to electronic devices that require a random size access memory function such as an image display.
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US8144498B2 (en) * | 2007-05-09 | 2012-03-27 | Intermolecular, Inc. | Resistive-switching nonvolatile memory elements |
KR101104443B1 (ko) * | 2008-02-12 | 2012-01-12 | 파나소닉 주식회사 | 비휘발성 반도체 기억 장치 및 그 제조 방법 |
US20140048799A1 (en) * | 2011-02-16 | 2014-02-20 | William Marsh Rice University | Invisible/transparent nonvolatile memory |
CN103779496B (zh) * | 2012-10-25 | 2017-07-28 | 中芯国际集成电路制造(上海)有限公司 | 相变存储单元的制作方法 |
JP6618481B2 (ja) | 2014-04-02 | 2019-12-11 | フランク ナタリ | ドープト希土類窒化物材料および同材料を含むデバイス |
JP6684224B2 (ja) | 2014-04-02 | 2020-04-22 | サイモン エドワード グランビル | 希土類窒化物を含む磁性材料およびデバイス |
US11177438B2 (en) * | 2019-05-23 | 2021-11-16 | Tetramen Inc. | Patterning oxidation resistant electrode in crossbar array circuits |
CN115662719B (zh) * | 2022-12-29 | 2023-03-17 | 西北工业大学 | 一种无铅厚膜电阻浆料及制备方法 |
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JP2004185756A (ja) * | 2002-12-05 | 2004-07-02 | Sharp Corp | 不揮発性メモリ装置 |
JP2004186553A (ja) * | 2002-12-05 | 2004-07-02 | Sharp Corp | 不揮発性メモリセル及び不揮発性半導体記憶装置 |
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US6693821B2 (en) | 2001-06-28 | 2004-02-17 | Sharp Laboratories Of America, Inc. | Low cross-talk electrically programmable resistance cross point memory |
US7326979B2 (en) * | 2002-08-02 | 2008-02-05 | Unity Semiconductor Corporation | Resistive memory device with a treated interface |
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JPH07263646A (ja) * | 1994-03-25 | 1995-10-13 | Mitsubishi Chem Corp | 強誘電体ダイオード素子、並びにそれを用いたメモリー装置、フィルター素子及び疑似脳神経回路 |
JP2004185756A (ja) * | 2002-12-05 | 2004-07-02 | Sharp Corp | 不揮発性メモリ装置 |
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