WO2006016414A1 - Circuit de formation de signal, procédé de formation de signal et dispositif électronique - Google Patents

Circuit de formation de signal, procédé de formation de signal et dispositif électronique Download PDF

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Publication number
WO2006016414A1
WO2006016414A1 PCT/JP2004/011704 JP2004011704W WO2006016414A1 WO 2006016414 A1 WO2006016414 A1 WO 2006016414A1 JP 2004011704 W JP2004011704 W JP 2004011704W WO 2006016414 A1 WO2006016414 A1 WO 2006016414A1
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Prior art keywords
signal
modulation
sub
modulation signal
output
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PCT/JP2004/011704
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English (en)
Japanese (ja)
Inventor
Futoshi Fujiwara
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Shearwater Kabushiki Kaisha
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Application filed by Shearwater Kabushiki Kaisha filed Critical Shearwater Kabushiki Kaisha
Priority to PCT/JP2004/011704 priority Critical patent/WO2006016414A1/fr
Priority to JP2006531098A priority patent/JP4543042B2/ja
Publication of WO2006016414A1 publication Critical patent/WO2006016414A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03C—MODULATION
    • H03C3/00—Angle modulation
    • H03C3/02—Details
    • H03C3/09—Modifications of modulator for regulating the mean frequency
    • H03C3/0908—Modifications of modulator for regulating the mean frequency using a phase locked loop
    • H03C3/095—Modifications of modulator for regulating the mean frequency using a phase locked loop applying frequency modulation to the loop in front of the voltage controlled oscillator

Definitions

  • Signal forming circuit Signal forming method, and electronic apparatus
  • the present invention relates to a signal forming circuit, a signal forming method, and an electronic device, and in particular, a spread spectrum signal forming circuit and a signal that reduce EMI more efficiently by using a modulated wave that further modulates a modulated wave.
  • the present invention relates to a forming method and an electronic device including the signal forming circuit.
  • EMI Electro Magnetic Interference
  • circuits that use periodically changing signals such as clocks (rectangular waves), triangular waves, and sine waves.
  • a spread spectrum clock generator (SSCG) is known as an example of a technique for reducing EMI in a clock forming circuit (clock generator) (for example, Patent Document 1).
  • SSCG uses the modulated wave to slightly change the frequency of the oscillation clock in the clock generator (frequency modulation), thereby reducing EMI.
  • Figure 19 illustrates this principle. That is, the spectrum spO indicates an accurate clock frequency spectrum without frequency modulation. In this case, the spectrum spO has the highest frequency component at the transmission frequency fO.
  • this clock is frequency-modulated, its frequency spectrum spl changes as shown in FIG. As a result, since the ratio of the unit time to the frequency within the modulation width is low, the peak of the spectrum spl is reduced, and EMI can be reduced.
  • FIGS. 20 (A) to 20 (C) show the relationship between the SSCG modulation wave and the clock spectrum.
  • the SSCG modulation wave is shown on the left and the clock spectrum is shown on the right.
  • Figure 20 (A) shows the spectrum of the clock when modulated with a sine wave.
  • Figure 20 (B) shows the spectrum of the clock when modulated with a triangular wave.
  • Fig. 21 (B) in order to obtain a uniform density without depending on time, There should be no peaks in the spectrum.
  • the waveform at the apex of the triangular wave becomes dull due to deterioration of the characteristics of the modulator with respect to the modulation wave (specifically, the band limitation of the VCO (voltage controlled oscillator)), resulting in some peaks at both ends of the spectrum Exists.
  • the band limitation of the VCO voltage controlled oscillator
  • Patent Document 1 US Pat. No. 4,507,796
  • Patent Document 2 US Pat. No. 5,488,627
  • the spectrum shown in FIG. 20 (C) also has the same fine peak as shown in FIG. 22 (A).
  • the conventional SSCG modulation method described above basically increases the number of peaks and decreases the density per unit time by lowering the frequency of the modulation wave. It can be said that the peak of the vector is reduced. If the spectrum peak can be reduced, EMI can be reduced.
  • the spectrum peak cannot be reduced unless the frequency of the modulated wave is lowered.
  • the lower limit of the modulation frequency fl is considered to be about 20 kHz which is an audible frequency in practice. If the frequency is lower than this, a part or the whole of the electronic device may vibrate at the modulation frequency fl, and the vibration sound may be heard by humans. Therefore, according to the conventional SSCG modulation method, there is a limit to reducing the spectrum peak due to the lower limit of the frequency of the modulation wave.
  • An object of the present invention is to provide a signal forming circuit capable of reducing EMI more efficiently by improving at least the flatness of a spectrum of a periodic signal or by reducing the peak of the spectrum.
  • an object of the present invention is to provide a signal forming method that improves EMI more efficiently by improving at least the flatness of the spectrum of a periodic signal or by reducing the peak of the spectrum. It is in.
  • an object of the present invention is to provide an electronic device including a signal forming circuit that more efficiently reduces EMI.
  • a signal forming circuit of the present invention is a signal forming circuit that forms an output signal capable of reducing EMI, and that modulates a reference signal serving as a reference for generating a final modulated signal.
  • a modulation signal generation unit for outputting the final modulation signal generated by modulating the reference signal with at least one sub modulation signal, and a periodic signal forming unit.
  • a signal modulation unit for output.
  • a signal forming method of the present invention is a signal forming method for forming an output signal capable of reducing EMI, for generating at least one sub-modulation signal and generating a final modulation signal.
  • a final reference signal is generated by modulating a reference signal serving as a reference with the at least one sub-modulation signal, and a periodic signal is modulated with the final modulation signal.
  • an output signal capable of reducing the EMI is generated by reducing a spectrum caused by the output signal.
  • the electronic device of the present invention includes a periodic signal forming circuit that outputs a periodic signal, a reference signal generation unit that outputs a reference signal serving as a reference for generating a final modulation signal, and at least modulates the reference signal.
  • a modulation signal generation unit that outputs the final modulation signal generated by modulating the reference signal with the at least one submodulation signal. And reducing the EMI by reducing the spectrum resulting from the output signal generated by modulating the periodic signal output from the periodic signal forming circuit with the final modulation signal.
  • a signal modulating unit that outputs an output signal capable of performing a predetermined operation, and an operation unit that performs a predetermined operation based on the output signal.
  • SSCG basically has two problems. First, what kind of modulation signal is appropriate to obtain the flatness of the spectrum, and second, when the modulation width is the same, the spectrum peak is further reduced. How should we do it?
  • the present invention is based on a new principle obtained by reexamining SSCG from its principle. By applying the new principle to not only a clock signal but also a periodic signal such as a sine wave. In addition, while maintaining the frequency of the modulation signal within the range that does not generate vibration sound, the flatness of the spectrum can be improved and the spectrum peak can be reduced.
  • the modulation signal is further modulated using the sub-modulation signal.
  • the clock signal is modulated in multiple (double or higher).
  • the type of sub-modulation is frequency modulation or amplitude modulation.
  • modulating the frequency of the modulation signal it is possible to reduce the peak of the modulation frequency.
  • modulating the amplitude of the modulation signal the spectrum can be flattened.
  • the modulation signal may be frequency-modulated and amplitude-modulated, whereby the peak of the modulation frequency can be reduced and the spectrum can be flattened.
  • the clock signal is generated by the final modulation signal generated by (sub) modulating the modulation signal with at least one ⁇ IJ modulation signal. Etc. to modulate multiple periodic signals. Therefore, by modulating the modulation signal at least by frequency modulation or amplitude modulation, the peak of the modulation frequency can be reduced, or the spectrum can be flattened. As a result, even if the modulation frequency is not lower than the frequency (about 20kHZ) that generates vibration sound, the peak of the spectrum can be reduced, and the modulation wave that emphasizes the apex of the triangular wave is not used. However, the spectrum can be flattened.
  • a signal forming that multiplexly modulates a periodic signal such as a clock signal by a final modulation signal generated by modulating the modulation signal with at least one sub-modulation signal Provide circuit. Therefore, by modulating the modulation signal at least by frequency modulation or amplitude modulation, as described above, it is possible to flatten the force and spectrum for reducing the peak of the modulation frequency. Therefore, it is not necessary to consider the characteristics of the modulator, which does not require the use of a complex clock generation circuit, due to the flatness of the spectrum. As a result, the EMI of the electronic device can be reduced by at least reducing the spectrum peak or flattening the spectrum.
  • FIG. 1 shows a configuration of a signal forming circuit according to the present invention.
  • FIG. 2 is a diagram illustrating clock modulation according to the present invention.
  • FIG. 4 is a diagram illustrating clock modulation according to the present invention.
  • FIG. 10 shows a configuration of still another signal forming circuit according to the present invention.
  • FIG. 11 shows the configuration of still another signal forming circuit according to the present invention.
  • FIG. 12 shows the configuration of still another signal forming circuit according to the present invention.
  • FIG. 13 shows a configuration of still another signal forming circuit according to the present invention.
  • FIG. 14 shows a configuration of still another signal forming circuit according to the present invention.
  • FIG. 15 shows a configuration of still another signal forming circuit according to the present invention.
  • FIG. 16 shows a configuration of still another signal forming circuit according to the present invention.
  • FIG. 17 shows a configuration of an electronic device including a signal forming circuit of the present invention.
  • FIG. 18 shows a configuration of another electronic device including the signal forming circuit of the present invention.
  • FIG. 19 is an explanatory diagram of spread spectrum.
  • FIG. 20 is an explanatory diagram of spread spectrum.
  • FIG. 21 is an explanatory diagram of spread spectrum.
  • FIG. 22 is an explanatory diagram of spread spectrum.
  • FIG. 1 is a configuration diagram of a signal forming circuit, and shows an example of a configuration of a signal forming circuit according to the present invention.
  • the signal forming circuit 100 of the present invention includes a clock modulation unit 2 and a modulation signal generation unit 3 which are signal modulation units.
  • the clock modulation unit 2 receives a clock signal (periodic rectangular wave) output from the oscillator 1 which is a periodic signal forming circuit. That is, this example shows an example of modulating a clock signal which is the most typical periodic signal.
  • a relatively simple configuration that is, the circuit scale is not so large
  • a periodic signal By using a periodic signal, a sufficient EMI reduction effect can be obtained.
  • the oscillator 1 generates a clock signal
  • the clock modulator 2 generates a modulation signal, a first submodulation signal that is an FM submodulation wave, and a second submodulation signal that is an AM submodulation wave. Is done.
  • the modulation signal is modulated by the first and second sub-modulation signals (frequency modulation and amplitude modulation), thereby generating a final modulation signal.
  • an output clock signal is generated by modulating the clock signal with the final modulation signal.
  • the present invention is not limited to a clock signal, but can be widely applied to periodic signals such as a triangular wave and a sine wave.
  • the modulation signal (modulation wave) is a signal for slightly varying the frequency of the clock signal (carrier wave) output from the oscillator 1.
  • the sub-modulation signal (sub-modulation wave) is a general term for signals that further modulate the modulation signal, and is referred to as a “sub-modulation signal” to distinguish it from the modulation signal.
  • two types of sub-modulation signals called first and second sub-modulation signals are used.
  • the modulation signal is composed of, for example, a triangular wave
  • the frequency modulation using the first sub modulation signal is modulation in the horizontal direction (time axis direction) in FIG.
  • the amplitude modulation using the second sub-modulation signal is modulation in the vertical direction (voltage or current axis direction) in FIG. Therefore, the modulation signal is sub-modulated twice (in two directions). Since the clock signal is modulated by the modulation signal that is doubly submodulated, it can be said that the clock signal is triple modulated. Thereby, as shown in FIG. 2, the spectrum peak of the clock signal can be reduced and flattened.
  • the oscillator 1 generates and outputs a clock signal having a predetermined frequency, for example, 10 MHz.
  • the oscillator 1 may be a clock generation device having a known configuration.
  • the clock signal output from oscillator 1 is input to clock modulator 2.
  • the clock modulation unit 2 modulates the clock signal output from the oscillator 1 with the final modulation signal to synchronize with the clock signal. Generate and output the expected output clock signal.
  • the clock modulation unit 2 is composed of a phase locked loop (PLL) that receives the clock signal output from the oscillator 1 as an input, uses the final modulation signal as a control signal, and outputs the output clock signal.
  • PLL phase locked loop
  • the output clock is input to the operation unit (operation unit 300 in FIG. 17) of various electronic devices and used as a basic clock.
  • the modulation signal generation unit 3 includes a reference signal generation unit 33, a first sub modulation signal generation unit 31 that is an FM (frequency modulation) sub modulation signal generation unit, and an AM (amplitude modulation) sub modulation signal.
  • a second sub-modulation signal generation unit 32 and a multiplier 34, which are generation units, are provided.
  • FIG. 3 conceptually shows the waveform of each signal in the modulation signal generator 3.
  • the reference signal generation unit 33 generates and outputs a modulation signal FM (not shown) that is a reference signal (reference signal) for generating a final modulation signal.
  • the reference signal generation unit 33 is provided inside the modulation signal generation unit 3.
  • the modulation signal FM is a triangular wave (a symmetrical triangular wave). Therefore, the reference signal generation unit 33 in this example is a triangular wave generation circuit.
  • the modulation signal FM may be a signal that changes continuously, for example, a sine wave.
  • the reference signal generation unit 33 outputs the intermediate modulation signal FMsigo when the first sub modulation signal (FM sub modulation wave) FMo output from the first sub modulation signal generation unit 31 is input. To do.
  • the intermediate modulation signal FMsigo is not a triangular wave because it is the result of FM modulation of the triangular wave that is the modulation signal FM.
  • the intermediate modulation signal FM sigo is input to the multiplier 34.
  • the first sub-modulation signal generator 31 outputs a first sub-modulation signal FMo.
  • the first sub-modulation signal F Mo is a signal that frequency-modulates the modulation signal FM, and is a triangular wave in this example. By modulating the frequency of the modulation signal FM, the modulation frequency in the modulation range on the spectrum can be dispersed, and as a result, the peak of the modulation frequency can be reduced.
  • the first sub modulation signal FMo is a signal that changes continuously and does not change discontinuously. The frequency and phase of the first sub-modulation signal FMo need not depend on other oscillators. Specifically, the first sub-modulation signal FMo is a triangular wave having a period sufficiently longer than the modulation signal FM.
  • the period is, for example, a period about 10 times as long as the modulation signal FM.
  • the frequency sub-modulation width is preferably 0.5 to 1.5 times the frequency of the modulation signal FM.
  • the first sub modulation signal FMo is input to the reference signal generation unit 33.
  • the second sub-modulation signal generator 32 outputs the second sub-modulation signal AMo.
  • the second sub-modulation signal A Mo is a signal that modulates the amplitude of the modulation signal FM, and is a triangular wave in this example. By modulating the amplitude of the modulation signal FM, the peaks at both ends of the spectrum can be reduced, and as a result, the spectrum can be flattened.
  • the second submodulation signal AMo is either a continuously changing signal (for example, a triangular wave) or a discontinuously changing signal (for example, a staircase wave). The frequency and phase of the second secondary modulation signal AMo do not depend on other oscillators.
  • the second submodulation signal AMo is a triangular wave having a period longer than the modulation signal FM and shorter, longer or equal to the first submodulation signal FMo.
  • the period is, for example, a period about 23 times longer than the modulation signal FM.
  • the second submodulation signal AMo is input to the multiplier 34.
  • the first and second sub-modulation signals FMo and AMo may be any signals that continuously change in addition to the triangular wave. Even in this case, it is possible to obtain the effect of spreading the outer surface similarly.
  • the submodulation signal is composed of the sum of a sine wave of arbitrary amplitude An, a cosine wave of arbitrary amplitude Bn, a sine wave of arbitrary amplitude An of an integer multiple of these, and a cosine wave of arbitrary amplitude Bn.
  • the sub-modulated signal may be a signal generated by any irregular process such as uniform distribution noise, Gaussian distribution noise, binomial distribution noise, Poisson distribution noise, Rayleigh distribution, etc.
  • the submodulation signal may be a signal obtained by combining two or more of the various signals described herein.
  • the multiplier 34 multiplies the intermediate modulation signal FMsigo output from the reference signal generation unit 33 by the second sub modulation signal AMo output from the second sub modulation signal generation unit 32, thereby finalizing the signal.
  • Modulation signal MODo is output. That is, the multiplier 34 is for amplitude-modulating the frequency-modulated intermediate modulation signal FMsigo.
  • the modulation signal generator 3 generates and outputs the final modulation signal MODo by modulating the modulation signal FM with the first and second sub modulation signals FMo and AMo (frequency modulation and amplitude modulation). .
  • the final modulation signal MODo is input to the PLL that is the clock modulation unit 2.
  • the PLL 2 includes a first divider 21 with a division ratio A, a second divider 22 with a division ratio B, a phase comparator 23, a loop filter 24, a voltage-current converter (VI ) 25, multiplier 26, current controlled oscillator (ICO) 27.
  • the voltage-current converter 25 and the current-controlled oscillator 27 constitute a voltage-controlled oscillator (VCO). That is, the voltage controlled oscillator includes a multiplier 26.
  • Figure 4 conceptually shows the waveform of each signal in PLL2.
  • f (Fin) f (Fin) ⁇ ⁇ .
  • ⁇ is the division ratio of the first divider 21
  • B is the division ratio of the second divider 22
  • the input clock signal is a 10 MHz clock signal. In this case, a 133 MHz output clock signal is obtained.
  • the second frequency divider 22 When the clock signal Fin having the frequency f (Fin) output from the oscillator 1 is input, the second frequency divider 22 outputs a signal Bo obtained by dividing the clock signal Fin by the frequency dividing ratio B.
  • the frequency f (Bo) of the signal Bo is a value f (Fin) ZB obtained by dividing the frequency f (Fin) by the division ratio B.
  • the signal Bo is input to the phase comparator 23.
  • the output Ao is also input to the phase comparator 23 from the first frequency divider 21.
  • the phase comparator 23 compares the output Bo of the second frequency divider 22 with the output Ao of the first frequency divider 21, detects the phase difference PHCo, and outputs this to the loop filter 24.
  • the loop filter 24 has a time constant corresponding to its transfer function, and determines the response of the loop of the PLL control system. That is, the input phase difference PHCo is filtered and output. The output LPFo of the loop filter 24 is input to the voltage / current converter 25.
  • the voltage / current converter 25 converts the output LPFo (voltage value) from the loop filter 24 into a current value and outputs the current value to the multiplier 26.
  • the output current is proportional to the square of the voltage.
  • the multiplier 26 multiplies the input current value by the control signal M_in (signal M0Do in FIG. 3) and outputs the result to the current control oscillator 27.
  • the current control oscillator 27 oscillates and outputs an output clock signal Fout having a frequency corresponding to the input current value.
  • the frequency of the output signal is proportional to the 1/2 power of the input current.
  • the final modulation signal MODo output from the multiplier 34 has a change amount slightly deviating from a linear change that is not a linear change amount. Therefore, it is possible to disperse the modulation frequency in the modulation range on the spectrum and extinguish the peaks at both ends of the spectrum rather than the linear change. As a result, the peak at the modulation frequency of the spectrum can be further reduced, and the spectrum can be flattened.
  • the control signal M_in (final modulation signal MODo) of the multiplier 26 is a frequency-modulated triangular wave
  • the modulation frequency in the modulation range on the spectrum is dispersed, and as a result
  • the peak at the modulation frequency of Tatonole can be reduced. This can be seen from the fact that the density decreases when the triangular wave in Fig. 21 (B) is modulated in the time axis (horizontal axis) direction.
  • the control signal M_in of the multiplier 26 is an amplitude-modulated triangular wave, the peaks at both ends of the spectrum are extinguished, and as a result, the spectrum is corrected. Torr can be flattened. This can be seen from the fact that the density decreases when the triangular wave in FIG. 21B is modulated in the voltage or current axis (vertical axis) direction.
  • the modulation signal FM, the first sub-modulation signal FMo, and the second sub-modulation signal AMo are all not required to be phase-synchronized with the input signal (clock signal) from the oscillator 1, and the frequency There is no need to synchronize. However, it is preferable that these signals are not phase-synchronized and frequency-synchronized with the clock signal, rather than phase-synchronized and / or frequency-synchronized. This is due to the following reasons. First, without phase synchronization and frequency synchronization, the modulation frequency in the modulation range on the spectrum can be dispersed, and the peak of the modulation frequency can be reduced. Second, spectrum flatness can be ensured by not synchronizing the phase and frequency.
  • the period of the output signal changes between 9.8 nSec and 10.2 nSec.
  • the period of the output signal is 10.2nSec
  • the time of 250nSec elapses, it is 24.5 periods.
  • the period of the input signal is 24 periods. Therefore, a half-circulator delay occurs.
  • PLL2 suddenly changes to the state in which the state force advance that was detecting the delay was detected (causes a cycle slip), and tries to increase the frequency that it was trying to reduce until then. As a result, discontinuous points are generated in frequency, and the flatness of the spout is impaired.
  • the discontinuous operating point of the PLL 2 due to cycle slip can be spread over a long period of time, and the spectral flatness Can be prevented.
  • the discontinuous operation point can be moved by amplitude-modulating the modulation signal FM with the second sub-modulation signal AMo. Thereby, the discontinuous operating point can be diffused for a long time, and the flatness of the spectrum can be prevented from being impaired.
  • the modulation signal does not necessarily need to be double-modulated by the first and second sub-modulation signals as described above, and may be simply modulated by one sub-modulation signal. That is, the final modulated signal may be generated by modulating the modulated signal with either the first or second sub-modulated signal (frequency modulation or amplitude modulation).
  • the modulation signal generation unit 3 includes at least one sub-modulation signal generation unit, and the modulation signal May be modulated with at least one sub-modulated signal to generate a final modulated signal. That is, a clock signal, a modulation signal, and one sub-modulation signal are generated, and the modulation signal is modulated with the sub-modulation signal (frequency modulation or amplitude modulation) to generate a final modulation signal, and the clock signal is finally modulated. It is also possible to generate the output clock signal by modulating with the signal.
  • FIG. 7 is another signal forming circuit configuration diagram, and shows the configuration of another signal forming circuit according to the present invention.
  • the signal forming circuit 100 in FIG. 7 has a configuration similar to that of the signal forming circuit 100 in FIG. 1, but the modulation signal generation unit 3 includes the first sub modulation signal generation unit 31 (only), and the second sub modulation signal generation unit 31 The difference is that the modulation signal generator 32 is not provided.
  • the signal forming circuit 100 in FIG. the signal forming circuit can have a very simple configuration, but the case where an EMI reduction effect can be obtained is limited. In other words, when there is only one (or small) operation part in the subsequent stage as shown in FIG. 17 (when there are no multiple operation parts (shown in FIG. 18)), an EMI reduction effect can be obtained. .
  • FIG. 8 is still another signal forming circuit configuration diagram showing the configuration of still another signal forming circuit according to the present invention.
  • the signal forming circuit 100 in FIG. 8 has a configuration similar to that of the signal forming circuit 100 in FIG. 1, but the modulation signal generation unit 3 includes the second sub modulation signal generation unit 32 (only), and the first The difference is that the sub-modulation signal generation unit 31 is not provided.
  • the signal forming circuit can be made very simple, but the case where an EMI reduction effect can be obtained is limited. In other words, as shown in Fig. 18, when a PLL is provided in the subsequent stage, an EMI reduction effect can be obtained.
  • the modulation signal output from the reference signal generation unit 33 and the second sub-modulation signal generation The second sub-modulated signal output from the generator 32 is multiplied by the multiplier 34 to output the final modulated signal.
  • the second sub-modulation signal is a signal that amplitude-modulates the modulation signal, and is a triangular wave. Therefore, the final modulation signal is a signal obtained by amplitude modulating the modulation signal with a triangular wave.
  • the final modulated signal in this example is a signal obtained by removing the influence of the signal FMo from the signal MODo in FIG. That is, the signal (modulated signal FM) before the frequency modulation of the signal FMsigo is amplitude-modulated with the signal AMo.
  • FIG. 9 is still another signal forming circuit configuration diagram, and shows the configuration of still another signal forming circuit according to the present invention.
  • the signal forming circuit 100 in FIG. 9 has a configuration similar to that of the signal forming circuit 100 in FIG. 1, but the modulation signal generation unit 3 includes the first sub modulation signal generation unit 31 (only). The difference is that is used for two sub-modulations.
  • the plurality of submodulation signal generation units 31 and 32 are actually composed of one submodulation signal generation unit 31 that is also used as the submodulation signal generation units 31 and 32.
  • the final modulation signal is generated by modulating the modulation signal using one first submodulation signal generated by the one submodulation signal generation unit 31 twice (multiple times).
  • the chip area of the LSI can be minimized by the simplest configuration, and sufficient EMI reduction effect can be obtained for almost all periodic signals including clock signals. Can do.
  • the reference signal generation unit 33 when the first sub-modulation signal output from the first sub-modulation signal generation unit 31 is input, the reference signal generation unit 33 outputs a frequency-modulated modulation signal.
  • the multiplier 34 multiplies the frequency-modulated modulation signal and the first sub-modulation signal to amplitude-modulate the frequency-modulated modulation signal.
  • the final modulated signal is output. Therefore, the final modulated signal is a signal modulated twice by the first sub-modulated signal.
  • the final modulated signal in this example is a signal similar to the signal FMsigo in FIG.
  • the modulation signal generation unit 3 includes a second sub modulation signal generation unit 32 (only), which is used for two sub modulations (frequency modulation and amplitude modulation). You may do it.
  • the modulation signal generation unit 3 is actually composed of one sub modulation signal generation unit 32 that is also used as the sub modulation signal generation units 31 and 32.
  • FIG. 10 is still another signal forming circuit configuration diagram showing the configuration of still another signal forming circuit according to the present invention.
  • the signal forming circuit 100 in FIG. 10 has a configuration similar to that of the signal forming circuit 100 in FIG. 1, except that the modulation signal generation unit 3 includes third and fourth sub modulation signal generation units 3 11 and 321. Is different.
  • the outputs of the other submodulation signal generation units 311 and 321 are input to the submodulation signal generation units 31 and 32, respectively.
  • the first and second submodulation signals formed by further modulating (submodulation) the outputs of the other submodulation signal generation units 311 and 321 from the submodulation signal generation units 31 and 32, respectively.
  • the signal forming circuit has a complicated configuration, but the EMI reduction effect can be further improved compared to the signal forming circuit of FIG. However, the EMI reduction effect is not improved as the circuit becomes more complex.
  • the final modulation signal output from the modulation signal generator 3 is Has a corresponding dimension.
  • a signal having a dimension corresponding to the phase is obtained as an integration signal.
  • the delay amount of the clock signal can be changed based on the final modulation signal obtained by frequency-modulating and amplitude-modulating the modulation signal. Therefore, the signal forming circuit 100 of this example can obtain the same result as the signal forming circuit 100 of FIG.
  • FIG. 1 and FIG. 11 described above are examples in which the signal forming circuit of the present invention is configured by an analog circuit, but the signal forming circuit of the present invention can also be configured by a digital circuit.
  • the FIG. 12 to FIG. 16 show examples in which the signal forming circuit of the present invention is configured by a digital circuit
  • the output frequency Fout can be modulated by periodically changing the set value of the first frequency divider 21 ′. That is, two values are set for the first frequency divider 21 ′. Prepare values NO and N1, and set value NO at time t2n and value N1 at time Ijt2n + 1 to first divider 21 'and select the loop constant of loop filter 24' appropriately.
  • modulation can be performed using the transient response due to the integral characteristic of the loop filter 24 '.
  • the output frequency Fout repeats a continuous change from NO ZM 'Fin to Nl ZM' Fin.
  • the reference clock signal generation circuit 4 generates and outputs a modulation signal (not shown) which is a reference signal (reference signal) for generating the final modulation signal. Therefore, this example is also an example in which the reference signal generation unit (33) is provided outside the signal forming circuit 100.
  • the reference signal or modulation signal is the second clock signal.
  • the second clock signal has a frequency that is not an integral multiple of the clock signal (first clock signal) output from the oscillator 1 in order to sufficiently obtain the effect of submodulation.
  • the frequency-modulated clock signal tk is supplied as a clock signal to the second triangular wave generation unit 37 in the next stage.
  • the second triangular wave generator 37 generates an amplitude submodulated wave. That is, the second triangular wave generation unit 37 generates the output Sk by adding or subtracting the constant C to the current output value of the second triangular wave generation unit 37 for each frequency-modulated clock.
  • Figure Output Sk It is shown in 13.
  • the number of bits of the adder / subtracter (not shown) in the second triangular wave generation unit 37 is finite, and there is a maximum numerical value that can be processed by the second triangular wave generation unit 37. Assuming that the value is G max, G max is determined by the number of bits of the adder / subtracter in the second triangular wave generator 37. When the number of bits is n, the minimum numerical value that can be handled by the second triangular wave generation unit 37 is the maximum numerical value Gmax_ (2 n_l).
  • the second triangular wave generator 37 When the second triangular wave generator 37 functions as an adder, the constant C is added for each frequency submodulation clock. When the result of this addition reaches the maximum value due to the limitation on the number of bits, the second triangular wave generator 37 switches to a subtracter. As a result, the constant C is subtracted for each frequency sub-modulation clock, and thereafter, the subtraction is continued until the minimum value is reached due to the limitation on the number of bits. In addition, when the output of the second triangular wave generation unit 37 reaches the minimum value in the subtractor state, the second triangular wave generation unit 37 switches to an adder, and the constant C is set for each frequency submodulation clock. It is added until it reaches the maximum value G max that can be handled by this calculator.
  • the numerical value of the output of the second triangular wave generator 37 repeats the increase to the maximum value and the decrease to the minimum value according to the constant C for each frequency submodulation clock. As a result, a sequence Sk representing the triangular wave subjected to frequency submodulation is generated.
  • An appropriate loop constant can be obtained by multiplying the original loop constant by k -Nk / FMk or k -Nk / tk. Where k is a proportionality constant. Set the generated sequence Nk to the first divider 21 'for each generated frequency submodulated clock and set the appropriate loop constant Is set to loop filter 24 by Nk and FMk. As a result, the output LPFo of the loop filter 24 'becomes as shown in FIG. By inputting this output LPFo to the voltage controlled oscillator 210, it is possible to generate a clock signal Font that is modulated by a modulation wave subjected to frequency sub-modulation and amplitude sub-modulation. Therefore, according to the present invention, by performing frequency sub-modulation and amplitude sub-modulation on the modulated wave, the spectrum can be effectively spread and attenuated, and as a result, EMI can be greatly reduced.
  • FIG. 14 is still another signal forming circuit configuration diagram, and shows the configuration of still another signal forming circuit according to the present invention. That is, the signal forming circuit in FIG. 14 is configured by a digital circuit, and shows an example in which the modulated wave is submodulated by frequency modulation as in the example of FIG. Therefore, the relationship between FIG. 12 and FIG. 14 corresponds to the relationship between FIG. 1 and FIG.
  • the signal forming circuit 100 in FIG. 14 has a configuration similar to that of the signal forming circuit 100 in FIG. 12, except that the second triangular wave generating unit 37 is omitted in the modulation signal generating unit 3. Different.
  • the reference clock signal which is a modulation signal, can be frequency-modulated.
  • the modulation frequency can be dispersed and the peak thereof can be reduced.
  • FIG. 16 is still another signal forming circuit configuration diagram, and shows the configuration of still another signal forming circuit according to the present invention. That is, the signal forming circuit in FIG. 16 is configured by a digital circuit, and in the same manner as in the example of FIG. 10, an example of further submodulating the submodulation wave for modulating the modulation wave (an example of multiple modulation). Show. Therefore, the relationship between FIG. 12 and FIG. 16 corresponds to the relationship between FIG. 1 and FIG.
  • the signal forming circuit 100 in FIG. 16 has a configuration similar to that of the signal forming circuit 100 in FIG. 12, but in the modulation signal generating unit 3, the third triangular wave is placed in front of the first triangular wave generating unit 36.
  • the reference clock signal which is a modulation signal
  • the reference clock signal is further (sub) modulated by the first and second sub modulation signals once modulated (sub). Therefore, as in FIG. 10, the reference clock signal that is the modulation signal is triple-modulated.
  • FIG. 17 is a configuration diagram of an electronic device, and shows an example of the configuration of an electronic device 200 including the signal forming circuit 100 ′ of the present invention.
  • the electronic device 200 includes a signal forming circuit 100 ′ according to the present invention and an operation unit 300 that performs a predetermined operation based on an output clock signal output from the signal forming circuit 100 ′.
  • the signal forming circuit 100 ′ of the present invention has one of the configurations shown in FIG. 1, FIG. 7, or FIG. Therefore, the modulation signal generation unit 3 only needs to include the sub modulation signal generation unit 31 or 32 that outputs at least one sub modulation signal.
  • FIG. 17 shows an example in which two sub-modulation signal generation units 31 and 32 are provided.
  • the operation unit 300 includes, for example, a personal computer, a facsimile machine, a copier, and a printer. Since the wiring that propagates the clock signal extends long inside the large housing, these wirings can easily operate as an antenna. Therefore, in reality, EMI is reduced by attaching the electromagnetic wave absorbing sheet inside the housing and absorbing the emitted electromagnetic waves. According to the present invention, it is possible to omit or thin the attachment of the electromagnetic wave absorbing sheet while reducing EMI, and to reduce the cost.
  • the operating unit 300 may have, for example, a class D amplifier power.
  • Class D amplifiers filter the digital signal obtained by processing the clock signal and input it directly to the speaker. It is said that it is efficient. Since the class D amplifier is accompanied by switching of a large current, it is easy to radiate electromagnetic waves. However, according to the present invention, radiation of electromagnetic waves can be suppressed and EMI can be reduced.
  • FIG. 18 is a configuration diagram of another electronic device, and shows an example of the configuration of another electronic device 200 including the signal forming circuit of the present invention.
  • the electronic device in FIG. 18 has a configuration similar to the configuration of the electronic device in FIG. 17, but the operation unit 300 includes a plurality of PLLs 301a 301 ⁇ and a plurality of operation units 302a to 302 ⁇ corresponding thereto.
  • the signal forming circuit 100 ′ has one of the configurations shown in FIG. 1, FIG. 8, FIG. 11, and FIG. FIG. 18 shows an example in which two sub-modulation signal generation units 31 and 32 are provided.
  • the signal forming circuit 100 ′ of the present invention includes the oscillator 1 as a part thereof as shown in FIGS.
  • the signal forming circuit of the present invention shown in each of FIGS. 1, 7, and 8 may include the oscillator 1 as a part thereof.
  • the present invention is not limited to clock signals, and can be widely applied to circuits that use periodically changing signals such as triangular waves and sine waves. Accordingly, the present invention is, for example, a data interface driving circuit (or driver), a photodiode (ie, laser diode or LED) driving circuit, a motor driving circuit, a display driving circuit, an EL driving circuit, a CCD driving circuit, etc. Can be applied to.
  • the wiring length is generally long, and when data is transmitted, the driving current is large and alternating current or pulsating current (plus or minus) It is easy to radiate electromagnetic waves.
  • the photodiode driving circuit may be driven by alternating current (or alternating voltage) when the diode is turned on. In this case, the drive current is large, and it is driven by an alternating current or a pulsating flow, so that it is easy to radiate electromagnetic waves.
  • the motor drive circuit is apt to radiate electromagnetic waves because the motor drive current is very large and is driven by alternating current or pulsating current.
  • the display drive circuit and EL drive circuit have a large display area, the drive current is very large, and the display drive circuit and the EL drive circuit are driven by an alternating current or a pulsating current, so that they easily radiate electromagnetic waves. Since the CCD drive circuit is driven by alternating current or pulsating current when sending image signals from the CCD, it easily radiates electromagnetic waves.
  • such a circuit radiates electromagnetic waves and deteriorates EMI characteristics.
  • the amount of radiated electromagnetic waves can be reduced and EMI can be reduced.
  • the present invention in the signal forming circuit and the signal forming method, at least frequency modulation or amplitude modulation is performed on the modulation signal using at least one sub-modulation signal, so that the period of the clock signal or the like is increased. Multiple modulations of a typical signal.
  • the peak of the modulation frequency can be reduced without making the modulation frequency lower than the frequency (about 20 kHz) that generates vibration noise, or without using a modulation wave that emphasizes the top of the triangular wave.
  • the spectrum can be flattened. Therefore, it is not necessary to consider the characteristics of the modulator, which does not require the use of a complicated clock generation circuit, due to the flatness of the spectrum. As a result, it is possible to reduce the EMI of the signal forming circuit and the electronic device using the signal forming circuit by reducing the spectrum peak or flattening the spectrum.
  • the electronic device includes the signal forming circuit of the present invention that multiplexly modulates a periodic signal such as a clock signal, thereby at least reducing the peak of the spike.
  • a periodic signal such as a clock signal
  • the spectrum can be flattened. Therefore, the spectral flatness Therefore, it is not necessary to consider the characteristics of the modulator, which does not require the use of a complicated clock generator circuit.
  • EMI of the electronic device can be reduced by at least reducing the spectrum peak or flattening the spectrum.

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Abstract

Cette invention concerne un circuit de formation de signal pour former un signal de sortie dans lequel les émissions EMI peuvent être réduites, comportant une partie de génération de signal de modulation (3) et une partie de modulation d’horloge (2). La partie de génération de signal de modulation (3) comprend une partie de production de signal de référence (33) pour émettre un signal de modulation qui soit un signal de référence servant de référence pour produire un signal de modulation final ; et des premières et secondes parties de production de signal de sous modulation (31,32) pour émettre des premiers et seconds signaux de sous modulation. La partie de génération de signal de modulation (3) module le signal de modulation en utilisant les premiers et seconds signaux de sous modulation pour émettre le signal de modulation final. La partie de modulation d’horloge (2) module, en utilisant le signal de modulation final, un signal périodique émis à partir d’un circuit de formation de signal périodique (1), émettant ainsi un signal de sortie dans lequel les émissions EMI peuvent être réduites en diminuant le spectre provoqué par le signal de sortie.
PCT/JP2004/011704 2004-08-13 2004-08-13 Circuit de formation de signal, procédé de formation de signal et dispositif électronique WO2006016414A1 (fr)

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PCT/JP2004/011704 WO2006016414A1 (fr) 2004-08-13 2004-08-13 Circuit de formation de signal, procédé de formation de signal et dispositif électronique
JP2006531098A JP4543042B2 (ja) 2004-08-13 2004-08-13 信号形成回路、信号形成方法及び電子機器

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JP2006197570A (ja) * 2004-12-15 2006-07-27 Asahi Kasei Microsystems Kk 波形生成回路及びスペクトル拡散クロック発生装置
WO2007097290A1 (fr) * 2006-02-22 2007-08-30 Nichia Corporation dispositif optique
JP2007243911A (ja) * 2006-03-03 2007-09-20 Linear Technol Corp スペクトラム拡散周波数変調された発振器回路、周波数変調された発振器回路および電磁干渉を低減する方法
JP2009534889A (ja) * 2006-04-19 2009-09-24 ヒューレット−パッカード デベロップメント カンパニー エル．ピー． 信号変調方法
US7786768B2 (en) 2004-12-15 2010-08-31 Asahi Kasei Microsystems Co., Ltd. Waveform generating circuit and spread spectrum clock generator

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JP2001007731A (ja) * 1999-06-21 2001-01-12 Matsushita Electric Ind Co Ltd スペクトラム拡散送信機およびスペクトラム拡散受信機
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Publication number Priority date Publication date Assignee Title
JP2006197570A (ja) * 2004-12-15 2006-07-27 Asahi Kasei Microsystems Kk 波形生成回路及びスペクトル拡散クロック発生装置
US7786768B2 (en) 2004-12-15 2010-08-31 Asahi Kasei Microsystems Co., Ltd. Waveform generating circuit and spread spectrum clock generator
WO2007097290A1 (fr) * 2006-02-22 2007-08-30 Nichia Corporation dispositif optique
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JP2007243911A (ja) * 2006-03-03 2007-09-20 Linear Technol Corp スペクトラム拡散周波数変調された発振器回路、周波数変調された発振器回路および電磁干渉を低減する方法
JP2009534889A (ja) * 2006-04-19 2009-09-24 ヒューレット−パッカード デベロップメント カンパニー エル．ピー． 信号変調方法

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