WO2006004121A1 - 受信装置、通信装置、無線lan装置、受信装置の通電制御方法、受信装置の通電制御プログラム、記録媒体 - Google Patents
受信装置、通信装置、無線lan装置、受信装置の通電制御方法、受信装置の通電制御プログラム、記録媒体 Download PDFInfo
- Publication number
- WO2006004121A1 WO2006004121A1 PCT/JP2005/012415 JP2005012415W WO2006004121A1 WO 2006004121 A1 WO2006004121 A1 WO 2006004121A1 JP 2005012415 W JP2005012415 W JP 2005012415W WO 2006004121 A1 WO2006004121 A1 WO 2006004121A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- unit
- circuit
- energization
- signal processing
- signal
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/02—Power saving arrangements
- H04W52/0209—Power saving arrangements in terminal devices
- H04W52/0225—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal
- H04W52/0245—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal according to signal strength
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/30—Monitoring; Testing of propagation channels
- H04B17/309—Measuring or estimating channel quality parameters
- H04B17/318—Received signal strength
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Definitions
- Receiving device communication device, wireless LAN device, energization control method for receiving device, energization control program for receiving device, recording medium
- the present invention relates to power saving of a receiving apparatus (for example, a wireless LAN terminal using a double heterodyne system or a direct conversion system).
- a receiving apparatus for example, a wireless LAN terminal using a double heterodyne system or a direct conversion system.
- Fig. 6 is a block diagram showing a conventional configuration of a wireless LAN device aiming at power saving (refer to Japanese Laid-Open Patent Publication No. 8-307428 (publication date: November 22, 1996)). It is.
- the reception unit 202 of the conventional wireless LAN device 201 includes a radio unit 225 that is an analog unit, a reception level determination unit 226 that is a digital unit, a power source clock control unit 227, and an AZD.
- a conversion unit 228, a despread demodulation unit 229, an amplitude detection unit 230, a synchronization integration unit 231, a synchronization detection unit 232, and an information demodulation unit 233 are provided.
- Radio section 225 is composed of an analog circuit, extracts an intermediate frequency from an RF (radio frequency) signal contained in a radio wave captured by antenna 224 via an internal amplifier and filter, and extracts a necessary reception level. .
- the reception level determination unit 226 determines the start of reception by amplifying and rectifying and smoothing the intermediate frequency signal and comparing it with a predetermined level value by an internal comparator.
- the power supply / clock control unit 227 controls the power supply and clock of each block.
- the ⁇ / ⁇ conversion unit 228 performs AZD conversion on the output of the radio unit 225.
- the despread demodulator 229 demodulates the spread signal by despreading.
- the amplitude detector 230 obtains the amplitude value of the output of the despread demodulator 229.
- the synchronization integration unit 231 integrates the output of the amplitude detection unit 230 in symbol units.
- the synchronization detection unit 232 obtains a synchronization signal from the output of the synchronization integration unit 231.
- the information demodulator 233 performs information demodulation based on the output of the amplitude detector 230 and the synchronization signal output from the synchronization detector 232.
- reception standby only the radio unit 225 (analog unit), the reception level determination unit 226, and the power-clock control unit 227 operate.
- the power supply clock control unit 227 Operation AZD converter 228, despread demodulator 229, amplitude detector 230, synchronization accumulator 231, synchronization detector 232, and information demodulator 233 are not supplied with operation clocks. (AZD converter 228, despread demodulator 229, amplitude detector 230, synchronization multiplier 231, synchronization detector 232, and information demodulator 233) are not operating.
- the reception level determination unit 226 amplifies the intermediate frequency signal from the radio unit 225, compares the intermediate frequency signal with a level value designated by the terminal device by an internal comparator, If the intermediate frequency signal is larger, it is regarded as reception start.
- the power supply / clock control unit 227 Upon receipt of this reception, the power supply / clock control unit 227 receives the AZD conversion unit 228, the despreading demodulation unit 229, the amplitude detection unit 230, the synchronization integration unit 231, the synchronization detection unit 232, and the information demodulation unit 2 33. An operation clock is supplied to each of these units to operate them.
- the reception standby time is long, and power consumption can be reduced compared with the wireless LAN device.
- the digital unit (AZD conversion unit 288, despread demodulation unit 229, amplitude detection unit 230, synchronization integration unit 231, synchronization detection unit 232, and information demodulation is performed during reception standby.
- the radio unit 225 which is an analog unit, is activated.
- the wireless unit 225 includes various analog circuits, and consumes a considerable amount of power when all these circuits are operated. Especially in a wireless LAN device mounted on a mono terminal, this waste of power cannot be ignored.
- the present invention has been made in view of the above problems, and an object thereof is to provide a receiving device (for example, a wireless LAN device) that realizes power saving.
- a receiving device for example, a wireless LAN device
- the receiving device of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, and a reception that detects the signal strength of the radio frequency signal.
- An intensity detection unit a second signal processing unit that applies a process for increasing demodulation accuracy to the signal from the first signal processing unit; a demodulation unit that demodulates the signal from the second signal processing unit; and the received signal strength detection
- the energization of each circuit of the second signal processing unit is controlled based on the detection result of the unit. And an energization control unit.
- the radio frequency signal received by the first signal processing unit is converted into a lower frequency signal (for example, a baseband signal) by the first signal processing unit.
- the reception intensity detection unit detects the signal intensity of the received radio frequency signal.
- the signal output from the first signal processing unit is subjected to processing (for example, AGC control or amplification) for improving demodulation accuracy by the second signal processing unit.
- processing for example, AGC control or amplification
- the signal output from the second signal processing unit is demodulated into information transmitted by the demodulation unit.
- the energization control unit controls energization of each circuit of the second signal processing unit based on the detection result of the reception intensity detection unit. For example, the second signal processing unit is de-energized until the detection result of the reception intensity detection unit clears a predetermined condition. As a result, unlike the conventional technology (see Fig. 6), where the entire analog section is always energized and activated, the second signal is received (waiting for reception) until a signal to be received (which can be demodulated) arrives. It is possible to greatly reduce power consumption in the processing unit. Thereby, the power saving of the receiving device can be realized.
- the second signal processing unit includes a gain adjustment circuit that performs gain adjustment on a signal from the first signal processing unit, and an amplification circuit that amplifies the signal from the gain adjustment circuit.
- the control unit stops energization of the gain adjustment circuit and the amplification circuit in the state where the detection result does not satisfy the predetermined condition, and if the detection result satisfies the predetermined condition, the control unit supplies power to the gain adjustment circuit and the amplification circuit. It is preferable to start energization.
- the signal having the power of the first signal processing unit is subjected to gain adjustment processing (for example, auto gain control) and amplification processing by the gain adjustment circuit and the amplification circuit of the second signal processing unit.
- the energization control unit controls energization of the gain adjustment circuit and the amplification circuit based on the detection result of the reception intensity detection unit. That is, energization of the gain adjustment circuit and the amplifier circuit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition.
- gain adjustment processing for example, auto gain control
- amplification processing by the gain adjustment circuit and the amplification circuit of the second signal processing unit.
- the energization control unit controls energization of the gain adjustment circuit and the amplification circuit based on the detection result of the reception intensity detection unit. That is, energization of the gain adjustment circuit and the amplifier circuit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition.
- the energization control unit can control energization of the reception intensity detection unit, and the energization control unit is energized to the gain adjustment circuit, thereby completing the gain adjustment. Then, it is preferable to configure so that the energization to the reception intensity detection unit is stopped.
- the configuration described above is a configuration in which energization of the reception intensity detection unit is stopped when the detection result of the reception intensity detection unit clears a predetermined condition and the gain adjustment circuit is activated to complete gain adjustment. This is because if the gain adjustment is completed, it is not necessary to operate the reception intensity detection unit until the signal demodulation in the demodulation unit is completed. As described above, when the reception intensity detection unit does not need to be operated, the energization to the reception intensity detection unit is stopped, so that a greater power saving effect can be obtained.
- the receiving apparatus further includes a gain control unit that controls the gain adjustment circuit, and a digital operation control unit that controls the operating state of the gain control unit and the demodulation unit. Monkey.
- the energization control unit energizes the first signal processing unit and the reception intensity detection unit while the second signal It is preferable that energization of the processing unit is stopped and the digital operation control unit stops the operation of the demodulation unit and the gain control unit.
- the energization control unit starts energization to the second signal processing unit and the first signal processing unit.
- the energization of the reception intensity detection unit is continued, and the digital operation control unit starts the operations of the demodulation unit and the gain control unit.
- the signal from the first signal processing unit is subjected to gain adjustment and amplification processing by the second signal processing unit, and the signal from the second signal processing unit is demodulated into information transmitted by the demodulation unit.
- the power saving mode at the time of reception can be selected.
- the energization control unit receives the power. It is preferable that energization of the intensity detection unit is stopped while the second signal processing unit is energized, and the digital operation control unit continues the operations of the demodulation unit and the gain control unit.
- the signal from the first signal processing unit is optimally gain-adjusted by the gain adjustment circuit, and is sent to the demodulation unit via the amplification circuit (of the second signal processing unit).
- the amplification circuit of the second signal processing unit.
- the receiving device of the present invention includes a radio frequency signal processing unit that converts a received radio frequency signal into a lower frequency signal, and a reception that detects the signal strength of the radio frequency signal.
- An intensity detection unit an intermediate frequency signal processing unit that converts the signal from the radio frequency signal processing unit into a lower frequency signal, a demodulation unit that demodulates the signal of the intermediate frequency signal processing unit, and the reception intensity
- an energization control unit that controls energization of each circuit of the intermediate frequency signal processing unit based on the detection result of the detection unit.
- the radio frequency signal received by the radio frequency signal processing unit is converted into a lower frequency signal (for example, an intermediate frequency signal) by the radio frequency signal processing unit. Further, the signal from the radio frequency signal processing unit is converted into a lower frequency signal (for example, a baseband signal) by the intermediate frequency signal processing unit.
- the reception intensity detection unit detects the signal intensity of the received radio frequency signal. The signal output from the intermediate frequency signal processing unit is input to the demodulation unit and demodulated into the transmitted information.
- the energization control unit controls energization of each circuit of the intermediate frequency signal processing unit based on the detection result of the reception intensity detection unit. For example, the energization of the intermediate frequency signal processing unit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition.
- the energization of the intermediate frequency signal processing unit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition.
- the intermediate frequency signal processing unit further includes an oscillator and a mixer circuit that mixes the signal from the oscillator and the signal from the radio frequency signal processing unit, and the energization control unit includes: When the detection result does not satisfy the predetermined condition, It is preferable to stop energization and start energization to the mixer circuit when the detection result satisfies a predetermined condition.
- the signal from the radio frequency signal processing unit is mixed with the signal of the oscillator force by the mixer circuit of the intermediate frequency signal processing unit, and a lower frequency signal (for example, a baseband signal) Is converted to
- the energization control unit controls energization to the mixer circuit based on the detection result of the reception intensity detection unit. That is, energization of the mixer circuit is stopped until the detection result of the reception intensity detection unit clears a predetermined condition. As a result, it is possible to eliminate waste of power in the mixer circuit until a signal to be received (which can be demodulated) arrives (when waiting for reception).
- the intermediate frequency signal processing unit adjusts the gain of the signal from the radio frequency signal processing unit and outputs the signal to the mixer circuit, and the low-pass filter to which the signal from the mixer circuit is input.
- a circuit and an amplification circuit for amplifying a signal from the low-pass filter circuit, and the energization control unit includes the gain adjustment circuit, the low-pass filter circuit, and the amplification when the detection result does not satisfy a predetermined condition. It is preferable to stop energization of the circuit and start energization of the gain adjustment circuit, the low-pass filter circuit, and the amplification circuit when the detection result satisfies a predetermined condition.
- the signal from the radio frequency signal processing unit is gain-adjusted by the gain adjustment circuit, and mixed with the oscillator-powered signal by the mixer to thereby generate a lower-frequency signal (for example, baseband). Signal).
- Mixer circuit power The output signal is input to the low-pass filter circuit (where unnecessary signals are removed) and then amplified by the amplifier circuit.
- the energization control unit controls energization to the gain adjustment circuit, the low-pass filter circuit, and the amplification circuit based on the detection result of the reception intensity detection unit. That is, the gain adjustment circuit, the low-pass filter circuit, and the amplification circuit are de-energized until the detection result of the reception intensity detection unit clears a predetermined condition.
- the receiving apparatus of the present invention it is preferable to energize the oscillator regardless of the detection result.
- the configuration that controls the energization of the oscillator e.g. The configuration controlled from the upper layer is unnecessary, and the device configuration can be simplified.
- the energization control unit can control energization of the oscillator, and the energization control unit monitors a reception status to the radio frequency signal processing unit. Based on the result of monitoring, it is possible to control the energization of the oscillator.
- the energization control unit can control energization of the reception intensity detection unit, and the energization control unit energizes the gain adjustment circuit to complete gain adjustment. Then, it is preferable to be configured to stop energization to the reception intensity detection unit.
- the above configuration is a configuration in which energization of the reception intensity detection unit is stopped when the detection result of the reception intensity detection unit clears a predetermined condition and the gain adjustment circuit is activated to complete the gain adjustment. This is because if the gain adjustment is completed, it is not necessary to operate the reception intensity detection unit until the signal demodulation in the demodulation unit is completed. As described above, when the reception intensity detection unit does not need to be operated, the energization to the reception intensity detection unit is stopped, so that a greater power saving effect can be obtained.
- the energization control unit can also control energization to the oscillator, and the gain control unit that controls the gain adjustment circuit, and the operating states of the gain control unit and the demodulation unit are controlled. It can also be set as the structure further provided with the digital operation control part to control.
- the detection result does not satisfy a predetermined condition! /
- the energization control unit energizes the radio frequency signal processing unit and the reception intensity detection unit.
- the receiving apparatus can select a power saving mode during standby, and the energization control described above.
- the unit stops energization to the oscillator in the power saving mode during standby mode and starts energizing the oscillator when the power saving mode during standby mode ends. According to the above configuration, it is not necessary to operate during reception standby, and further power saving can be achieved by stopping energization of the oscillator.
- the receiving apparatus starts energizing each circuit of the intermediate frequency signal processing unit, and also includes an oscillator and a radio frequency signal processing unit.
- the energization of the reception intensity detection unit is continued, and the digital operation control unit starts the operation of the demodulation unit and the gain control unit.
- the signal having the power of the wireless signal processing unit is subjected to gain adjustment, down-conversion, unnecessary signal removal and amplification processing in the intermediate frequency signal processing unit.
- the signal from the intermediate frequency signal processor is demodulated into information transmitted by the demodulator.
- the reception device can select a power saving mode during reception.
- the power saving mode during reception when the control of the gain adjustment circuit by the gain control unit is completed, the energization control unit receives the power. It is preferable to stop energization of the intensity detection unit while continuing to energize the circuits of the oscillator and the intermediate frequency signal processing unit, and the digital operation control unit continues operation of the demodulation unit and the gain control unit.
- the gain control unit when the detection result satisfies a predetermined condition, the gain control unit
- the gain adjustment circuit (of the intermediate frequency signal processing unit) is controlled.
- the signal from the radio signal processing unit is optimally adjusted by the gain adjustment circuit and then mixed (down-converted) with the signal from the oscillator, and the low-pass filter circuit (of the intermediate frequency signal processing unit) and It is sent to the demodulator through the amplifier circuit.
- the energization control unit does not need to be operated during reception (after the control of the gain adjustment circuit)! Further power saving can be achieved by stopping energization of the reception intensity detection unit. Is possible.
- a communication device of the present invention is characterized by comprising the above-described receiving device.
- the wireless LAN device of the present invention includes the above receiving device! /
- the energization control method for the receiving device of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, and the radio frequency signal.
- a reception intensity detection unit that detects the signal strength of the signal and a second signal processing unit that performs a process of increasing demodulation accuracy on the signal from the first signal processing unit
- the energization to each circuit of the second signal processing unit is stopped, and if the detection result satisfies the predetermined condition, the second signal It is characterized by starting energization of each circuit of the processing unit.
- the energization control method of the receiving device of the present invention converts a received radio frequency signal into a lower frequency signal, and the radio frequency signal.
- a reception apparatus control method comprising: a reception intensity detection unit that detects a signal intensity of a signal; and an intermediate frequency signal processing unit that converts a signal from the radio frequency signal processing unit into a signal of a lower frequency. If the detection result of the intensity detection unit does not satisfy the predetermined condition, in a state where the current is not supplied to each circuit of the intermediate frequency signal processing unit and the detection result satisfies the predetermined condition, the intermediate frequency signal processing unit It is characterized by starting energization of each circuit.
- the energization control program for the receiving apparatus of the present invention is characterized by causing a computer to execute the energization control method for the receiving apparatus.
- the recording medium of the present invention is characterized in that the energization control program of the receiving device is stored in a computer readable manner.
- the energization control unit energizes each circuit of the second signal processing unit (intermediate frequency signal processing unit) based on the detection result of the reception intensity detection unit. Is controlled.
- the second signal processing unit intermediate frequency
- the second signal processing unit (intermediate frequency) until the signal to be received is received (during reception standby) as compared with the above-described conventional technology in which the entire analog unit is always energized and operated. It is possible to significantly reduce power consumption in the signal processing unit. Thereby, power saving of the receiving device can be realized.
- FIG. 1 is a block diagram showing a configuration of a wireless LAN terminal (receiving unit) according to the first embodiment of the present invention.
- FIG. 1 is a block diagram showing a configuration of a wireless LAN terminal (receiving unit) according to the first embodiment of the present invention.
- FIG. 2 is a flowchart for explaining control of the operating state of the wireless LAN terminal shown in FIG.
- FIG. 3 is a block diagram showing a configuration of a wireless LAN terminal (reception unit) according to a second embodiment of the present invention.
- FIG. 4 is a flowchart for explaining control of the operating state of the wireless LAN terminal shown in FIG. 3.
- FIG. 5 is a block diagram showing a configuration of a signal detection unit according to the second exemplary embodiment of the present invention.
- FIG. 6 is a block diagram showing a configuration of a conventional (power saving) wireless LAN device.
- wireless LAN terminal receiving device / wireless LAN device
- FIG. 3 Another embodiment of the wireless LAN terminal (receiving device / wireless LAN device) according to the present invention will be described below with reference to FIG. 3 and FIG.
- receiving section 102 of wireless LAN terminal 101 includes radio frequency signal processing section 104 (first signal processing section), signal detection section 106, and gain adjustment.
- the direct conversion configuration includes a unit 105 (second signal processing unit), a digital demodulation unit 107 (demodulation unit), a gain control unit 108, and an operation state control unit 109.
- the radio frequency signal processing unit 104, the gain adjustment unit 105, and a part of the signal detection unit 106 constitute the analog unit 110, and a part of the signal detection unit 106 (ADC 132 ⁇ reception start determination unit 133), digital demodulation unit 107, gain control unit 108, and operation state control unit 109 constitute digital unit 120.
- the radio frequency signal processing unit 104 includes an antenna 111, a low noise amplifier (LNA) 112, a radio frequency oscillator 0 ⁇ 03 113, and two radio frequency mixers (RF mixers) 114a '114 b. And two low-pass filters (LPF) 115a and 115b.
- the antenna 111 receives a radio frequency signal (RF signal) from a LAN (local area network) 103 to which the wireless LAN terminal 101 is (wirelessly) connected.
- the low noise amplifier 112 amplifies the radio signal 111 received by the antenna 111 with a low NF (noise figure), and outputs the amplified signal to a radio frequency mixer (RF mixer) 114 a ′ 114 b.
- the radio frequency oscillator 113 oscillates a signal for down-converting a radio frequency signal into a baseband signal.
- the radio frequency mixer 114a outputs one signal output from the low noise amplifier 112 and the oscillation from the radio frequency oscillator 113. The signal is mixed and a baseband signal (in-phase component) is output.
- the radio frequency mixer 114b mixes the other signal output from the low noise amplifier 112 and the signal obtained by shifting the oscillation signal from the radio frequency oscillator 113 by ⁇ ⁇ 2 to output a baseband signal (orthogonal component). To do.
- the Rhonos filter 115a removes unnecessary signals from the baseband signal (in-phase component) output from the radio frequency mixer 114a, and extracts a target frequency signal.
- the one-pass filter 115b removes an unnecessary signal from the baseband signal (orthogonal component) output from the radio frequency mixer 114b and extracts a target frequency signal.
- the gain adjustment unit 105 includes an AGC circuit (auto gain control circuit) 122 (gain adjustment circuit) and two amplifier circuits (AMP circuits) 126a ′ 126b.
- the amplifier circuit 126a amplifies the baseband signal (in-phase component) output from the one-pass filter circuit 115a and from which unnecessary signals are removed.
- the amplifier circuit 126b amplifies the baseband signal (orthogonal component) output from the low-pass filter circuit 115b from which unnecessary signals are removed.
- the signal detection unit 106 includes an RSSI circuit 131 (reception signal strength indicator circuit, reception strength detection unit) belonging to the analog unit 110, an AZD converter (ADC) 132 and a reception start determination unit belonging to the digital unit 120. 133.
- the RSSI circuit 131 calculates an RSSI signal from the intermediate frequency signal output from the bandpass filter 115 and outputs the RSSI signal to the AZD converter l32.
- the AZD converter 132 digitally inputs the RSSI signal detected by the RSSI circuit 131 and outputs it to the reception start determination unit 133.
- the configuration of reception start determination unit 133 and the determination of the suitability of reception start are the same as in Embodiment 2 (described later) (see FIG. 5).
- reception start determination section 133 outputs the RSSI value at this time as a reception level to gain control section 108. In this way, by determining the start of reception when the amount of increase in the sample value exceeds the threshold, even if the signal to be received and the interference signal are mixed and received, the signal to be received is overlooked. Therefore, it is possible to accurately determine the start of reception.
- the reference value generating circuit is not limited to the delay circuit, and may be a sample hold circuit that holds the sample value of the RSSI signal at a certain timing. Also, The reception start determination unit 133 determines whether or not the reception level (detection result of the reception intensity detection unit) output from the AZD conversion 132 is equal to or greater than a threshold (predetermined condition). A simple configuration that outputs a signal to the operation state control unit 109 may be used.
- the digital demodulation unit 107 includes two AZD modulation (ADC) 141a and 141b, and a baseband demodulation circuit (BB demodulation circuit) 142.
- the AZD converter 141a AD converts the baseband signal from the amplifier circuit 126a.
- the A / D converter 141b AD converts the baseband signal from the amplifier circuit 126b.
- the baseband demodulation circuit 142 demodulates the original data (transmission information) from the digital signal output from the AZD converters 141a and 141b, and outputs the demodulated data to the upper layer. Further, when the demodulation of the signal (packet data) is completed, the baseband demodulation circuit 142 transmits a packet end signal to the operation state control unit 109.
- the gain control unit 108 includes an AGC control circuit 150 and a DZA conversion (DAC) 160.
- the AGC control circuit 150 controls the AGC circuit 122 based on the reception level output from the reception start determination unit 133. In addition, when the control of the AGC circuit 122 is completed, the AGC control circuit 150 transmits an AGC control completion signal to the operation state control unit 109.
- the operation state control unit 109 includes an operation clock control circuit 151 (digital operation control unit) and an energization control circuit 152 (energization control unit).
- the operation clock control circuit 151 receives the reception start signal from the reception start determination unit 133, supplies an operation clock to the digital demodulation unit 107 and the gain control unit 108, and operates these units.
- the energization control circuit 152 receives the reception start signal from the reception start determination unit 133, energizes the gain adjustment unit 105, and operates it.
- the operation state control unit 109 receives the AGC control completion signal from the AGC control circuit 150 and controls the operation of the signal detection unit 106 (the RSSI circuit 131, the ADC 132, and the reception start determination unit 133). That is, the energization control circuit 152 receives the AGC control completion signal, stops energization of the R SSI circuit 131, and stops its operation. In response to the AGC control completion signal, the operation clock control circuit 151 stops the supply of the operation clock to the ADC 132 and the reception start determination unit 133, and stops these operations.
- the operation state control unit 109 receives the packet end signal from the baseband demodulation circuit 142 and performs operations of the gain adjustment unit 105, the signal detection unit 106, the digital demodulation unit 107, and the gain control unit 108.
- Control That is, the operation clock control circuit 151 receives the packet end signal, stops supplying the operation clock to the digital demodulation unit 107 and the gain control unit 108, stops the operation of these units, and also performs the ADC 132 and the reception start determination unit. The supply of 133 operation clocks is started, and these operations are started.
- the energization control circuit 152 receives the packet end signal, stops energizing the gain adjusting unit 105, stops its operation, starts energizing the RSSI circuit 131, and activates it.
- radio frequency signal processing unit 104, signal detection unit 106, and operating state control unit 109 (when receiving data (signal) are not being received) Only the operation clock control circuit 151 and the energization control circuit 152) operate, and the gain adjustment unit 105 (analog unit), the gain control unit 8 and the digital demodulation unit 7 (digital unit 20) should operate (S15).
- the energization control circuit 152 stops energization of the gain adjustment unit 105, and the operation clock control circuit 151 stops the operation clock to the digital demodulation unit 107 and the gain control unit 108. Supply has been stopped.
- the digital demodulation unit 7 and the gain control unit 8 digital unit including the analog gain adjustment unit 105 are not operated!
- the wireless LAN terminal has a long reception standby state, so this power saving effect is significant.
- the wireless LAN terminal 101 can always recognize transmission data (packets) to itself. is there.
- radio frequency signal received by radio frequency signal processing unit 104 (antenna 111) is determined by reception start determination unit 133 to be a reception level equal to or higher than a predetermined threshold (S16)
- reception start determination unit 133 determines reception level equal to or higher than a predetermined threshold (S16)
- the wireless LAN terminal 101 shifts from the reception standby state to the reception state and starts reception (S17).
- the signal processing flow (S15 to S17) at this time will be described in more detail as follows. is there.
- a signal (radio frequency signal) received by the antenna 111 is amplified by the low noise amplifier 112 with low NF, and is demultiplexed and output to the radio frequency mixer 114a and the radio frequency mixer 114b.
- One signal output from the low noise amplifier 112 is mixed with an oscillation signal from a radio frequency oscillator (RFOSC) 113 by a radio frequency mixer (RF mixer) 114a.
- the signal from the low noise amplifier 112 is down-converted into a baseband signal (in-phase component).
- the signal output from the radio frequency mixer 114a is input to the low-pass filter 115a.
- the low-pass filter 115a removes unnecessary signals included in the signal from the radio frequency mixer 114a.
- the other signal output from the low noise amplifier 112 is mixed with a signal obtained by shifting the oscillation signal from the radio frequency oscillator (RFOSC) 113 by ⁇ / 2 in a radio frequency mixer (RF mixer) 114b.
- RF mixer radio frequency mixer
- the signal from the low noise amplifier 112 is down-converted to a baseband signal (orthogonal component).
- the signal output from the radio frequency mixer 114b is input to the low pass filter 115b.
- the low-pass filter 115b removes unnecessary signals included in the signal from the radio frequency mixer 114b.
- the signal output from low pass filter 115 is input to reception intensity detector (RSSI) 131.
- the RSSI circuit 131 detects the RSSI value (reception level) of the input signal.
- the ADC 1 32 digitizes the RSSI value detected by the RSSI circuit 131 and outputs it to the reception start determination unit 133.
- the reception start determination unit 133 determines that a signal has been detected (yes in S16), and receives the reception start signal. Output to the operating state control unit 109. This starts reception (S17).
- energization control circuit 152 of operating state control unit 109 Upon receiving the reception start signal from reception start determination unit 133, energization control circuit 152 of operating state control unit 109 starts energization to gain adjustment unit 105, and operation clock control circuit 151 includes digital demodulation unit 107 and Supply of the operation clock to the gain control unit 108 is started.
- the gain adjusting unit 105, the digital demodulating unit 107, and the gain control unit 108 that have been in the OFF (non-operating) state are turned on (operated) (see S18).
- the radio frequency signal processing unit 104 and the signal detection unit 106 which have been energized (ON) until then, remain in the energized (ON) state (see S18).
- reception start determination unit 133 outputs an RSSI value (reception level) to AGC control circuit 150.
- the AGC control circuit 150 controls the AGC circuit 122 via the DAC 160 based on this reception level.
- the AGC control circuit 150 transmits an AGC control completion signal to the operation state control unit 109.
- the mode shifts to the power saving mode during reception (yes in S20). That is, in response to the AGC control completion signal, the operation clock control circuit 151 stops the operation clock supply of the ADC 132 and the reception start determination unit 133.
- the energization control circuit 152 stops energization of the RSSI circuit 131.
- the operation of the signal detection unit 106 stops, and the radio frequency signal processing unit 104, the gain adjustment unit 105, the digital demodulation unit 107, and the gain control unit 108 continue to operate (S21).
- the operation of the signal detection unit 106 is stopped (particularly, the RSSI circuit 131 is de-energized), thereby further reducing power consumption. Can be realized.
- the signal detection unit 106, the radio frequency signal processing unit 104, the gain adjustment unit 105, the digital demodulation unit 107, and the gain control unit 108 are all turned on (operated) and continue to operate (S22).
- the packet data is demodulated (S23).
- S23 The signal processing procedure in S23 is described as follows.
- the signal output from one low-pass filter 115a is appropriately adjusted in gain by the AGC circuit 122 and input to the amplifier circuit 126a. Amplified. The signal output from the amplifier circuit 126a is input to the ADC 141a of the digital demodulator 107. Further, the signal output from the other low-pass filter 115b is appropriately adjusted in gain by the AGC circuit 122, input to the amplifier circuit 126b, and amplified. The signal output from the amplifier circuit 126b is input to the ADC 141b of the digital demodulator 107.
- the baseband demodulator circuit (BB demodulator circuit) 142 of the digital demodulator 107 receives the signal from the AZD modulator l41a and the AZD modulator ⁇ 141b and sends it to the wireless LAN terminal 101.
- the transmitted signal (packet data) is demodulated.
- This demodulated data (demodulated data) is transmitted to the upper layer.
- the baseband demodulation circuit 142 transmits a packet demodulation end signal to the operation state control unit 109. As a result, the wireless LAN terminal 101 again shifts to the reception standby state (S25).
- energization control circuit 152 of operating state control section 109 stops energization of gain adjustment section 105 and RSSI circuit of signal detection section 106 Start energizing 131.
- the operation clock control circuit 151 stops supplying the operation clock to the digital demodulation unit 107 and the gain control unit 108, and starts energization of the ADC 132 and the reception start determination unit 133 of the signal detection unit 106.
- wireless LAN terminal (receiving device / communication device, wireless LAN device) according to the present invention will be described below with reference to FIG. 1 and FIG.
- the reception unit 2 of the wireless LAN terminal 1 includes a radio frequency signal processing unit 4, a signal detection unit 6, an intermediate frequency signal processing unit 5, and a digital
- a radio frequency signal processing unit 4 includes a radio frequency signal processing unit 4, a signal detection unit 6, an intermediate frequency signal processing unit 5, and a digital
- the radio frequency signal processing unit 4, the intermediate frequency signal processing unit 5, and a part of the signal detection unit 6 constitute an analog unit 10, and the signal detection unit 6 A digital unit 20 is configured by a part (ADC32 ⁇ reception start determination unit 33), the digital demodulation unit 7, the gain control unit 8, and the operation state control unit 9.
- the radio frequency signal processing unit 4 includes an antenna 11, a low noise amplifier (LNA) 12, a radio frequency oscillator (RFOSC) 13, a radio frequency mixer (RF mixer) 14, and a bandpass filter (BPF). 15 and.
- the antenna 11 receives a radio frequency signal from a LAN (local area network) 3 to which the wireless LAN terminal 1 is connected (wirelessly).
- the low noise amplifier 12 amplifies the radio signal 11 received by the antenna 11 with a low NF (noise figure).
- the radio frequency oscillator 13 down-converts the radio frequency signal to a lower frequency signal (intermediate frequency signal). Oscillates a signal to bet.
- the radio frequency mixer 14 mixes the radio frequency signal output from the low noise amplifier 12 and the oscillation signal from the radio frequency oscillator 13 and outputs an intermediate frequency signal having a frequency lower than that of the radio frequency signal.
- the bandpass filter 15 removes unnecessary signals from the intermediate frequency signal output from the radio frequency mixer 14 and extracts a target frequency signal.
- the intermediate frequency signal processing section 5 includes an intermediate frequency oscillator (IFOSC) 21 (oscillator), an AGC circuit (auto gain control circuit) 22 (gain adjustment circuit), and two intermediate frequency mixer circuits.
- IIF mixer circuit intermediate frequency oscillator
- AGC circuit auto gain control circuit
- AMP circuit amplifier circuit
- the intermediate frequency oscillator 21 oscillates a signal for down-converting the intermediate frequency signal to a lower frequency signal (baseband signal).
- the intermediate frequency mixer circuit 23a mixes the intermediate frequency signal output from the AGC circuit 22 and the oscillation signal of the intermediate frequency oscillator 21, and outputs a baseband signal (in-phase component).
- the intermediate frequency mixer circuit 23b mixes the intermediate frequency signal output from the AGC circuit 22 with the signal obtained by shifting the oscillation signal of the intermediate frequency oscillator 21 by ⁇ ⁇ 2, and outputs a baseband signal (orthogonal component). To do.
- the low-pass filter circuit 25a removes unnecessary signals from the baseband signal (in-phase component) output from the intermediate frequency mixer circuit 23a, and extracts a target frequency signal.
- the low-pass filter circuit 25b removes unnecessary signals from the baseband signal (orthogonal component) output from the intermediate frequency mixer circuit 23b.
- the amplifier circuit 26a amplifies the baseband signal (in-phase component) output from the low-pass filter circuit 25a and from which unnecessary signals are removed.
- the amplifier circuit 26b amplifies the baseband signal (orthogonal component) output from the low-pass filter circuit 25b and from which unnecessary signals are removed.
- the signal detection unit 6 includes an RSSI circuit (reception signal strength indicator circuit) 31 (reception strength detector) belonging to the analog unit 10, an AZD converter (ADC) 32 and a reception start determination unit belonging to the digital unit 20. 33.
- the RSSI circuit 31 calculates an RSSI signal from the intermediate frequency signal output from the bandpass filter 15 and outputs the RSSI signal to the AZD converter 32.
- the AZD converter 32 digitizes the RSSI signal detected by the RSSI circuit 31 and outputs it to the reception start determination unit 33.
- Reception start determination unit 33 determines whether or not reception start is appropriate as follows.
- FIG. 5 is a block diagram showing a configuration of the reception start determination unit 33. As shown in FIG.
- the reception start determination unit 33 includes a delay circuit 81, a subtraction circuit 82, and a comparison circuit 83.
- the delay circuit 81 delays the sample value of the RSSI signal preceding in time among the digitalized RSSI signals, and uses this as a basis for obtaining an increase amount of the RSSI value. A quasi-value.
- the reference value of the delay circuit 81 is subtracted from the sample value of the RSSI signal that is subsequently input by the subtracting circuit 82 to obtain an increase amount of the RSSI value (detection result of the reception intensity detecting unit).
- the comparison circuit 83 compares the RSSI value increase amount with the set increase threshold value, and determines that the signal is detected when the RSSI value increase amount exceeds the increase threshold value (predetermined condition). Then, a reception start signal is transmitted to the operation state control unit 9. Further, the reception start determination unit 33 outputs the RSSI value at this time to the AGC control circuit 50 of the gain control unit 8 as a reception level. In this way, by determining the start of reception when the amount of increase in the sample value exceeds the threshold, even if the signal to be received and the interference signal are mixed and received, the signal to be received is overlooked. Therefore, it is possible to accurately determine the start of reception. Thereby, the power saving effect of the wireless LAN terminal 1 can be further enhanced.
- the reference value generating circuit is not limited to the delay circuit 81, and may be a sample and hold circuit that holds the sample value of the RSSI signal at a certain timing.
- the reception start determination unit 33 determines whether the reception level output from the AZD conversion 32 is greater than or equal to a threshold value (predetermined level). A simple configuration that outputs to 9 may be used.
- the digital demodulator 7 includes two AZD converters (ADCs) 41a'41b and a baseband demodulation circuit (BB demodulation circuit) 42.
- the AZD converter 41a AD converts the baseband signal from the amplifier circuit 26a.
- the AZD conversion 41b AD converts the baseband signal from the amplifier circuit 26b.
- the baseband demodulation circuit 42 demodulates the original data (transmission information) from the digital signals output from the AZD conversions 41a and 41b, and outputs this demodulated data to the upper layer. Further, when the demodulation of the signal (packet data) is completed, the baseband demodulation circuit 42 transmits a packet end signal to the operation state control unit 9.
- the gain control unit 8 includes an AGC control circuit 50 and a DZA conversion (DAC) 60.
- AGC The control circuit 50 controls the AGC circuit 22 based on the reception level output from the reception start determination unit 33. In addition, when the control of the AGC circuit 22 is completed, the AGC control circuit 50 transmits an AGC control completion signal to the operation state control unit 9.
- the operation state control unit 9 includes an operation clock control circuit 51 (digital operation control unit) and an energization control circuit 52 (energization control unit).
- the operation clock control circuit 51 receives a reception start signal as much as the reception start determination unit 33, supplies an operation clock to the digital demodulation unit 7 and the gain control unit 8, and operates these units.
- the energization control circuit 52 receives the reception start signal of the reception start determination unit 33, and receives each circuit of the intermediate frequency signal processing unit 5 (AGC circuit 22, IF mixer circuit 2 3a '23b, LPF circuit 25a' 25b, and amplifier circuit) Energize 26a '26b) to activate these circuits.
- APC circuit 22, IF mixer circuit 2 3a '23b, LPF circuit 25a' 25b, and amplifier circuit Energize 26a '26b
- the energization control circuit 52 is provided in an upper layer (a layer higher than the physical layer), and receives from the reception status monitoring unit 66 that monitors the data reception state (reception interval) of the radio frequency signal processing unit 4. In accordance with the OSC control signal, the energization (operation start and stop) of the intermediate frequency oscillator (IFOSC) 21 is controlled.
- IOSC intermediate frequency oscillator
- the operation state control unit 9 receives the AGC control completion signal from the AGC control circuit 50, and controls the operation of the signal detection unit 6 (RSSI circuit 31, ADC 32 and reception start determination unit 33). That is, the energization control circuit 52 receives the AGC control completion signal, stops energization of the RSSI circuit 31, and stops its operation. In response to the AGC control completion signal, the operation clock control circuit 51 stops supplying the operation clock to the ADC 32 and the reception start determination unit 33, and stops the operation of these units.
- the operating state control unit 9 receives the packet end signal from the baseband demodulation circuit 42 and receives each circuit of the intermediate frequency signal processing unit 5, the signal detection unit 6, the digital demodulation unit 7, and the gain control unit 8. To control the operation. That is, the operation clock control circuit 51 receives the packet end signal, stops supplying the operation clock to the digital demodulation unit 7 and the gain control unit 8, stops the operation of these units, and starts the ADC 32 and reception. The supply of the operation clock of the judgment unit 33 is started, and these operations are started.
- the energization control circuit 52 receives the packet end signal, and each circuit of the intermediate frequency signal processing unit 5 (AGC circuit 22, IF mixer circuit 23a '23b, LPF circuit 25a' 25b, and amplifier circuit 26a '26b) Stop energizing Stop the operation of these circuits and start energizing the RSSI circuit 31 to operate it.
- AGC circuit 22, IF mixer circuit 23a '23b, LPF circuit 25a' 25b, and amplifier circuit 26a '26b Stop energizing Stop the operation of these circuits and start energizing the RSSI circuit 31 to operate it.
- the wireless LAN terminal 1 receives data, and at the time of reception standby, the radio frequency signal processing unit 4, the signal detection unit 6, and the operation state control unit 9 (operation clock control). Only the circuit 51 and the energization control circuit 52) operate, and each circuit (analog unit 10) of the intermediate frequency signal processing unit 5, and the gain control unit 8 and the digital demodulation unit 7 (digital unit 20) do not operate.
- the intermediate frequency oscillator 21 of the analog unit 10 depends on the mode to be selected (described later).
- the energization control circuit 52 is connected to each circuit of the intermediate frequency signal processing unit 5 (AGC circuit 22, IF mixer circuit 23a '23b, LPF circuit 25a' 25b, and amplifier circuit 26a '26b).
- the energization is stopped, and the operation clock control circuit 51 stops supplying the operation clock to the digital demodulation unit 7 and the gain control unit 8.
- power can be saved by stopping energization of each circuit of the intermediate frequency signal processing unit 5 during reception standby.
- wireless LAN terminals have a long reception standby state, so this power saving effect is significant.
- the wireless LAN terminal 1 Since the radio frequency signal processing unit 4 and the signal detection unit 6 operate even during reception standby, the wireless LAN terminal 1 is always in a state where it can recognize transmission data (packets) to itself. .
- an IFOSC (intermediate frequency oscillator) power saving mode power saving mode during reception standby
- This IFOSC power saving mode is a mode in which the intermediate frequency oscillator 21 (in the intermediate frequency signal processing unit 5) is not operated.
- the energization control circuit 52 stops energizing the intermediate frequency oscillator 21 and stops the operation of the intermediate frequency oscillator 21 based on the OSC control signal from the reception status monitoring unit 66 (upper layer). I am letting.
- each circuit of the intermediate frequency signal processing unit 5 other than the intermediate frequency oscillator 21 (AGC circuit 22, IF mixer circuit 23a '23b, LPF circuit 25a' 25b, and amplifier circuit 26a '26b), digital demodulator 7 and gain controller 8 are turned off (inactive), intermediate frequency oscillator 21 and radio frequency signal
- the processing unit 4 and the signal detection unit 6 are turned on (operated) (see S4).
- the wireless LAN terminal 1 shifts from the reception standby state to the reception state and starts reception. (S6).
- the signal processing flow (S4 to S6) at this time will be described in detail as follows.
- a signal (radio frequency signal) received by the antenna 11 is amplified by the low noise amplifier 12 at a low NF.
- the signal output from the low noise amplifier (LNA) 12 is mixed with the oscillation signal from the radio frequency oscillator (RFOSC) 13 in the radio frequency mixer (RF mixer) 14.
- the signal from the low noise amplifier 12 is down-converted to an intermediate frequency signal.
- the signal output from the radio frequency mixer 14 is input to the bandpass filter 15.
- the band pass filter 15 removes unnecessary signals included in the signal from the radio frequency mixer 14.
- the signal output from the bandpass filter 15 is input to the reception intensity detector (RSSI) 31.
- the RSSI circuit 31 detects the RSSI value (reception level) of the input signal.
- the AZD variable 32 digitizes the RSSI value detected by the RSSI circuit 31 and outputs it to the reception start determination unit 33.
- the reception start determination unit 33 determines that a signal has been detected (yes in S5), and the reception start signal Is output to the operating state control unit 9. This starts reception (S6).
- the energization control circuit 52 of the operating state control unit 9 starts energization to each circuit of the intermediate frequency signal processing unit 5, and the operation clock control circuit 51 is The operation clock supply to the digital demodulator 7 and the gain controller 8 is started.
- each circuit of the intermediate frequency signal processing unit 5 that has been in the OFF (non-operating) state until then (A GC circuit 22, IF mixer circuit 23a '23b, LPF circuit 25a' 25b, amplification circuit 26a '26b)
- the digital demodulation unit 7 and the gain control unit 8 are turned on (operated) (see S7).
- the radio frequency signal processing unit 4, the intermediate frequency oscillator 21 and the signal detection unit 6 that have been in the ON (operating) state remain in the ON (operating) state (see S7).
- reception start determination unit 33 When gain control unit 8 is energized (ON), reception start determination unit 33 outputs the reception level (input from ADC 32) to AGC control circuit 50.
- the AGC control circuit 50 controls the AGC circuit 22 via the DAC 60 based on this reception level.
- the control of the AGC circuit 22 is completed (S8), the AGC control circuit 50 transmits an AGC control completion signal to the operating state control unit 9.
- the power saving mode at the time of reception is a default, it is possible not to select the mode (S9).
- the signal detection unit 6, the radio frequency signal processing unit 4, the intermediate frequency signal processing unit 5, the digital demodulation unit 7 and the gain control unit 8 are all turned on, and the same operation state as S7 is continued (Sl l).
- the packet data is demodulated (S12).
- the signal processing procedure in S12 is as follows.
- One of the signals output from the AGC circuit 22 is intermediate in the intermediate frequency mixer circuit 23a. It is mixed with the oscillation signal from the frequency oscillator 21. Thus, a baseband signal (in-phase component) is output from the intermediate frequency mixer circuit 23a to the LPF circuit 25a.
- the LPF circuit 25a removes unnecessary signals.
- the signal from the LPF circuit 25a is input to the amplifier circuit 26a and amplified.
- the signal from the amplifier circuit 26a is input to the ADC 41a of the digital demodulator 7.
- the other signal output from the AGC circuit 22 is mixed with a signal obtained by shifting the oscillation signal from the intermediate frequency oscillator 21 by ⁇ 2 in the intermediate frequency mixer circuit 23b.
- the baseband signal (orthogonal component) from the intermediate frequency mixer circuit 23b is output to the LPF circuit 25b.
- the LPF circuit 25b removes unnecessary signals.
- the signal from the LPF circuit 25b is input to the amplifier circuit 26b and amplified.
- the signal from the amplifier circuit 26b is input to the ADC 41b of the digital demodulator 7.
- the baseband demodulation circuit (BB demodulation circuit) 42 of the digital demodulation unit 7 the signal (packet data) transmitted to the wireless LAN terminal 1 based on the signals from the AZD converter 4la and the AZD converter 41b Is demodulated. This demodulated data (demodulated data) is transmitted to the upper layer.
- the baseband demodulation circuit 42 transmits a packet demodulation end signal to the operation state control unit 9. As a result, the wireless LAN terminal 1 again shifts to the reception standby state (S14).
- the energization control circuit 52 of the operation state control unit 9 is connected to each circuit (AGC circuit 22, IF mixer circuit) of the intermediate frequency signal processing unit 5.
- 23a ′ 23b, LPF circuit 25a ′ 25b, and amplifier circuit 26a ′ 26b) are stopped from energization, and the RSSI circuit 31 of signal detector 6 is also energized.
- the operation clock control circuit 51 stops supplying the operation clock to the digital demodulation unit 7 and the gain control unit 8, and starts energization of the ADC 32 and the reception start determination unit 33 of the signal detection unit 6.
- each unit of the digital unit is controlled by stopping or starting the operation clock supplied by the operation clock control circuit, but the present invention is not limited to this.
- the energization control circuit may be configured to control energization of each unit of the digital unit (ADC 'reception start determination unit, digital demodulation unit, gain control unit).
- the functions of the operating state control unit described above can be realized by hardware, and can also cause a computer to execute a program (for example, a computing means such as a CPU is stored in a recording medium such as ROM or RAM. It is also possible to achieve this by executing the program code.
- the double heterodyne method and the direct conversion method are described, but the configuration to which the receiving apparatus of the present invention is applied is not limited to these methods.
- RF radio frequency signal
- first analog processing unit for example, the first signal processing unit
- digital processing unit for example, the demodulating unit
- the configuration of the present invention is applied to any receiver in which an analog processing unit (second analog processing unit, for example, the second signal processing unit or the intermediate frequency signal processing unit) is present (the power supply control unit is the second control unit). Can be controlled).
- the reception device of the present invention includes a first signal processing unit that converts a received radio frequency signal into a lower frequency signal, a reception intensity detection unit that detects a signal intensity of the radio frequency signal, and The detection result of the second signal processing unit that performs a process for increasing the demodulation accuracy on the signal from the first signal processing unit, the demodulation unit that demodulates the signal from the second signal processing unit, and the reception intensity detection unit Based on this, it can also be expressed as a configuration including an operation state control unit that controls operation start and operation stop of each circuit of the second signal processing unit.
- the receiving device of the present invention includes a radio frequency signal processing unit that converts a received radio frequency signal into a lower frequency signal, a reception intensity detection unit that detects the signal strength of the radio frequency signal, The detection result of the intermediate frequency signal processing unit that converts the signal of the radio frequency signal processing unit power into a signal of a lower frequency, the demodulation unit that demodulates the signal from the intermediate frequency signal processing unit, and the reception intensity detection unit Based on this, it can also be expressed as a configuration including an operation state control unit that controls operation start and operation stop of each circuit of the intermediate frequency signal processing unit.
- the receiving apparatus is applicable to, for example, a wireless LAN terminal mounted on a mopile terminal such as a PDA.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mobile Radio Communication Systems (AREA)
- Circuits Of Receivers In General (AREA)
- Selective Calling Equipment (AREA)
- Superheterodyne Receivers (AREA)
- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
- Small-Scale Networks (AREA)
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2005800217099A CN1977462B (zh) | 2004-07-05 | 2005-07-05 | 接收装置、通信装置、无线lan装置、接收装置的通电控制方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004198605A JP3875243B2 (ja) | 2004-07-05 | 2004-07-05 | 受信装置、通信装置、無線lan装置、受信装置の制御方法、受信装置の制御プログラム、記録媒体 |
JP2004-198605 | 2004-07-05 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006004121A1 true WO2006004121A1 (ja) | 2006-01-12 |
Family
ID=35782920
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/012415 WO2006004121A1 (ja) | 2004-07-05 | 2005-07-05 | 受信装置、通信装置、無線lan装置、受信装置の通電制御方法、受信装置の通電制御プログラム、記録媒体 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP3875243B2 (ja) |
CN (1) | CN1977462B (ja) |
WO (1) | WO2006004121A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4588585B2 (ja) * | 2005-08-31 | 2010-12-01 | 株式会社ケンウッド | 無線通信機の受信電界強度信号測定回路。 |
JP4958256B2 (ja) * | 2006-02-23 | 2012-06-20 | 能美防災株式会社 | 信号受信装置および通信システム |
EP2033327B1 (en) * | 2006-05-16 | 2011-04-06 | Imec | Digital receiver for software-defined radio implementation |
JP5087476B2 (ja) | 2008-06-12 | 2012-12-05 | ルネサスエレクトロニクス株式会社 | 受信装置およびその動作方法 |
JP2011130094A (ja) * | 2009-12-16 | 2011-06-30 | Japan Radio Co Ltd | 無線受信機 |
EP2388951B1 (en) * | 2010-05-17 | 2017-08-09 | Nxp B.V. | Network |
CN103414485B (zh) * | 2013-07-05 | 2015-06-03 | 熊猫电子集团有限公司 | 短波接收天线调谐方法与系统 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0272724A (ja) * | 1988-09-07 | 1990-03-13 | Sanyo Electric Co Ltd | 受信電波処理回路のパワーセイブ回路及びそのパワーセイブ方法 |
JP2000236286A (ja) * | 1999-02-12 | 2000-08-29 | Seiko Epson Corp | 通信装置 |
JP2001218129A (ja) * | 2000-01-31 | 2001-08-10 | Toshiba Corp | デジタル変調信号受信装置 |
JP2002033673A (ja) * | 2000-07-18 | 2002-01-31 | Sharp Corp | 移動無線通信機の受信装置 |
JP2002135151A (ja) * | 2000-10-23 | 2002-05-10 | Kobe Steel Ltd | 携帯情報端末 |
-
2004
- 2004-07-05 JP JP2004198605A patent/JP3875243B2/ja not_active Expired - Fee Related
-
2005
- 2005-07-05 WO PCT/JP2005/012415 patent/WO2006004121A1/ja active Application Filing
- 2005-07-05 CN CN2005800217099A patent/CN1977462B/zh not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0272724A (ja) * | 1988-09-07 | 1990-03-13 | Sanyo Electric Co Ltd | 受信電波処理回路のパワーセイブ回路及びそのパワーセイブ方法 |
JP2000236286A (ja) * | 1999-02-12 | 2000-08-29 | Seiko Epson Corp | 通信装置 |
JP2001218129A (ja) * | 2000-01-31 | 2001-08-10 | Toshiba Corp | デジタル変調信号受信装置 |
JP2002033673A (ja) * | 2000-07-18 | 2002-01-31 | Sharp Corp | 移動無線通信機の受信装置 |
JP2002135151A (ja) * | 2000-10-23 | 2002-05-10 | Kobe Steel Ltd | 携帯情報端末 |
Also Published As
Publication number | Publication date |
---|---|
CN1977462B (zh) | 2010-05-05 |
JP2006020254A (ja) | 2006-01-19 |
JP3875243B2 (ja) | 2007-01-31 |
CN1977462A (zh) | 2007-06-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2006004121A1 (ja) | 受信装置、通信装置、無線lan装置、受信装置の通電制御方法、受信装置の通電制御プログラム、記録媒体 | |
CN111527704B (zh) | 用于检测蓝牙低功耗分组的控制器 | |
US7386285B2 (en) | Automatic gain control adaptive for plural modulation schemes | |
US8615213B2 (en) | Reducing power consumption of a filter | |
US8259858B2 (en) | Carrier detect system, apparatus and method thereof | |
JPH04297115A (ja) | 可変利得制御回路 | |
JP2004297150A (ja) | 無線受信装置 | |
JP2005229570A (ja) | データ受信装置 | |
JP2700000B2 (ja) | 無線lanシステムの無線送受信機 | |
JP5615203B2 (ja) | 自動利得制御装置 | |
JP2005086779A (ja) | ディジタル受信装置及び無線通信システム | |
US8457554B2 (en) | Method and system for a continuing scan in a bluetooth wireless system | |
US7436905B2 (en) | Receiver device, communications device, wireless LAN device, power control method for a receiver device, power control program for a receiver device, and storage medium | |
US9288697B2 (en) | Wireless communication circuit with a wideband received signal strength indicator | |
JP3731276B2 (ja) | 受信機 | |
KR100956667B1 (ko) | 트랜스시버 디바이스에 대한 디지털 자동 이득 제어 | |
US6272116B1 (en) | Power saving device | |
US8112050B2 (en) | Reducing power consumption in receivers employing conversion to intermediate frequency | |
JP4312780B2 (ja) | 受信装置、通信装置、無線lan装置、受信装置の制御方法、受信装置の制御プログラム、記録媒体 | |
JP4888361B2 (ja) | FSK(FrequencyShiftKeying)ディジタル受信装置 | |
JP5905843B2 (ja) | 無線受信装置及び無線受信方法 | |
TWI449346B (zh) | 可節能之無線接收器與系統及其操作之方法 | |
JP2005318658A (ja) | 無線受信装置 | |
JP2016001772A (ja) | 車両用通信システム | |
JP3875815B2 (ja) | ディジタル送受信機 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KM KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU LV MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 200580021709.9 Country of ref document: CN |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: DE |
|
122 | Ep: pct application non-entry in european phase |