WO2005122240A1 - Silicon wafer for probe bonding and probe bonding method using thereof - Google Patents

Silicon wafer for probe bonding and probe bonding method using thereof Download PDF

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Publication number
WO2005122240A1
WO2005122240A1 PCT/KR2005/001806 KR2005001806W WO2005122240A1 WO 2005122240 A1 WO2005122240 A1 WO 2005122240A1 KR 2005001806 W KR2005001806 W KR 2005001806W WO 2005122240 A1 WO2005122240 A1 WO 2005122240A1
Authority
WO
WIPO (PCT)
Prior art keywords
silicon wafer
probe
supporting beams
bonding
openings
Prior art date
Application number
PCT/KR2005/001806
Other languages
English (en)
French (fr)
Inventor
Jung-Hoon Lee
Original Assignee
Phicom Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Phicom Corporation filed Critical Phicom Corporation
Priority to JP2007527028A priority Critical patent/JP4527777B2/ja
Priority to US11/569,839 priority patent/US7804312B2/en
Publication of WO2005122240A1 publication Critical patent/WO2005122240A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07342Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being at an angle other than perpendicular to test object, e.g. probe card

Definitions

  • the present invention relates to a silicon wafer for probe bonding and a probe bonding method using the same, and, more particularly, to a silicon wafer including probe tips and supporting beams formed at a surface thereof, which is improved in structure to facilitate probe bonding to a probe substrate, and a probe bonding method of bonding the supporting beams of the silicon wafer to bumps of the probe substrate.
  • probe equipment As an element of the probe equipment, is designed to come into contact with a pad provided in a semiconductor integrated circuit device, thereby serving to electrically communicate various electric signal generators or signal detectors of the probe equipment with the pad. Through the electric communication between probes on the probe card and the pad, it is tested whether the semiconductor integrated circuit device operates normally or not.
  • a cantilever-type probe card has a 4 X 8 chip array structure (32 DUT in parallel) to correspond to a chip array of an electronic component being tested.
  • FIGS. 1 to 3 a manufacturing process of the conventional normal probe card is illustrated in plan views.
  • bumps 11 are formed at a surface of a probe substrate 10 to correspond to pads arranged on a surface of an electronic component, chip, etc. being tested.
  • the bumps 11, probe tips 21, and supporting beams 22 are formed by photolithography and plating processes.
  • a solder paste P is applied to an upper end of each bump 11.
  • the silicon wafer 20 is placed on the probe substrate 10 so that an end of each supporting beam 22 comes into contact with the upper end of each bump 11, and is heated to a temperature of approximately 200 to 350 degree Celsius. Thereby, the bump 11 and the supporting beam 22 are attached to each other as the solder paste P is molten.
  • a probe bonding process that is a key process in the manufacture of a probe card, is completed.
  • FIGS. 4 to 6 are plan views illustrating a manufacturing process of a conventional large-scale probe card.
  • a large-scale probe substrate 30 having a 8 X 16 chip array structure (128 DUT in parallel) and a 12-inch silicon wafer 40 to correspond to the large-scale probe substrate 30 are used to manufacture the conventional large-scale probe card. Disclosure of Invention Technical Problem
  • the material of the substrate 10 is mainly limited to ceramic based materials. This problematically increases the price of the probe card.
  • contact regions between the bumps 11 and the supporting beams 22 may exhibit a positional error under a high temperature due to a difference between thermal expansion coefficients of both the silicon wafer 20 and the ceramic substrate 10. Moreover, a residual stress generated upon cooling tends to generate a shearing force at the contact regions, causing unintentional separation between the bumps 11 and the supporting beams 22.
  • the manufacturing process of the conventional probe card suffers from inferior compatibility of the silicon wafer when the size of the probe substrate varies. For example, when a 128-DUT probe substrate as shown in FIGS. 4 to 6 has to substitute for a 32-DUT probe substrate, correspondingly, a6-inch silicon wafer must be substituted by a 12-inch silicon wafer. Seeing as the size of probe test equipment is gradually increasing, the compatibility problem of the conventional probe bonding process must be periodically generated. [16] Fourthly, when the large-scale silicon wafer is used, it increases generation probability of defective products, resulting in high manufacturing costs of products.
  • the present invention has been made in view of the above problems, and it is an object of the present invention to provide a silicon wafer for probe bondingand a probe bonding method using the same, which enable manufacture of a probe card at room temperature using a local laser scanning method, thereby permitting use of various materials of probe substrates to thereby reduce manufacturing costs of products, and minimizing damage to probes due to a residual stress generated upon thermal expansion and shrinkage.
  • a probe card can be manufactured at room temperature using a local laser scanning method. This has the effects of reducing manufacturing costs of the probe card because various materials of probe substrates can be used and minimizing damage to probes due to a residual stress generated upon thermal expansion and shrinkage.
  • a silicon wafer having a constant size can be used to perform probe bonding on the probe substrate. This results in high compatibility of the silicon wafer for probe bonding.
  • a glass panel can be bonded to the surface of silicon wafer modules by means of epoxy adhesive, double sided tape, etc.
  • the glass panel is effective to control the flatness of all the silicon wafer modules, and to prevent sagging or distortion of the silicon wafer due to thermal expansion and shrinkage generated when contact regions betweenbumps of the probe substrate and supporting beams of the silicon wafer are heated and cooled during the probe bonding process.
  • FIGS. 1 to 3 are plan views illustrating a manufacturing process of a conventional normal probe card
  • FIGS. 4 to 6 are plan views illustrating a manufacturing process of a conventional large-scale probe card
  • FIG. 7 is a plan view illustrating a silicon wafer for probe bonding according to a first embodiment of the present invention.
  • FIG. 8 is a plan view illustrating a process of manufacturing a probe card using the silicon wafer of FIG. 7;
  • FIG. 9 is an enlarged plan view illustrating a silicon wafer for probe bonding according to a second embodiment of the present invention.
  • FIGS. 10 to 13 are side sectional views illustrating a process of manufacturing the silicon wafer for probe bonding according to the present invention.
  • FIGS. 14 and 15 are plan views illustrating a silicon wafer module for probe bonding according to a third embodiment of the present invention.
  • FIG. 16 is a plan view illustrating a probe bonding process using the silicon wafer according to the present invention.
  • FIG. 17 is a plan view illustrating a probe bonding process using the silicon wafer module according to the present invention.
  • FIG. 18 is a side sectional view illustrating a use example of the silicon wafer for probe bonding according to a fourth embodiment of the present invention.
  • FIG. 19 is a partially broken away enlarged side sectional view illustrating a probe bonding process using the silicon wafer of FIG. 18.
  • asilicon wafer for probe bonding comprising probe tips formed at a first surface of the silicon wafer, and supporting beams each having a first end provided on each of the probe tips to have a predetermined arrangement pattern, further comprising: openings formed through the silicon wafer to expose a second end of the respective supporting beams opposite to the probe tips.
  • a silicon wafer module for probe bonding formed by dividing a silicon wafer to have a predetermined shape, the silicon wafer comprising a plurality of probe tips formed at a first surface of the silicon wafer, and a plurality of supporting beams each having a first end that comes into contact with each of the probe tips to have a predetermined arrangement pattern, wherein the silicon wafer further comprises a plurality of openings formed through the silicon wafer to allow a second end of the respective supporting beams to protrude into the respective openings, wherein the second end of the respective supporting beams is exposed to the outside through the openings.
  • a probe bonding method comprising the steps of: a) locating a silicon wafer for probe bonding on a probe substrate so that supporting beams of the silicon wafer, which are exposed to the outside through respective openings formed through the silicon wafer, come into contact with bumps formed at the probe substrate, respectively; b) scanning laser beams from an exterior source through the openings to bond the supporting beams to the bumps; and c) removing the silicon wafer for probe bonding by etching while retaining the probe tips and the supporting beams.
  • aprobe bonding method comprising the steps of: a) locating a silicon wafer module for probe bonding on a predetermined region of a probe substrate so that supporting beams of the silicon wafer module, which are exposed to the outside through respective openings formed through the silicon wafer module, come into contact with bumps formed on the probe substrate, respectively; b) combining one or more additional silicon wafer modules to be coupled to the silicon wafer module to thereby correspond to all the bumps on the probe substrate; c) scanning laser beams from an exterior source through the openings to bond the supporting beams to the bumps; and d) removing the silicon wafer modules for probe bonding by etching while retaining the probe tips and the supporting beams.
  • a probe bonding method using a silicon wafer for probe bonding having a size smaller than a probe substrate comprising the steps of: a) locating the silicon wafer for probe bonding on a pr edetermined region of the probe substrate so that supporting beams of the silicon wafer, which are exposed to the outside through respective openings formed through the silicon wafer, come into contact with bumps formed on the probe substrate, respectively; b) scanning laser beams from an exterior source through the openings to bond the supporting beams to the bumps; and c) removing the silicon wafer for probe bonding by etching while retaining the probe tips and the supporting beams; and d) re- peatedlyperforming step a) to step c) in this sequence on the remaining portion of the probe substrate using one or more additional silicon wafers for probe bonding having the same shape as the silicon wafer.
  • FIG. 7 is a plan view illustrating a silicon wafer for probe bonding according to a first embodiment of the present invention.
  • the silicon water 140 for probe bonding according to the first embodiment of the present invention is formed at a surface thereof with probe tips 141 and supporting beams 142 via photolithography and plating processes.
  • a first opening 143 between two pairs of the supporting beams 142 arranged adjacent to each other is defined a first opening 143 so that the supporting beams 142 partially protrude into the first opening 143.
  • a second opening 143' is defined between the two supporting beams 142 so that the supporting beams 142 partially protrude into the second opening 143'
  • Both the first and second openings 143 and 143' are penetrated through the silicon wafer 140 from an upper surface to a lower surface thereof.
  • FIG. 9 is an enlarged plan view illustrating a silicon wafer for probe bonding according to a second embodiment of the present invention.
  • a plurality of horizontally elongated openings 143" may be formed in parallel to one another so that a predetermined number of supporting beams 142, arranged adjacent to one another, are allotted to each opening 143" and protrude into the opening 143".
  • curved openings may be formed according to the arrangement structure of the supporting beams 142.
  • the openings 143 areformed by coating a photoresist on the upper surface of the silicon wafer 140, attaching a mask, that is patterned with the openings 143, to the photoresist coated upper surface, and successively performing exposure and development of the mask.
  • FIGS. 10 to 13 are side sectional views illustrating a process of manufacturing the silicon wafer for probe bonding according to the present invention.
  • a photoresist 160 is applied to a surface of the silicon wafer 140, i.e. the upper surface of the silicone wafer 140, opposite to the supporting beams 142.
  • the photoresist 160 is partially removed as exposure and development processes are successively performed on predetermined portions of the photoresist 160, thereby obtaining an opening pattern 161.
  • the photoresist 160 is completely removed from the surface of the silicon wafer 140 by making use of chemicals, such as acetone, selected depending on the material of the photoresist. Through the openings 143 formed by the above described process, one end of each supporting beam 142 is exposed to the outside.
  • FIG. 8 a process of manufacturing a probe card using the silicon wafer 140 for probe bonding is illustrated in plan view.
  • each supporting beam 142 that is exposed to the outside through the opening 143 formed at the silicon wafer 140, is positioned to come into contact with an upper end of each bump 131 formed at a substrate 130, and a laser beam 201 from a separate exterior laser source 200 is scanned to the contact region between the supporting beam 142 and the bump 131 through the opening 143.
  • the laser beam 201 melts a solder paste P applied to the upper end of the bump 131, causing the supporting beam 142 to be bonded to the bump 131.
  • the silicon wafer 140 is removed by etching while retaining the probe tips 141 and the supporting beams 142. In this way, a probe card is completed.
  • the attachment of both the bump and the supporting beam is achieved through localized heating. This enables the probe card to be manufactured at room temperature regardless of the material of the probe substrate, resulting in a reduction in the price of the substrate. Further, the probe bonding method of the present invention does not generate a residual stress due to thermal expansion and shrinkage, preventing damage to the resulting probes.
  • the silicon wafer for probe bonding according to the present invention may be equally divided into four parts so that a defective quarter of the silicon wafer is cut, resulting in a silicon wafer module.
  • FIGS. 14 and 15 are plan views illustrating a silicon wafer module for probe bonding according to a third embodiment of the present invention.
  • FIG. 14 when it is dete ⁇ nined that a quarter 240a of a completed silicon wafer 240 for probe bonding involves a defective portion E, the quarter 240a is cut away from the silicon wafer 240.
  • Modulation of a silicon wafer may be performed in such a fashion that the silicon wafer is divided into two semicircular parts instead of four equal parts. If necessary, furthermore, the circular silicon wafer may be unequally divided by a line offset froma center axis.
  • the probe bonding using the silicon wafer module of the present embodiment is performed by scanning a laser beam through each opening formed at the wafer.
  • a conventional small-size silicon wafer for probe bonding may be used in spite of scale-up of a probe substrate.
  • a probe bonding process, using the silicon wafer smaller than the probe substrate, according to the present invention is illustrated in plan view.
  • FIG. 17 is a plan view illustrating a probe bonding process using the silicon wafer module according to the present invention.
  • FIG. 18 is a side sectional view illustrating a silicon wafer for probe bonding according to a fourth embodiment of the present invention.
  • a glass panel 170 may be attached to the surface of the silicon wafer 140 opposite to the supporting beams and probe tips thereof.
  • the use of the glass panel 170 is effective to prevent sagging or distortion at the center of the silicon wafer 140 when the silicon wafer 140 is formed with the above described elongated openings 143" as shown in FIG. 9. That is, when the contact regions between the bumps and the supporting beams are heated and cooled by the laser beam, they are inevitably subjected to thermal expansion or shrinkage. This causes sagging or distortion of the silicon wafer due to the presence of the elongated openings 143".
  • the glass panel 170 is able to effectively prevent the sagging or distortion of the silicon wafer 140.
  • the glass panel 170 may be attached to the combined silicon wafer modules 340a and 240b of FIG. 15 or the combined silicon wafer modules 440a of FIG. 17. In this case, the glass panel 170 also functions to keep the silicon wafer modules level.
  • the glass panel 170 is bonded to the surface of the silicon wafer or silicon wafer modules by means of epoxy adhesive, double sided tape, etc.
  • a probe bonding process using the silicon wafer 140 provided with the glass panel 170 is illustrated inpartially broken away enlarged side sectional view.
  • the glass panel 170 permits penetration of the laser beam 210, having no effect on the bonding process.
PCT/KR2005/001806 2004-06-14 2005-06-14 Silicon wafer for probe bonding and probe bonding method using thereof WO2005122240A1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007527028A JP4527777B2 (ja) 2004-06-14 2005-06-14 複数のプローブが形成されたシリコンウェハ、シリコンウェハモジュール及びプローブボンディング方法
US11/569,839 US7804312B2 (en) 2004-06-14 2005-06-14 Silicon wafer for probe bonding and probe bonding method using thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020040043676A KR100557201B1 (ko) 2004-06-14 2004-06-14 프로브 본딩용 실리콘 웨이퍼 및 모듈 및 이를 이용한 프로브 본딩 방법
KR10-2004-0043676 2004-06-14

Publications (1)

Publication Number Publication Date
WO2005122240A1 true WO2005122240A1 (en) 2005-12-22

Family

ID=35503371

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2005/001806 WO2005122240A1 (en) 2004-06-14 2005-06-14 Silicon wafer for probe bonding and probe bonding method using thereof

Country Status (6)

Country Link
US (1) US7804312B2 (ko)
JP (1) JP4527777B2 (ko)
KR (1) KR100557201B1 (ko)
CN (1) CN100431127C (ko)
TW (1) TWI283301B (ko)
WO (1) WO2005122240A1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007098291A2 (en) * 2006-02-27 2007-08-30 Sv Probe Pte Ltd. Beam assembly method for large area array multi-beam dut probe cards

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Publication number Priority date Publication date Assignee Title
KR101399537B1 (ko) * 2007-10-22 2014-05-28 주식회사 코리아 인스트루먼트 프로브 카드 제조방법
KR102053720B1 (ko) * 2013-03-11 2019-12-09 삼성전자주식회사 플라즈마 진단방법 및 장치
CN108258088B (zh) * 2018-02-02 2022-02-22 厦门市三安光电科技有限公司 微发光装置的键合治具、键合设备及其键合方法

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US5718040A (en) * 1992-07-30 1998-02-17 International Business Machines Corporation Method of making spring probe with piloted and headed contact
US6520778B1 (en) * 1997-02-18 2003-02-18 Formfactor, Inc. Microelectronic contact structures, and methods of making same
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Cited By (3)

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Publication number Priority date Publication date Assignee Title
WO2007098291A2 (en) * 2006-02-27 2007-08-30 Sv Probe Pte Ltd. Beam assembly method for large area array multi-beam dut probe cards
WO2007098291A3 (en) * 2006-02-27 2008-01-17 Sv Probe Pte Ltd Beam assembly method for large area array multi-beam dut probe cards
US7637006B2 (en) 2006-02-27 2009-12-29 Sv Probe Pte. Ltd. Beam assembly method for large area array multi-beam DUT probe cards

Also Published As

Publication number Publication date
TW200604532A (en) 2006-02-01
JP4527777B2 (ja) 2010-08-18
CN100431127C (zh) 2008-11-05
KR20050118539A (ko) 2005-12-19
CN1957454A (zh) 2007-05-02
TWI283301B (en) 2007-07-01
US7804312B2 (en) 2010-09-28
JP2008502912A (ja) 2008-01-31
US20080012588A1 (en) 2008-01-17
KR100557201B1 (ko) 2006-03-10

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