WO2005072071A2 - 信号検出装置 - Google Patents

信号検出装置 Download PDF

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Publication number
WO2005072071A2
WO2005072071A2 PCT/JP2005/000968 JP2005000968W WO2005072071A2 WO 2005072071 A2 WO2005072071 A2 WO 2005072071A2 JP 2005000968 W JP2005000968 W JP 2005000968W WO 2005072071 A2 WO2005072071 A2 WO 2005072071A2
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WIPO (PCT)
Prior art keywords
signal
mode signal
circuit
power supply
common mode
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Ceased
Application number
PCT/JP2005/000968
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English (en)
French (fr)
Japanese (ja)
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WO2005072071A3 (ja
Inventor
Yoshihiro Saitoh
Masaru Wasaki
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Wasaki Hitomi
TDK Corp
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Wasaki Hitomi
TDK Corp
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Priority to US10/586,949 priority Critical patent/US7405574B2/en
Publication of WO2005072071A2 publication Critical patent/WO2005072071A2/ja
Publication of WO2005072071A3 publication Critical patent/WO2005072071A3/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/001Measuring interference from external sources to, or emission from, the device under test, e.g. EMC, EMI, EMP or ESD testing

Definitions

  • the present invention relates to a signal detection device used for measuring a high-frequency signal voltage (noise, noise) induced in a power supply terminal of various electric devices.
  • EMI electromagnetic interference
  • CISPR International Special Committee on Radio Interference
  • US FCC US Federal Communications Commission
  • VCCI Japanese Voluntary Control Council for Interference by Information Technology Equipment
  • CISPR22 specifies strict standards for a wide range of frequencies, 150 KHz and 30 MHz.
  • a measuring device for noise terminal voltage as shown in Fig. 18 has been installed in an anechoic chamber to measure compliance with the standard.
  • Fig. 18 shows a noise terminal voltage measurement system used for measurement of conformity with standards.
  • the power supply voltage from the commercial power supply is simulated by the measurement device 101 via a power supply cable 100C (here, a pair of power supply line and ground line are indicated by a single thick line).
  • the power is supplied to the circuit power supply network 101C, and further to the device under test 102 via the power supply lines 101A and 101B and the ground line 101G.
  • the noise generated by the device under test 102 is measured by the vector analyzer 103.
  • the pseudo-circuit power supply network 101C is inserted between the device under test 102 and the power supply and viewed from the power supply terminal of the device under test 102.
  • the measuring apparatus 101 is provided with a switch 101S. By switching the switch 101S, the power S 101 can selectively measure the noise on the power line 101A or the noise on the power line 101B. it can.
  • FIG. 19 illustrates an example of a specific circuit of the measuring apparatus 101. This circuit is described, for example, in the KNW-242C connection diagram of a pseudo power supply network manufactured by Kyoritsu Electronics Industry Co., Ltd.
  • the measuring apparatus 101 includes a power input terminal J1, a power output terminal J2, and a signal output terminal.
  • a pseudo power supply network 101C is provided on the power supply lines 101A and 101B between the power supply input terminal J1 and the power supply output terminal J2.
  • the pseudo power supply network 101C has series-connected inductance elements LI and L3 inserted into the power supply line 101A, and series-connected inductance elements L2 and L4 inserted into the power supply line 101B.
  • the power supply input terminal J1 side of the inductance element L1 is connected to ground via a resistor R1, and is also connected to ground via a capacitor C1 and a resistor R3 connected in series.
  • the connection point of the inductance elements LI and L3 is connected to the ground via the capacitor C3 and the resistor R5 connected in series, and the power output terminal J2 side of the inductance element L3 is connected to the capacitor C5 and the resistor R7 connected in series. Connected to ground through.
  • the power supply input terminal J1 side of the inductance element L2 is connected to ground via a resistor R2, and is also connected to ground via a capacitor C2 and a resistor R4 connected in series.
  • the connection point of the inductance elements L2 and L4 is connected to the ground via a capacitor C4 and a resistor R6 connected in series, and the power output terminal J2 side of the inductance element L4 is connected to a capacitor C6 and a resistor R8 connected in series. Connected to ground through.
  • a connection point P1 between the capacitor C5 and the resistor R7 and a connection point P2 between the capacitor C6 and the resistor R8 are connected to the switch 101S. By switching the switch 101S, one of the connection points Pl and P2 is connected. A noise signal appears at the signal output terminal J3, and the other is connected to ground.
  • the pseudo power supply network 101C forms an effective LC filter with the inductance elements L1 and L3 and the capacitors CI and C3 when focusing on the power supply line 101A, and the inductance element when focusing on the power supply line 101B.
  • An LC filter consisting of L2, L4 and capacitors C2, C4 is configured.
  • these LC finoletors By configuring these LC finoletors to exhibit high impedance to both the noise signal from the power input terminal J1 and the noise signal from the power output terminal J2, the low frequency AC voltage can be passed while The power input terminal J1 and the power output terminal J2 are isolated (isolated or separated) with respect to a high-frequency noise signal.
  • the inductance elements LI and L3 and the inductance elements L2 and L4 are included in the coil in order to flatten the frequency characteristics to a high frequency range (that is, to enable signal separation regardless of frequency).
  • An air-core coil composed of a core and no core is used. This is because having a core causes the signal separation characteristics to have frequency dependence.
  • Some home appliances such as plasma displays, tend to have higher power.
  • such a noise terminal voltage includes a common mode (noise) signal and a normal mode (noise) signal.
  • a common-mode signal connects two conductive lines (for example, a pair of power lines)
  • a normal mode signal is a signal that propagates in the same phase and is transmitted by two conductive lines to generate a potential difference between the two conductive lines. The magnitude and frequency band of the signal in each of these modes often differ greatly depending on the circuit configuration of the electrical device being measured.
  • the measuring apparatus shown in Fig. 18 is designed to measure the common mode signal and the normal mode signal together (in a mixed form), although the noise terminal voltage is measured. I'm familiar. Therefore, it is not possible to separate and measure the signal for each mode, and the amount of information is not enough to perform detailed and accurate analysis of the cause of noise generation. No. For this reason, abundant experience, a great deal of time and labor are required for noise countermeasures, and the development cost for developing a new electrical product increases.
  • the present invention has been made in view of a powerful problem, and a first object of the present invention is to provide a signal detection device having an excellent measurement function capable of easily and accurately analyzing a cause of noise generation. To provide a location.
  • a second object of the present invention is to provide a small and inexpensive signal detection device that has such excellent measurement functions and can be easily used as a development tool for electrical equipment development engineers. is there.
  • the signal detection device of the present invention includes a power supply input terminal to which a power supply voltage is input from a power supply source, and a power supply connected to the device under test and outputting the power supply voltage input from the power supply input terminal to the device under test
  • the common voltage included in the power supply voltage input from the power supply input terminal The mode signal and the normal mode signal are blocked from passing to the measurement system (signal detection circuit side) by the signal blocking circuit.
  • the common mode signal and normal mode signal generated by the device under test enter the first and second conductive wires from the power supply output terminal, but are blocked from passing to the power supply input terminal by the signal cutoff circuit.
  • the common mode signal is extracted by the common mode signal detection circuit and output from the common mode signal output terminal.
  • the normal mode signal out of the signals input from the power output terminal is extracted by the normal mode signal detection circuit and output from the normal mode signal output terminal. As a result, the common mode signal and the normal mode signal are detected independently.
  • the signal detection device of the present invention may further include a first switch provided at an input terminal of the common mode signal detection circuit, and a second switch provided at an input terminal of the normal mode signal detection circuit.
  • a mixed signal output terminal that outputs a common mode signal and a normal mode signal included in the power supply voltage between the power supply output terminal and the signal cutoff circuit in a mixed state may be further provided.
  • the normal mode signal detection circuit includes a first high-pass filter that cuts off a power supply voltage, and a common mode signal cancellation circuit that removes a common mode signal from a signal that has passed through the high-pass filter. Les, preferably to include.
  • a common mode signal canceling circuit is provided on the first and second conductive lines to generate a mutual inductance between the first and second conductive lines;
  • a detection inversion circuit provided between the second conductive lines for detecting a common mode signal included in the power supply voltage input from the power supply input terminal and inverting the phase thereof, and a phase inversion by the detection inversion circuit;
  • an injection circuit for injecting the inverted signal into the first mutual inductance element.
  • the first mutual inductance element includes a first winding inserted into the first conductive wire and a second winding inserted into the second conductive wire and coupled to the first winding.
  • the injection circuit includes a third winding coupled to the first mutual inductance element such that mutual inductance occurs with the first mutual inductance element
  • the detection inverting circuit includes First and second capacitors connected in series between the second conductive wires are included, and one end of the third winding is connected to the first and second capacitors.
  • the second capacitor can be connected to the interconnection point and the other end can be connected to the ground.
  • the common mode signal canceling circuit includes a second mutual inductance element functioning as an impedance element for the common mode signal on the first and second conductive lines between the detection inversion circuit and the injection circuit. Is preferred.
  • the common mode signal detection circuit includes a second high-pass filter that passes only the signal, and a normal mode signal cancellation circuit that removes a normal mode signal from the signal that has passed through the high-pass filter. Les, preferably to include.
  • a normal mode signal canceling circuit is provided on the first and second conductive lines, and generates a mutual inductance between the first and second conductive lines, and a third mutual inductance element; A normal mode signal connected to the first conductive line and included in the power supply voltage of the first conductive line is detected and its phase is inverted, and the inverted signal is transmitted to the first conductive line via the third mutual inductance element.
  • the peak value of the normal mode signal provided on the first conductive wire is provided between the detection inversion injection circuit for injecting the wire, the connection position of the detection inversion injection circuit to the first conductive line, and the third mutual inductance element. It can be configured to include the impedance element to be reduced.
  • the fourth winding inserted into the first conductive wire and the fifth winding connected to the second conductive wire at one end and mutually coupled with the fourth winding are provided.
  • the detection inversion injection circuit includes a third capacitor connected between the first conductive line and the other end of the fifth winding, wherein the impedance element force S is applied to the first conductive line. It is possible to configure to include the inserted sixth winding.
  • a “signal” becomes noise when it is unnecessary or harmful.
  • a “common mode signal” refers to a signal that propagates through two conductive wires in the same phase, and a “normal mode signal” refers to a signal transmitted between two conductive wires and transmitted between the two conductive wires. A signal that causes a potential difference.
  • the "power supply source” is a power supply for supplying a power supply voltage, which is generally a commercial power supply, but also includes a power supply by private power generation. Note that the power supply voltage may be a power DC voltage which is usually an AC voltage. “Equipment to be measured” is an electrical device to be measured as a signal source. [0026]
  • the “signal cutoff circuit” is a filter that cuts off signal transfer while transmitting power supply voltage.
  • the “common mode signal output terminal”, “normal mode signal output terminal” and “mixed signal output terminal” are terminals connected to a signal measuring device such as a spectrum analyzer.
  • the signal detection device of the present invention signal transmission between the measurement system (signal detection circuit side) and the power supply side is cut off by the signal cutoff circuit, and then the signal generated by the device under test is
  • the common mode signal is taken out by the common mode signal detection circuit and output from the common mode signal output terminal
  • the normal mode signal of the signal is taken out by the normal mode signal detection circuit and output from the normal mode signal output terminal. Therefore, the common mode signal and the normal mode signal can be independently detected. As a result, it is possible to obtain information for performing detailed and accurate analysis of the cause of noise generation, and to provide a development tool for noise terminal voltage testing that is extremely useful for power electronics R & D engineers.
  • an LC resonance circuit is used. Since the circuit can be made smaller and lighter than the conventional one, a portable signal detection device that can be easily used in any place other than an anechoic chamber (development site such as a laboratory) can be used. Obtainable.
  • the common mode signal canceling circuit and the normal mode signal canceling circuit can be further downsized, and a more compact signal detection device can be obtained.
  • FIG. 1 is a block diagram illustrating an entire configuration of a signal detection device according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram showing a configuration of a signal suppression filter in the signal detection device shown in FIG. 1.
  • FIG. 3 is a diagram for explaining main functions of a signal suppression filter shown in FIG. 2.
  • FIG. 4 is a circuit diagram showing a configuration of a signal separation filter in the signal detection device shown in FIG. 1.
  • FIG. 5 is a functional block diagram showing a configuration of a common mode signal detection circuit in the signal detection device shown in FIG. 1.
  • FIG. 6 is a circuit diagram showing a configuration of a common mode signal detection circuit in the signal detection device shown in FIG. 1.
  • FIG. 7 is a circuit diagram showing a configuration of a normal mode signal detection circuit in the signal detection device shown in FIG. 1.
  • FIG. 8 is a circuit diagram showing a modification of the normal mode signal detection circuit.
  • FIG. 9 is a circuit diagram showing a modification of the common mode signal detection circuit.
  • FIG. 10 is a circuit diagram showing another modified example of the normal mode signal detection circuit.
  • FIG. 11 is a circuit diagram showing a configuration of a normal mode signal suppression filter according to a comparative example.
  • FIG. 12 is a circuit diagram showing a configuration of a common mode signal suppression filter according to a comparative example.
  • FIG. 13 is a characteristic diagram illustrating an example of a characteristic of a signal suppression filter used in the signal detection device according to the present embodiment.
  • FIG. 14 is a diagram showing a measurement result of ⁇ noise in the signal detection device of the present embodiment.
  • FIG. 15 is a diagram illustrating a measurement result of a common mode signal appearing at a signal output terminal when both a normal mode signal and a common mode signal are applied to a power output terminal.
  • FIG. 7 is a diagram illustrating a measurement result of a normal mode signal appearing at a signal output terminal when the normal mode signal is output.
  • FIG. 17 is a diagram illustrating a measurement result when a high frequency (common mode signal and normal mode signal) generated by a vacuum cleaner as an example of the device to be measured is measured using the signal detection device of the present embodiment. is there.
  • FIG. 18 is a block diagram showing a configuration of a conventional noise terminal voltage measurement system.
  • FIG. 19 is a block diagram showing a configuration of the measuring device shown in FIG.
  • FIG. 1 shows a signal detection device according to one embodiment of the present invention.
  • the signal detection device 2 is a small and portable device having a function of individually detecting a common mode signal and a normal mode signal that are high frequency signals.
  • the “common mode signal” is a signal that propagates in the same phase on the power lines 21A and 21B described later
  • the “normal mode signal” is a signal transmitted between the power lines 21A and 21B and transmitted between the power lines 21A and 21B. Is a signal that causes an electric potential difference.
  • the signal detection device 2 includes a power cable 1C connected to a commercial power supply, a grounded housing 1A, a power input terminal T1 connected to the power cable 1C, and a power cable It has a power output terminal T2 to which the cable 3A is connected and a signal output terminal T3 T5 to be connected to a signal measuring device such as a spectrum analyzer or the like, not shown.
  • the AC voltage from the power input terminal T1 is guided to the power output terminal T2 by a pair of power lines 21A and 21B, and supplied to the device under test 3.
  • the signal detection device 2 also includes a signal suppression filter 22 provided on the power supply lines 21A and 21B connected to the power supply input terminal T1, and a power supply line 21A between the signal suppression filter 22 and the power supply output terminal T2. , 21B provided with a signal separation filter 23.
  • the “signal suppression filter 22” and the “signal separation filter 23” correspond to a specific example of the signal cutoff circuit in the present invention.
  • the signal detection device 2 further includes a common mode signal detection circuit 25 provided between the power output terminal T2 and the signal output terminal T3, and a common mode signal detection circuit 25 provided between the power output terminal T2 and the signal output terminal T4. And a line conversion circuit 27 provided between the power output terminal T2 and the signal output terminal T5.
  • a switch S1 is provided at the input terminal (the power output terminal T2 side) of the common mode signal detection circuit 25, and a switch S2 is provided at the input terminal (the power output terminal T2 side) of the normal mode signal detection circuit 26.
  • a switch S3 is provided at the input end of the circuit 27 (on the side of the power output terminal T2).
  • the switches SI and S2 force respectively correspond to specific examples of “first switch” and “second switch” in the present invention.
  • the switch S3 is configured by using, for example, a Toruda switch or a rotary switch, and can operate non-interlockedly with respect to each line. Specifically, when measuring the noise of one line, the other line can be left open, and when measuring the noise using the power supply output terminals T3 and # 4, both lines are connected together. It is configured to be able to be in an open state at times.
  • the signal suppression filter 22 is for suppressing a signal included in the power supply voltage input from the power supply input terminal T1, and the signal separation filter 23 includes a power supply output terminal ⁇ 2 and the signal suppression filter 22. The purpose of this is to prevent signal transmission between the two.
  • the common mode signal detection circuit 25 detects the common mode signal from the signal included in the power supply voltage on the power supply lines 21A and 21 # between the power supply output terminal ⁇ 2 and the signal separation filter 23. The signal is extracted and output from signal output terminal # 3.
  • the normal mode signal detection circuit 26 extracts the normal mode signal from the signal included in the power supply voltage on the power supply lines 21A and 21 ⁇ ⁇ between the power supply output terminal ⁇ 2 and the signal separation filter 23. , And output from the signal output terminal # 4.
  • the line conversion circuit 27 When the switch S3 is closed, the line conversion circuit 27 outputs the mixed signal of the common mode signal and the normal mode signal included in the power supply voltage on the power supply lines 21A and 21B between the power supply output terminal ⁇ 2 and the signal separation filter 23.
  • the signal is converted into an unbalanced signal and output from the signal output terminal # 5, and has the same configuration as, for example, a line conversion circuit (a line conversion circuit 257 in FIG. 5 described later) included in the common mode signal detection circuit 25.
  • the signal output terminals # 3 and # 4 respectively correspond to specific examples of the "common mode signal output terminal" and the "normal mode signal output terminal" in the present invention.
  • FIG. 2 shows an example of a circuit configuration of the signal suppression filter 22, and FIG. Of the functions of the common mode signal canceling circuit 221.
  • the signal suppression filter 22 includes a common mode signal canceling circuit 221 provided between terminals X1A and X1B near the power input terminal T1 and terminals X2A and X2B far from the power input terminal T1.
  • a normal mode signal suppression circuit 222 and a common mode signal suppression circuit 223 are provided.
  • the common mode signal canceling circuit 221 includes a detection inversion circuit 224 provided between the power supply lines 21A and 21B and an impedance element provided on the power supply lines 21A and 21B adjacent to the detection inversion circuit 224.
  • the inductance element 225 is configured to generate mutual inductance between the inductance element 226 and the inductance element 226 provided on the power supply lines 21A and 21B opposite to the detection inversion circuit 224 with respect to the inductance element 225. It is configured to include the winding LI 1C.
  • the detection inversion circuit 224 includes capacitors CIO and C11 connected in series between the power supply line 21A and the power supply line 21B, and detects a common mode signal included in the power supply voltage input from the power input terminal T1. Then, the phase is inverted.
  • the capacitors C10 and C11 correspond to a specific example of "first and second capacitors" in the present invention.
  • Inductance element 225 acts as a winding L10A inserted into power supply line 21A, a winding L10B inserted into power supply line 21B, and a core L10C, and generates mutual inductance between power supply lines 21A and 21B. By doing so, it functions as an impedance element for a common mode signal. Due to the presence of the inductance element 225, the common mode signal can be more effectively attenuated, and its phase is delayed so that the phase difference between the detection and inversion circuit 224 and the inverted signal injected into the winding L11C is reduced. It can easily become 180 degrees.
  • the inductance element 226 forms a force with the winding L11A inserted into the power supply line 21A, the winding L11B inserted into the power supply line 21B, and the core L11D, and the mutual inductance between the power supply lines 21A and 21B. Is caused to occur.
  • the inductance element 226 corresponds to a specific example of the “first mutual inductance element” in the present invention
  • the inductance element 225 corresponds to a specific example of the “second mutual inductance element” in the present invention.
  • the windings LllA and L11B correspond to specific examples of “first and second windings” in the present invention.
  • the winding L11C is wound so as to share the core LI ID, and the inverted signal detected by the detection inverting circuit 224 and inverted in phase is injected into the windings L11A and L11B of the inductance element 226. It functions as a circuit.
  • One end of the winding L10C is connected to the interconnection point of the capacitors C10 and C11 in the detection inversion circuit 224, and the other end is connected to ground.
  • the winding L11C force corresponds to a specific example of “third winding” in the present invention.
  • the detection and inversion circuit 224 detects the common mode signal propagating from the terminals X1A and X1B on the power supply lines 21A and 21B, and inverts the signal. By injecting into the windings LI 1A and L11 B of the inductance element 226 via the winding LI 1C and canceling the common mode signal on the power supply lines 21A and 21B, the common mode signal can be removed. I'm familiar.
  • the normal mode signal suppression circuit 222 includes a capacitor C12 provided between the power supply lines 21A and 21B between the detection inversion circuit 224 and the terminals X1A and X1B, and a capacitor C12 provided between the inductance element 226 and the terminals X1A and X1B. And a capacitor C13 provided between the power supply lines 21A and 21B. These capacitors C12 and C13 work together with the leakage inductance of the windings L10A, L10B, L11A and L11B of the inductance elements 225 and 226 to act as a ⁇ -type normal mode filter for suppressing the normal mode signal. .
  • the capacitors C12 and C13 are generally called X capacitors, and correspond to a specific example of “third and fourth capacitors” in the present invention.
  • the common mode signal suppression circuit 223 includes capacitors C14 and C15 connected in series between the power supply lines 21A and 21B between the inductance element 226 and the terminals ⁇ 2 ⁇ and ⁇ 2 ⁇ .
  • the interconnection point of capacitors C14 and C15 is connected to ground.
  • These capacitors C14 and C15 work together to suppress common mode signals, especially in the high frequency range.
  • the capacitors C14 and C15 are usually called Y capacitors, and correspond to a specific example of “fifth and sixth capacitors” in the present invention.
  • FIG. 4 illustrates an example of a circuit configuration of the signal separation filter 23.
  • the signal separation filter 23 is connected to the power supply lines 21A and 21B between the signal suppression filter 22 and the power supply output terminal T2.
  • an impedance circuit 231 provided adjacent to the signal suppression filter 22, and an impedance circuit 232 provided on power supply lines 21A and 21B between the impedance circuit 231 and the terminals X3A and X3B.
  • the terminals X3A and X3B are terminals closer to the power output terminal T2.
  • the impedance circuit 231 includes a winding L15 inserted into the power supply line 21A and a winding L16 inserted into the power supply line 21B, and exhibits a high level and impedance to a normal mode signal. It has become.
  • the impedance circuit 232 includes an inductance element L14 including a winding L14A inserted into the power supply line 21A, a winding L14B inserted into the power supply line 21B, and a core L14C.
  • the winding L14A and the winding L14B are mutually coupled to generate mutual inductance between the power supply lines 21A and 21B, so that the windings L14A and L14B exhibit high impedance and high impedance with respect to a common mode signal.
  • the impedance circuits 231 and 232 correspond to a specific example of “first and second impedance elements” in the present invention
  • the windings L15 and L16 correspond to the “fourth and fourth impedance elements” in the present invention
  • Inductance element L14 corresponds to a specific example of “the fifth winding”, and corresponds to a specific example of “third mutual inductance element” in the present invention.
  • the signal suppression filter 22 includes the capacitor C13 and the capacitors C14 and C15.
  • the signal (noise) generated by the device 3 is affected by these capacitors C13, C14, and C15 (that is, the noise to be detected is absorbed). Therefore, it is necessary to install the signal separation filter 23.
  • Equation (1) is a condition necessary for normal mode signal separation
  • equation (2) is a condition necessary for common mode signal separation.
  • FIG. 5 shows a circuit configuration of the common mode signal detection circuit 25
  • FIG. 6 shows a specific example of a main part thereof (normal mode signal cancellation circuit).
  • the common mode signal detection circuit 25 includes a high-pass filter 250 and a normal mode signal canceling circuit 251 provided sequentially on the power supply lines 21A and 21B between the terminals X4A and X4B on the power supply output terminal T2 side and the signal output terminal T3. And a line conversion circuit 257.
  • the high-pass filter 250 corresponds to a specific example of the “second high-pass filter” of the present invention
  • the normal mode signal canceling circuit 251 corresponds to a specific example of the “normal mode signal canceling circuit” of the present invention. I do.
  • the high-pass filter 250 is used to pass the high-frequency component signal transmitted through the power lines 21A and 21B and to cut off the low-frequency component power supply voltage, as shown in FIG. And capacitors C31 and C32 inserted in the power supply lines 21A and 21B, respectively.
  • the line conversion circuit 257 is for converting a balanced line composed of the power supply lines 21A and 21B into an unbalanced line, and has a winding L14A having both ends connected to the power supply lines 21A and 21B and having an intermediate point grounded, and one end. And a core 14C, the winding L14B of which is grounded and the other end is connected to the signal output terminal T3.
  • the normal mode signal canceling circuit 251 removes a normal mode signal from the signal that has passed through the high-pass filter 250 and passes only the common mode signal.
  • the inductance element 252 and the detection inversion injection circuit 253 And an impedance element 254.
  • the inductance element 252 corresponds to a specific example of the “third mutual inductance element” of the present invention
  • the impedance element 254 corresponds to a specific example of the “impedance element” of the present invention
  • the circuit 253 corresponds to a specific example of the “detection inversion injection circuit” of the present invention.
  • the inductance element 252 includes a winding L12A having one end connected to the terminal X5A and being inserted into the power supply line 21A, and a winding L having one end connected to the terminal X5B via the power supply line 21B. It includes a core 12C and a core 12C, and functions as a mutual inductance element that generates mutual inductance between the power supply lines 21A and 21B. As shown in FIG. 6, the detection inversion injection circuit 253 includes a capacitor C22 connected between one end B of the capacitor C31 of the high-pass filter 250 and the other end of the winding L12B.
  • the impedance element 254 is a capacitor A winding L13A inserted into the power supply line 21A between one end B of the coil C31 and the other end of the winding L12A, and a core L13C and an inductance element L13 serving as a force are included.
  • the windings L12A, L12B, and L13A correspond to a specific example of the “fourth to sixth winding” in the present invention.
  • the capacitor C22 corresponds to a specific example of “third capacitor” in the present invention.
  • the normal mode signal canceling circuit 251 having such a configuration detects the normal mode signal from the power supply line 21A on the output side of the high-pass filter 250, inverts the normal mode signal, and applies the inverted signal to the winding L12B of the inductance element 252. By injecting and canceling the normal mode signal on the winding L12A side (power supply line 21A side), the normal mode signal can be removed.
  • the impedance element 254 attenuates the normal mode signal transmitted from the power supply line 21A to the winding L12A, delays the phase of the signal, and places the signal in the position opposite to the inverted signal injected from the detection inversion injection circuit 253 into the winding L12B. It is provided to make the phase difference easily 180 degrees.
  • FIG. 7 shows a circuit configuration of the normal mode signal detection circuit 26.
  • the normal mode signal detection circuit 26 is composed of a high-pass filter 260 provided sequentially on the power supply lines 21A and 21B between the power output terminal T2 side terminals X6A and X6B and the signal output terminal T4 side terminals X7A and X7B, and a common mode A signal cancellation circuit 261 and a line conversion circuit 267 are provided.
  • the high-pass filter 260 is for passing the high-frequency component signal transmitted through the power lines 21A and 21B and cutting off the low-frequency component power supply voltage. Includes inserted capacitors C41 and C42.
  • the line conversion circuit 267 has a function similar to that of the line conversion circuit 257 (FIG. 5) included in the common mode signal detection circuit 25, and has two ends connected to the power supply lines 21A and 21B, respectively, and an intermediate point grounded. It is configured to include a line L22A, a winding L22B having one end grounded and the other end connected to the signal output terminal T4, and a core 22C.
  • the high-pass filter 260 corresponds to a specific example of the “first high-pass filter” in the present invention
  • the common mode signal canceling circuit 261 is a specific example of the “common mode signal canceling circuit” in the present invention. Corresponding.
  • the common mode signal canceling circuit 261 removes the common mode signal from the signal that has passed through the high-pass filter 260 and passes only the normal mode signal.
  • the inductance element 262 corresponds to a specific example of “first mutual inductance” in the present invention
  • the detection inversion circuit 263 corresponds to a specific example of “detection inversion circuit” in the present invention.
  • Inductance element 262 includes windings L21A and L21B inserted into power supply lines 21A and 21B, respectively, and core L21D. One ends of the windings L21A and L21B are connected to terminals X7A and X7B, respectively.
  • Detection inversion circuit 263 includes capacitors C20 and C21 connected in series between power supply lines 21A and 21B.
  • the winding L21C is wound around the core L21D of the inductance element 262 as a concentric core, one end of which is connected to the interconnection point of the capacitors C20 and C21, and the other end of which is grounded.
  • the winding L21C generates mutual inductance between the windings L21A and L21B.
  • windings L21A, L21B, and L21C respectively correspond to a specific example of “first, second, and third windings” in the present invention, and the winding L21C force “injection” in the present invention.
  • the capacitors C20 and C21 correspond to specific examples of “first and second capacitors” in the present invention.
  • the detection and inversion circuit 263 detects the common mode signal propagating through the power lines 21A and 21B on the output side of the high-pass filter 260, and inverts the common mode signal. Then, the common mode signal can be removed by injecting into the windings L21A and L21B of the inductance element 262 via the winding L21C and canceling the common mode signal on the power supply lines 21A and 21B. It is like that.
  • An AC voltage from a power source (not shown) is input from the power input terminal T1 to the signal detection device 2, guided to the power output terminal T2 by a pair of power lines 21A and 21B, and supplied to the device under test 3.
  • the signal suppression filter 22 suppresses a high-frequency signal (so-called noise including both a common mode signal and a normal mode signal) included in the power supply voltage input from the power supply input terminal T1, and generates an AC voltage component of the power supply frequency. Only let through. Therefore, a clean AC voltage that does not include a high-frequency signal is supplied to the device under test 3, and the device under test 3 operates based on this AC voltage.
  • the device under test 3 generates high-frequency signals of various frequencies (so-called noise including both a common mode signal and a normal mode signal) in the operation process.
  • This high-frequency signal enters the signal detection device 2 from the power output terminal T2 and propagates through the power lines 21A and 21B.
  • the signal separation filter 23 prevents a high-frequency signal from the power output terminal T2 from being transmitted to the signal suppression filter 22. Therefore, the level of the high-frequency signal to be detected is absorbed by the signal suppression filter 22 and is prevented from lowering.
  • the common mode signal detection circuit 25 suppresses the normal mode signal among the high frequency signals on the power supply lines 21A and 21B entering from the power supply output terminal T2, and controls only the common mode signal. And output from the signal output terminal T3.
  • the normal mode signal detection circuit 26 suppresses the common mode signal of the high-frequency signals on the power lines 21A and 21B entering from the power output terminal T2, and extracts only the normal mode signal. Output from signal output terminal T4.
  • the signal output terminal T5 outputs a mixed signal of the common mode signal and the normal mode signal on the power supply lines 21A and 21B entered from the power supply output terminal T2 when the switches SI and S2 are both open. I do.
  • the switch S2 When detecting a common mode signal, it is preferable to turn off (open) the switch S2.
  • the switch S2 When the switch S2 is turned on (connected), the common mode signal to be detected is also input to the normal mode signal detection circuit 26, where it is removed, and as a result, the common mode signal in the common mode signal detection circuit 25 is removed. This is because the signal detection level decreases.
  • the normal mode signal it is preferable to turn off the switch S1.
  • the switch S1 When the switch S1 is turned on, the normal mode signal to be detected is also input to the S common mode signal detection circuit 25, and is removed there.As a result, the normal mode signal detection circuit 26 detects the normal mode signal. This is because the level drops.
  • the switches SI and S2 are both turned off as described above for the same reason.
  • the switch S2 is turned on when detecting the common mode signal
  • the common mode signal cannot be detected by the common mode signal detection circuit 25.
  • the switch S1 is turned on when detecting a normal mode signal
  • the normal mode signal cannot be detected by the normal mode signal detection circuit 26.
  • the detection level is low, it is possible to know the frequency distribution of the signal in which frequency band and the relative level of the signal for each frequency.
  • the signal suppression filter 22 shown in FIG. 2 operates as follows.
  • the common mode signal propagating from the terminals X1A, X1B on the power lines 21A, 21B is detected by the detection inverting circuit 224, and after being inverted, By injecting into the windings L11A and L11B of the inductance element 226 via the winding L11C, the common mode signals on the power supply lines 21A and 21B are canceled and the common mode signals are removed.
  • the inductance element 225 as an impedance element for the common mode signal is arranged between the detection inversion circuit 224 and the inductance element 226, the common mode signal can be more effectively attenuated, and The phase can be delayed so that the phase difference from the inverted signal injected from the detection inversion circuit 224 to the winding L11C is 180 degrees.
  • the normal mode signal suppression circuit 222 functions as a ⁇ -type normal mode filter in cooperation with the leakage inductance of the capacitors C12 and C13 and the inductance elements 225 and 226, and suppresses the normal mode signal.
  • the capacitors C14 and C15 cooperate to suppress the common mode signal particularly in a high frequency band. Therefore, even if the common mode signal canceling circuit 221 cannot completely suppress the high-frequency common mode signal, the common-mode signal suppressing circuit 223 at the subsequent stage suppresses the common-mode signal, so that the common-mode signal can be suppressed in a wide band. It becomes possible.
  • the signal suppression filter 22 of the present embodiment for example, the general normal mode signal suppression filter 122A shown in FIG. Signal suppression over a wider band is possible as compared with the case where the signal suppression filter 122B is used.
  • the filters shown in FIG. 11 and FIG. 12 use LC resonance for the difference and the deviation, and therefore have a strong frequency dependence.
  • the signal suppression filter 22 of the present embodiment has a principle that regardless of the frequency, This is because the common mode signal canceling circuit 221 that suppresses the signal by canceling the common mode signal and its inverted signal is used.
  • the common mode signal canceling circuit 221 is not an LC resonance circuit, so that the cores of the inductance elements 225 and 226 can be used as the cores L10C and L11D. In addition, it is possible to reduce the size of the device while ensuring wideband signal suppression characteristics.
  • the normal mode signal suppression filter 122A shown in FIG. 11 includes the inductance elements L61 and L62 inserted into the power lines 21A and 21B, and the power lines 21A and 21B at both sides of the inductance elements L61 and L62. It works together with the capacitors C61 and C62 provided between them.
  • the common mode signal suppression filter 122B shown in FIG. 12 includes a mutual inductance element L71 composed of windings L71A and L71B and a core L71C inserted into the power supply lines 21A and 21B, respectively, and a series connection between the power supply lines 21A and 21B. It consists of connected capacitors C71 and C72.
  • the signal separation filter 23 shown in Fig. 4 operates as follows.
  • the impedance circuit 231 exhibits a high impedance with respect to the normal mode signal by satisfying the above equation (1), and the impedance circuit 232 satisfies the equation (2) High impedance and high impedance for common mode signals.
  • the impedance circuit 232 satisfies the equation (2) High impedance and high impedance for common mode signals.
  • the common mode signal detection circuit 25 shown in FIGS. 5 and 6 operates as follows.
  • the high-pass filter 250 power S and the power lines 21A and 21B are connected. It transmits the transmitted high-frequency signal and cuts off the low-frequency power supply voltage.
  • the normal mode signal canceling circuit 251 removes the normal mode signal from the signal passed through the high-pass filter 250 and passes only the common mode signal. More specifically, a normal mode signal is detected from the power supply line 21A on the output side of the no-pass filter 250 by the detection inversion injection circuit 253 (capacitor C22). The normal mode signal on the winding L12A side (power supply line 21A side) is injected into the winding L12B to cancel the normal mode signal.
  • the impedance element 254 (inductance element L13) attenuates the normal mode signal wound from the power supply line 218 and transmitted to the power line 218, delays the phase thereof, and turns the winding from the detection inversion injection circuit 253. Since the phase difference between the inverted signal injected into L12B and the inverted signal becomes 180 degrees, the signals are sufficiently canceled.
  • the power supply frequency component is decoupled (removed) by the high-pass filter 250 in the preceding stage, so that the circuit in the subsequent stage only removes the high-frequency signal (normal mode signal).
  • the design should be taken into consideration. For this reason, a ferrite core can be used as the core L12C of the inductance element 252, and the size can be reduced as compared with the normal mode signal suppression filter 122A shown in FIG.
  • the normal mode signal detection circuit 26 shown in FIG. 7 operates as follows.
  • the high-pass filter 260 allows the power supply lines 21A and 21B to pass the high-frequency component signal transmitted thereto and cuts off the low-frequency component power supply voltage.
  • the common mode signal canceling circuit 261 removes the common mode signal from the signal that has passed through the no-pass filter 260, and passes only the normal mode signal. More specifically, the detection and inversion circuit 263 detects the common mode signal propagating through the power supply lines 21A and 21B on the output side of the high-pass filter 260, inverts the common mode signal, and inverts the common mode signal through the winding L21C. The common mode signal is removed by injecting into the windings L21A and L21B of the element 262 to cancel the common mode signal on the power supply lines 21A and 21B.
  • the power supply frequency component is decoupled by the high-pass filter 260 in the preceding stage, so that the circuit in the subsequent stage considers only the removal of the high-frequency signal (common mode signal). You can design it. Because of this, the inductance A ferrite core can be used as the core L21D of the element 262, and the size can be reduced as compared with the common mode signal suppression filter 122B shown in FIG.
  • FIG. 13 illustrates an example of the characteristics of the signal suppression filter 22.
  • the horizontal axis indicates frequency [unit: MHz], and the vertical axis indicates attenuation [unit: dB].
  • code CM common mode signal
  • code NM normal mode signal
  • FIG. 14 shows the noise when the signal detection device 2 of the present embodiment is grounded not in an anechoic chamber but in a general measurement environment (ie, noise when the device under test 3 is not connected).
  • the horizontal axis shows the frequency [unit: MHz], and the vertical axis shows the noise level [unit ( ⁇ ⁇ V)]
  • Fig. 15 shows the common mode appearing at the signal output terminal T3 when both the normal mode signal and the common mode signal are applied to the power supply output terminal T2 from the noise source, assuming the noise generated by the device under test 3. It represents the measurement result when measuring the signal level (attenuation).
  • the horizontal axis shows the frequency [unit: MHz], and the vertical axis shows the attenuation [unit: dB].
  • the common mode signal code CM
  • code NM has 60dB attenuation. This shows that practically sufficient mode separation has been achieved.
  • FIG. 16 shows a signal level appearing at signal output terminal T4 when both a normal mode signal and a common mode signal are applied to power supply output terminal T2 from a noise source, assuming noise generated by device under test 3.
  • (Attenuation) is the result of measurement.
  • the horizontal axis shows frequency [unit MHz], and the vertical axis shows attenuation [unit dB].
  • the normal mode signal code NM
  • the common mode signal symbol CM
  • FIG. 17 shows a measurement result when a common vacuum signal and a normal mode signal are measured using the signal detection device of the present embodiment by taking a certain vacuum cleaner as an example of the device 3 to be measured. is there.
  • the horizontal axis shows frequency [unit Hz], and the vertical axis shows signal level [unit dB].
  • This figure shows that the amount of noise generated differs depending on the frequency band, and it is clear that R & D engineers should take measures. That is, the signal detection device of the present embodiment can sufficiently exhibit functions as a compact, mopilable and useful development tool.
  • the power supply lines 21A and 21B connected to the power supply input terminal T1 include the signal suppression filter 22 for suppressing the high frequency signal included in the power supply voltage, and the high frequency signal And a signal separation filter 23 that blocks transmission of the signal is provided in series, and a high-frequency signal included in the power supply voltage between the power output terminal T2 and the signal separation filter 23 is output from the signal output terminals T3 to T5.
  • the high-frequency signal from the power supply can be reliably blocked by the two-stage signal cutoff circuit of the signal suppression filter 22 and the signal separation filter 23. That is, the signal blocking performance is higher than when only one of the signal suppression filter 22 and the signal separation filter 23 is used. For this reason, the influence of the power supply noise on the measurement system can be eliminated.
  • the signal separation filter 23 for preventing the transmission of the high-frequency signal is provided between the signal suppression filter 22 and the power supply output terminal T2, the high-frequency signal generated by the device under test 3 is used as the signal suppression filter. 22 can be prevented from being absorbed, and a decrease in the signal detection level at the signal output terminals T3 to T5 can be prevented.
  • the signal suppression filter 22 is configured to include the common mode signal canceling circuit 221 as a main part of the common mode signal suppression means, compared with the case where the common mode signal suppression means is configured using LC resonance. Thus, the size of the circuit and, consequently, the signal detection device can be reduced.
  • a common mode signal suppression circuit 223 capable of effectively suppressing a common mode signal particularly in a high frequency range is provided at a stage subsequent to the common mode signal cancellation circuit 221. Therefore, it is possible to suppress the common mode signal in a wider band.
  • the common mode signal detection circuit 25 and the normal mode signal detection circuit 26 are provided independently of each other, it is possible to detect the common mode signal and the normal mode signal individually. Further, since the switches SI and S2 are provided at the input terminals of the common mode signal detection circuit 25 and the normal mode signal detection circuit 26, one of the common mode signal and the normal mode signal is measured. When the measurement is performed, the measurement value can be obtained so that the measurement value is not affected by the detection circuit for measuring the other signal.
  • the normal mode signal detection circuit 26A is configured by adding an inductance element 264 to the subsequent stage (terminals X7A and X7B) of the detection inversion circuit 263 in the common mode signal cancellation circuit 261 in FIG.
  • the configuration is the same as that of the cancellation circuit 221.
  • the inductance element 264 is the same as the inductance element 225 in FIG. 2, and includes a winding L10A inserted into the power supply line 21A, a winding L10B inserted into the power supply line 21B, and a core L10C.
  • Other configurations are the same as in FIG.
  • the common mode signal canceling circuit 261A corresponds to another specific example of the “common mode signal canceling circuit” of the present invention
  • the inductance element 264 corresponds to the “second mutual inductance element” of the present invention. This corresponds to one specific example.
  • a modification in which a common mode signal detection circuit 25B as shown in FIG. 9 is used instead of the common mode signal detection circuit 25 shown in FIG. 5 is also possible.
  • This common mode signal detection circuit 25B is a signal output from the common mode signal detection circuit 25 shown in FIG.
  • a normal mode signal suppression circuit 255 is provided in place of the cancellation circuit 251, and a line conversion circuit 258 is provided in place of the line conversion circuit 257.
  • the normal mode signal suppression circuit 255 includes a capacitor C33, an inductance element L31, and a capacitor C34 on the power supply lines 21A and 21B on the output side of the high-pass filter 250 in order from the one near the high-pass filter 250. ing.
  • the capacitor C33 is connected between the power supply lines 21A and 21B.
  • the inductance element L31 includes windings L31A and L31B and a core L31C inserted into the power supply lines 21A and 21B, respectively.
  • Capacitor C33 and inductance element L31 cooperate to form the first stage LC filter.
  • Capacitor C34 is connected between power supply lines 21A and 21B.
  • the capacitor C34 and the inductance element L32 cooperate to constitute the next stage LC filter.
  • the common mode signal detection circuit 25B functions as a two-stage LC filter.
  • the line conversion circuit 258 includes a winding L32A having both ends connected to power supply lines 21A and 21B, respectively, and a core L32C. The intermediate position of the winding L32A is connected to the signal output terminal T3.
  • the high-pass filter 250 cuts the power supply frequency and passes a mixed signal of the common mode signal and the normal mode signal.
  • the common mode signal detection circuit 25B suppresses only the normal mode signal of the mixed signal, and the line conversion circuit 258 converts a balanced line into an unbalanced line. As a result, only the common mode signal appears at the signal output terminal T3.
  • the normal mode signal detection circuit 26B includes a common mode signal suppression circuit 265 instead of the common mode signal cancellation circuit 261 of the normal mode signal detection circuit 26 in FIG.
  • Other configurations are the same as those of the normal mode signal detection circuit 26 in FIG.
  • the common mode signal suppression circuit 265 includes an inductance element L41 in the power supply lines 21A and 21B on the output side of the high-pass filter 260.
  • the inductance element L41 includes windings L41A and L41B inserted into the power supply lines 21A and 21B, respectively, and a core L41C. Yes.
  • the high-pass filter 260 cuts the power supply frequency and passes a mixed signal of the common mode signal and the normal mode signal.
  • the common mode signal suppression circuit 265 selectively removes only the common mode signal from the mixed signal. As a result, only the normal mode signal appears at the signal output terminal T4.
  • a signal output terminal T5 for outputting a mixed signal is provided in addition to the signal output terminals T3 and T4, but this may be omitted if necessary.

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  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Filters And Equalizers (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
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