Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
  • H01L21/28008—Making conductor-insulator-semiconductor electrodes
  • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
  • H01L21/28158—Making the insulator
  • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
  • H01L21/28202—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
  • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
  • H01L29/51—Insulating materials associated therewith
  • H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Definitions

• the present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device having a gate insulating film containing nitrogen.
• It is a component for improving the degree of integration and operating speed of semiconductor integrated circuit devices.
• the size of the MOS FET is reduced, and the thickness of the gate insulating film is reduced.
• the gate electrode formed on the gate insulating film is usually formed by a polysilicon layer or a stack of a polysilicon layer and a silicide layer.
• the polysilicon layer is usually implanted with impurities simultaneously with the source / drain regions.
• An n-type impurity is ion-implanted into the gate electrode, source and drain regions of the surface channel type n-channel MOSFET.
• P-type impurities are ion-implanted into the gate electrode and the source / drain region of the surface channel type p-channel MOS FET.
• introducing nitrogen into the gate insulating film is effective for suppressing boron penetration.
• a method of heating a silicon substrate by resistance heating or lamp heating in a nitriding gas atmosphere such as NH 3 gas, NO gas, and N 20 gas is known. It is also known to use nitrogen plasma to introduce a higher concentration of nitrogen into the silicon oxide film surface.
• Japanese Patent Application Laid-Open No. 2002-198531 discloses that nitrogen is introduced into a silicon oxide gate insulating film formed on a silicon substrate by a remote plasma nitridation process, and then 800 ° C. to 110 ° C. in an N 2 O atmosphere. It has been proposed to redistribute nitrogen by annealing the gate insulating film to form a gate insulating film having a uniform nitrogen concentration. It is stated that by forming a gate insulating film having a uniform nitrogen concentration of 6 at% or more, for example, 8 at% or 10 at%, a transistor having a long life and a high reliability can be obtained.
• Another object of the present invention is to provide a method of manufacturing a semiconductor device capable of suppressing penetration of boron ion-implanted into a gate electrode into a gate insulating film and suppressing a decrease in mobility of a channel region. It is to be.
• a step of forming a gut insulating layer on an active region of a semiconductor substrate a step of introducing nitrogen from the surface side of the gate insulating layer with active nitrogen, and a step of forming a gate insulating layer into which nitrogen is introduced Performing an annealing process so as to maintain a nitrogen concentration distribution that is high on the front surface side and low at the interface with the semiconductor substrate.
• FIGS. 1A to 1F are a cross-sectional view and a graph for explaining an experiment conducted by the inventor and a result thereof.
• FIGS. 2A to 2D are cross-sectional views and graphs for explaining an experiment performed by the inventor and results thereof.
• 3A and 3B are tables and graphs showing the conditions and results of still other experiments performed by the present inventors.
• FIGS. 4A and 4B are tables and graphs showing the conditions and results of still other experiments performed by the present inventors.
• 5A to 5D are cross-sectional views of a semiconductor substrate for describing a method of manufacturing a semiconductor device according to an embodiment of the present invention.
• Introducing nitrogen into the silicon oxide film is effective in preventing boron from penetrating through the gate insulating film during boron ion implantation into the gate electrode.
• the thickness of the gate insulating film becomes thinner, it becomes more difficult to prevent the penetration of boron, and boron reaches the interface between the gate insulating film and the silicon substrate. Mobility is reduced when boron reaches the channel region.
• the boron concentration at the interface tends to be non-uniform.
• a nitrogen concentration distribution having a peak on the surface of the insulating film or in the film can be obtained.
• more nitrogen can be introduced.
• a high nitrogen concentration is effective in suppressing boron penetration.
• the dielectric constant of the insulating film can be increased.
• Increasing the physical film thickness while keeping the inversion capacitance equivalent film thickness (T eff) small is effective in suppressing gate leakage current.
• NB TI negative bias temperature instability
• the technology of generating nitrogen plasma at a location away from the substrate and introducing active nitrogen into the substrate is said to be a damage-free process that does not damage the substrate.
• the present inventor has considered that even if active nitrogen generated by plasma is introduced into the insulating film of a silicon substrate arranged apart from the plasma, there is a possibility that the substrate may be damaged in some way. In order to recover this damage, annealing at a higher temperature than the nitrogen introduction process will be effective. Therefore, the effect of annealing treatment was examined.
• FIGS. 1A to 1I are cross-sectional views showing steps of preparing a sample of an experiment performed by the present inventors.
• a mask is formed on the surface of the silicon substrate 1 so as to cover the active region 4, and the silicon substrate 1 is anisotropically etched to form element isolation trenches 2.
• An insulating layer such as silicon oxide is deposited so as to fill the trench 2 for element isolation, and an unnecessary insulating layer on the surface of the silicon substrate 1 is removed by chemical mechanical polishing (CMP) to form an insulating film in the trench.
• An element isolation region 3 was formed by buried shallow trench isolation (STI).
• a gate oxide film 5 having a thickness of 1.0 nm was formed on the surface of the active region 4 of the silicon substrate 1 in an oxygen atmosphere at 965 ° C.
• nitrogen was introduced into the gate insulating film 5 in a 450 ° C. atmosphere by active nitrogen derived from nitrogen plasma excited by a 1.5 kW microwave. Nitrogen is introduced into the surface of the silicon oxide film to form a silicon nitride oxide film 5X.
• the active nitrogen was introduced using a remote plasma nitridation device available from Applied Materials, Inc. of Santa Clara, California, USA.
• annealing was performed in a nitrogen atmosphere at 1050 ° C. to recover damage to the substrate caused by the introduction of active nitrogen.
• the silicon oxynitride film 5X becomes a silicon oxynitride film 5y by annealing.
• a 100-nm-thick polycrystalline silicon A gate layer is deposited by CVD and patterned using a resist pattern to obtain a gate length of 0.5 11!
• a gate electrode 6 of about 1.0 ⁇ m was formed.
• the gate insulating film 5y was also patterned and became a gate insulating film 5z.
• the characteristic s1 of sample S1 which was annealed at 1 050 ° C in a nitrogen atmosphere after the introduction of active nitrogen was almost the same as the characteristic s2 of sample S2 which was not annealed in a nitrogen atmosphere. Indicates higher conversion conductance. It is clear that the annealing process has improved the characteristics of the MOS FET. It is considered that the carrier mobility was improved and the saturation current was improved.
• the fifth sample S5 was subjected to an annealing treatment at 100 ° C. in an oxygen (o 2 ) atmosphere after introducing nitrogen.
• This annealing treatment is an annealing treatment accompanied by oxidation. Thereafter, annealing treatment was performed at 1050 ° C in a nitrogen atmosphere.
• an annealing process of 0 2 was added to the fifth sample.
• FIG. 2D is a graph showing the characteristics of the created third, fourth and fifth samples.
• the horizontal and vertical axes are the same as in FI G. 1 F.
• the characteristic s5 of the sample S5 which was subjected to (oxidation) annealing at 1 000 ° C in an oxygen atmosphere after the introduction of active nitrogen was an intermediate characteristic between the two.
• annealing in an oxidizing or nitridizing atmosphere causes oxidation or nitridation of the substrate, and the gate insulating film becomes thicker.
• anneal treatment in a NO atmosphere with a small increase in film thickness may be more preferable.
• the increase in the insulating film thickness due to the annealing treatment in the NO gas atmosphere is preferably set to 0.2 nm or less.
• the initial oxide film thickness is preferably 1.5 nm or less.
• a remote plasma nitriding apparatus and a decoupled RF nitrogen plasma apparatus available from Applied Materials, Inc. of Santa Clara, Ref., USA are known.
• nitrogen plasma is generated by RF excitation in the reaction chamber containing the sample, but the nitrogen plasma is generated only in the area along the upper wall of the dome-shaped reaction chamber and away from the sample.
• This device is abbreviated as DPN below.
• FIG.3A shows conditions for preparing two types of samples S6 and S7 and a sample S8 for comparison.
• an oxygen atmosphere at 900 ° C was performed by the same processes as those shown in FI G. 1A and 1B.
• a 0.85 nm-thick silicon oxide film was formed by a lamp annealing apparatus in an atmosphere. After that, nitrogen plasma was excited with RF power of 700 W in the DPN device, and active nitrogen was introduced into the silicon oxide film of the substrate placed below in a room temperature atmosphere.
• the sixth sample S6 was subjected to an annealing treatment (RTO) in a reduced-pressure oxygen atmosphere at 1,000 ° C and then an annealing treatment (RTA) in a nitrogen atmosphere at 1050 ° C. .
• RTO annealing treatment
• RTA annealing treatment
• RTNO oxynitride treatment
• RTA annealing treatment
• FIG. 3B shows the measurement results of these samples.
• the abscissa indicates the inversion capacitance-converted film thickness T eff in nm, and the ordinate indicates the gate leak current Ig in units (A / cm 2 ).
• the characteristic s8 of the sample in which the gate insulating film was formed only of the silicon oxide film is the two points indicated by the X marks, and becomes a straight line when extrapolated.
• the characteristic s6 of the sixth sample S6 is lower than the characteristic s8 of the comparative sample S8, indicating that the gate leak current can be reduced.
• the measurement point s7 of the seventh sample S7 is a nitriding oxide treatment in NO, the oxidation is suppressed, and the measurement point s7 is thinner than the measurement point s6. It also exists below the characteristic s8, indicating that the gate leakage current can be reduced as in the case of the sample S6.
• the degree of reduction of the gate leakage current is almost the same in the two samples S6 and S7.
• sample S8 the effective gate insulating film thickness was reduced to 0.013 nm. For this reason, the transconductance Gm is also excellent.
• the saturation current was improved by 3.6% in a MOS transistor with a gate length of 40 nm.
• a 0.8-nm-thick silicon oxide film was formed in a 900 ° C oxygen atmosphere by a lamp annealing apparatus, and activated in a gate oxide film at room temperature by 700 W decoupled RF nitrogen plasma. Nitrogen was introduced (DPN). Thereafter, an annealing treatment RTO was performed in a reduced-pressure oxygen atmosphere at 1,000 ° C., followed by an annealing treatment (RTA) in a nitrogen atmosphere at 150 ° C.
• RTO annealing treatment
• the 10th sample S10 like the ninth sample S9, formed a 0.8-nm-thick silicon oxide film, introduced active nitrogen with a DPN device, and then introduced a NO gas atmosphere at 950 ° C.
• the anneal treatment (RTNO) was performed, followed by the anneal treatment (RTA) in a nitrogen atmosphere at 1050 ° C.
• FIG. 4B is a graph showing the measurement results of these two types of samples.
• the horizontal axis shows the depth from the surface in units of nm, and the vertical axis shows the measured nitrogen concentration in units (atoms / cc).
• Characteristic s9 of the sample annealed in an oxygen atmosphere has a higher peak value near the surface, and the nitrogen concentration gradually decreases with depth. Although the change in nitrogen concentration by one digit or more is shown within the measurement range, the interface between the gate insulating film and the silicon substrate exists in the middle.
• the thickness of the nitrided oxide film was 1.324 nm, the peak of the nitrogen concentration was 8.6 at%, and the nitrogen concentration at the interface with the substrate was 3.6 at%. The nitrogen concentration at the interface is less than 1/2 of the peak nitrogen concentration.
• the peak on the surface side spreads somewhat flat. Thereafter, it shows a tendency to decrease with depth while showing a nitrogen concentration slightly higher than that of characteristic s9, and the distribution is almost the same as that of characteristic s9 from a certain depth.
• the thickness of the nitrided oxide film was 1.174 nm, the peak of the nitrogen concentration was 7.6 at%, and the nitrogen concentration at the interface with the substrate was 4.9 at%. Increasing the thickness of the nitrided oxide film would make it possible to reduce the nitrogen concentration at the substrate interface to less than 1 to 2 times the peak nitrogen concentration.

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• 2003
  • 2003-04-30 WO PCT/JP2003/005561 patent/WO2004097922A1/ja not_active Application Discontinuation
• 2004
  • 2004-04-28 KR KR1020057005974A patent/KR100627219B1/ko active IP Right Grant
  • 2004-04-28 WO PCT/JP2004/006213 patent/WO2004097925A1/ja active Application Filing
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