WO2004062220A1 - 受信器 - Google Patents
受信器 Download PDFInfo
- Publication number
- WO2004062220A1 WO2004062220A1 PCT/JP2002/013775 JP0213775W WO2004062220A1 WO 2004062220 A1 WO2004062220 A1 WO 2004062220A1 JP 0213775 W JP0213775 W JP 0213775W WO 2004062220 A1 WO2004062220 A1 WO 2004062220A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- resistance
- resistances
- circuit
- series
- noise
- Prior art date
Links
- 230000005540 biological transmission Effects 0.000 claims abstract description 52
- 238000011084 recovery Methods 0.000 claims description 6
- 239000004071 soot Substances 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 230000003796 beauty Effects 0.000 claims 2
- 235000020990 white meat Nutrition 0.000 claims 1
- 230000008030 elimination Effects 0.000 description 12
- 238000003379 elimination reaction Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 6
- 230000000295 complement effect Effects 0.000 description 5
- 230000008929 regeneration Effects 0.000 description 3
- 238000011069 regeneration method Methods 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 2
- 241000972773 Aulopiformes Species 0.000 description 1
- 241000345998 Calamus manan Species 0.000 description 1
- 241000283153 Cetacea Species 0.000 description 1
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- 108010000020 Platelet Factor 3 Proteins 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 210000004907 gland Anatomy 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 235000012950 rattan cane Nutrition 0.000 description 1
- 235000019515 salmon Nutrition 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/42—Networks for transforming balanced signals into unbalanced signals and vice versa, e.g. baluns
- H03H7/425—Balance-balance networks
- H03H7/427—Common-mode filters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/30—Reducing interference caused by unbalanced currents in a normally balanced line
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/08—Modifications for reducing interference; Modifications for reducing effects due to line faults ; Receiver end arrangements for detecting or overcoming line faults
- H04L25/085—Arrangements for reducing interference in line transmission systems, e.g. by differential transmission
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/01—Frequency selective two-port networks
- H03H7/06—Frequency selective two-port networks including resistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
- H03H7/24—Frequency- independent attenuators
Definitions
- the present invention relates to a receiver, and in particular to a receiver for receiving a differential signal transmitted through a transmission line.
- the conventional transmission circuit is divided into a transmission circuit 100, an attenuation circuit 20 0 and a transmission line pair 300, and a reception circuit 4.
- the transmission line 100 is a complementary signal having a complementary m logical level when the transmission signal is provided to its own input m ⁇ T. -,
- Attenuation circuit 200 is designed to reduce the amplitude of each phase after blocking the received phase compensation power a, a, and a at a predetermined frequency.
- the circuit 200 removes the output mode a-9 a from the input mode and the noise sic and outputs it to the transmission line pair 300 as a phase interpolation force b-b. Force
- Complementary power b-b is transmitted through the transmission line pair 300
- the receiving circuit 400 which has been input as the complementary power c 1 C, into the receiving circuit 40 0 is the receiving power C 1 which has been received. From C, reproduce the transmit signal and output from output terminal T.
- the attenuation circuits C 2 and C 3 and the balanced transmission type T-type resistance attenuation circuits are stored in the attenuation circuit 200. Assembling a combination of ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇ ⁇
- the transmission line path be 300 mm or more, and that noise and noise should not be generated.
- the cocoon is superimposed on the complementary signal b-b, and the cocoon and the reception circuit 400 0 are received differentially by the superimposed motor and noise. There is a problem with trying to reproduce the signal by mistake.
- the received differential signal is corrected and the invention of the present invention which provides the reproducible reception is disclosed.
- the local aspect of the present invention is a receiver that receives a motion signal and is transmitted through a differential transmission line.
- the removal circuit is a monitor that is folded into an input differential signal.
- the above-mentioned noise removal circuit has a plurality of termination resistances between the differential transmission line and the wiring between the mode and the memory, and between the motor and the recovery circuit. Including ⁇
- the noise removal circuit is connected in series as a plurality of final resistances, and is connected in parallel between the differential transmission line and the motor line.
- the first and second resistances are connected in series with the first and second resistances, and the third and fourth resistances in which the power supply voltage is applied to both ends of the product are included. Between the second resistance and the third resistance and between the third resistance and the fourth resistance o
- the circuit for removing monmon noises has a low potential for reducing the charge on the monitor that has been reflected by the computer.
- a computer that may be folded into a file, it is possible to prevent the noise from entering the reproduction circuit, so that it is possible to include the reception difference ft signal by It is possible to provide a reproducible receiver.
- the noise removal circuit is connected in parallel between the recovery loop and the motor 3 in a state of being connected in series as a plurality of final resistances.
- the o between the 5th and 6th resistances is $ $ as it is between the 3rd and 4th resistances.
- the first and second resistances and the fifth and sixth resistances are disposed in close proximity to each other, and the differential transmission line and the noise are generated.
- the resistance values of the first and fifth resistances and the resistances of the second and sixth resistances are different from each other in the differential transmission line. It is possible to further improve the impedance of the differential transmission line and the removal circuit by having a value equal to the value of the noise. It will be ⁇
- the resistance value of the first and second resistances connected in series and the fifth and sixth resistances connected in series is approximately twice that of the impedance of the differential transmission line, respectively. Path of the road
- the ⁇ -mon noise elimination circuit which can be used as multiple end-to-end resistors, can be connected in series.
- the first and second resistances, including the first and second resistances, connected in parallel between the differential transmission line and the motor 3 in a state of The node between them is grounded via capacitance, and the monaural noise removal circuit is reflected by the monmoc.
- the way to the ground H via the campus is At the same time, it is possible to suppress the possibility that the computer may be folded into the network and to prevent it from entering the circuit. To provide a receiver that can be played back.
- the above-mentioned noise removal circuit is a series of resistance resistances, and in the form of a series connection between the two, it is parallel to the parallel circuit between the regeneration circuit and the motor. And third and fourth resistances and a source circuit including fifth and sixth resistances in a series connected state in which a source voltage is applied.
- the lines between the third and fourth resistors are connected to the lines between the fifth and sixth resistors, and the power source circuit is generated from the regeneration circuit. It is possible to eliminate reflections
- the first and second resistances and the third and fourth resistances are disposed in close proximity to each other, and the impedance of the differential transmission line and the dust removal circuit are preferably arranged. It will be possible to take good dansity adjustment ⁇
- the resistance value of the first and third resistances is different from the resistance value of the second and fourth resistances, and the impedance of the transmission line is different. It is possible to further improve the impedance adjustment ⁇ of the differential transmission line and the noise removal circuit by having an equal value to
- the ⁇ composition resistance value in a state in which the first and second resistances are connected in series and the state in which the third and fourth resistances are connected in series.
- the differential resistance is transmitted to each other with the oral resistance value.
- the impedance matching of the differential transmission line and the noise removal circuit can be further improved by approximately twice the impedance of the wiring line.
- Figure 1 is a block diagram showing the overall configuration of the transmission system incorporating the receiver 3 according to the embodiment of the present invention.
- FIG. 2 is a schematic diagram showing the detailed circuit configuration of transmitter 1 in Figure 1.
- FIG. 3 is a schematic diagram showing the detailed circuit configuration of receiver 3 in Figure 1
- Fig.4 is a schematic diagram showing a modification (noise elimination circuit 3 3) of the noise elimination circuit 3 1 of Fig. 3.
- Figure 5 is a formula that shows the configuration of the conventional transmission circuit m
- FIG. 1 is a block diagram of the configuration of the transmission system equipped with the receiver 3 according to the working example of the present invention.
- the transmission system is equipped with the transmission 1 and the differential transmission line 2 in addition to the receiver 3.
- Transmission 1 includes differential signal generation circuit 1 1 and noise removal circuit 1 2 as shown in FIG. 2 (A).
- Differential signal generation circuit 1 1 includes a driver, 1 1 1 and 2 resistors 1 1 2 and 1 1 3 H slave 1 1 1 has an input terminal T n o In the input terminal T in, the signal is sent to the receiver 3 TD is input o in the input terminal The TD and DR 1 1 1 generate the normal phase signal IS and output from the other terminal o In addition, the driver 1 1 1 has the same input power.
- the positive phase signal IS and the negative phase signal ⁇ S generated from the other ladder with the negative phase signal BS generated from the evening TD are based on the predetermined pressure value.
- the normal phase signal IS can be obtained based on a predetermined voltage value In fact, it has a form that has been reversed. From the above, the positive phase signal IS and the reverse phase signal BS
- Resistor 1 1 2 and 1 1 3 input end is a rib 1 1 1 1
- the 0 resistance 1 1 2 connected with one's and the other's output signal is the positive phase output from the Lipa 1 1 1 1 depending on its own resistance value. Attenuate the amplitude of the signal IS
- Output IS from o Resistor 1 13 has substantially the same resistance value as Resistor 12 1 2, and it is output from Riba 1 1 1
- the amplitude of the reverse phase signal BS is reduced to generate the reverse phase signal ABS and output.
- the noise removal circuit 12 has two low pass circuits (hereinafter referred to as LPF (L 0 P ass Filter)) 1 2 1 and 1 2 2 and 3 3 (hereinafter referred to as “CM (C 0 mm on-ode Choke S)”) 1 2 3 and
- the input of the LPF 1 2 1 is connected to the output of the resistor 1 2 2.
- the LPF 1 2 1 has a predetermined cutoff characteristic and the output from the resistor 1 1 2 From the normal phase signal AIS
- An input positive phase signal that removes high harmonics contained in it each has a high frequency, and each has a high frequency.
- L P F 1 2 1 is an input positive phase signal A I S
- the L P F 1 2 1 generates a positive phase signal B I S according to the above process.
- the input of the LPF 1 2 2 is connected to the output of the resistor 1 1 3.
- the LPF 1 2 2 has substantially the same blocking characteristics as the LPF 1 2 1 Possibility of collapsing from high harmonics external part that may be generated by reverse phase signal ABS output from 1 1 3 and lithium capacitor 1 1 1 1
- C.sub.M C.sub.123 typically does not contain two inductances L and L as shown in FIG. 2B.
- Inverse error signal L 2 provided with normal phase signal signal IS from PF 1 21 is given opposite phase signal B Bs from L signal F 1 2 2
- the positive-phase signal signal IS and the negative-phase signal signal symbol S which have mutually symmetrical time waveforms
- the C side C 1 2 3 3 is a common mode signal, the same phase signal CIS from which the noise is removed, and the reverse.
- a phase signal C ⁇ S is generated to form the differential transmission line 2 and other lines More than the noise removal circuit 1 2 that outputs to the road
- the differential transmission line 2 in Fig. 1 is typically a more twisted pair, and the line on one side transmits an input positive-phase signal CIS while the other side is an input on the other side.
- the reverse-phase signal CBS is transmitted, it is received by the receiver 3 as the normal-phase signal DIS and the reverse-phase signal DBS, and the normal-phase signal D is received.
- the reception 3 is equipped with a noise removal circuit 3 1 and a D / a reproduction circuit 3 2.
- the noise removal circuit 3 1 has C M C 3 1 1 and 2 L P
- the common mode noise elimination circuit 3 2 0 has two termination resistances.
- the CMC 31 1 includes the inductances L 1 and L 2 including the inductances L 1 and L 2 (see (B) in FIG. 2) as described above.
- Input m is connected to the differential transmission line 2 and the other line
- L P F 3 12 and 3 13 have substantially the same cutoff characteristics, and the input end of L P F 3 12 and 3 13 is C M
- the two terminal resistances 3 1 4 and 3 1 5 have approximately the same resistance value R 4 and R 5 and are connected in series, such as a series circuit like o
- the other end of the channel is connected between the LPF 32 12 and the input terminal of the evening playback circuit 32.
- the other end is connected to the PF 3 1 3.
- Circuit 32 is connected to the other input terminal o
- Other terminals between terminal resistances 3 1 4 and 3 1 5 (during mid voltage) N 2 is a 3 mon motor to be described later-noise elimination circuit 3 2
- the terminal resistances 3201 and 3202 in the circuit for elimination of heat 320 are substantially the same resistance value R as each other.
- N 1 The node between the terminal resistors 3201 and 3202 (also referred to as voltage medium) N 1 is a common mode noise which will be described later.
- the impedance of C M C 3 1 1 is Z C, and the resistance of termination resistors 3 2 0 1 and 3 2 0 2 is Z R 1
- the two resistors 3 2 0 3 and 3 2 0 4 ' have the same resistance value each other, and it is preferable to connect them in series. The direction is wired to a power supply not shown
- N The node between 0 3 and 3 2 0 4, N is the above-mentioned node
- LPFs 3 1 2 and 3 1 3 remove high frequency components from the output in-phase signal EIS and the output reverse phase signal EBS of CMC 3 1 1, Output the same phase signal F ⁇ S Output the same phase FIS is a termination resistance 3
- the signal is terminated by 14 and the same phase communication GIS is completed-the evening reproduction circuit 32 is given to the input ladder of 2 and the output opposite phase signal FBS is The final resistance 3 1 5
- the de-y-reproduction circuit 32 is a difference between the input positive-phase signal G I S and the input negative-phase signal G B S.
- the backscattering waves that may return to the circuit 3 1 are commonplace noises.
- C C M N is the same phase as each other, C M C 3 1 1 is the same as C 3 C 12 3 field, a mode, a noise
- Lead removal circuit 320 led to green
- the mode noise caused by the CMN may be small, and at the same time, the mode may not be recognized at all. It is also possible to prevent the noise CMN from returning to differential transmission line 2
- the terminal resistances 320 1 and 320 2 and the terminal resistances 3 14 and 3 15 be distributed as close as possible to each other. Therefore, the impedance D between the differential transmission line 2 and the noise elimination circuit 31 can be favorably taken.
- ZR 2 ⁇ R 3 ⁇ D: under the assumption of DT DT and more than ⁇ DT ⁇ : 3 ⁇ 4 qualitatively
- ZR 4 V R 4 II R 5
- R 0 1 R 0 2 R 4 and R 5 be the mouth resistance when the end resistors 3 1 4 and 3 1 5 are connected in series.
- the resistance values of R 0 1 R 0 2 R 4 and R 5 be selected to satisfy the theoretical relationship of 1st order R 4 2 • ZDT. Therefore, impedance matching between the differential transmission line 2 and the noise removal circuit 31 can be well taken.
- 3 1 2 and 3 1 3 are the force S that was arranged behind the CMC 3 1 1, and not limited to this, it is good even if it is placed in front of the CMC 3 1 1 .
- Figure 4 is a variation of the noise removal circuit 3 1 described above.
- Fig. 4 which is a schematic diagram showing the formation of the removal circuit 33, the foreign removal circuit 3 3 is compared with the removal circuit 3 1 in comparison with the removal circuit 3 1. Instead, the modem, noise removal circuit 3 3 1 and power supply circuit 3 3
- the modem and noise elimination circuit 331 can be used as a substitute for both resistors 3203 and 3204. There is no correlation between the two noise modes and the noise rejection circuits except for the one including the passivity 3311 and the other.
- the same reference symbols are attached to the configurations shown in FIG. 4 and the configuration shown in FIG. 3 and the corresponding abbreviations are omitted.
- the line 3 3 1 1 has a predetermined volume and one side is connected with the side 1 and the other side is grounded.
- the power supply circuit 3 32 has two resistors 3 3 2 1 and 3 3 2
- the noise removal circuit 33 may be in the same mode as the noise removal circuit 31 described above.
- noise removal circuit 3 1 has a mouth that can not remove the reflection from the sound regeneration circuit 3 2 favorably.
- the noise elimination circuit 33 since the FN 1 and N 2 are not directly connected, the fluctuation of the N 1 is shifted. As it is transmitted to the node N 2, the reflection from the energy recovery circuit 32 is transmitted to the power supply circuit
- the reception SB Related to the present invention can be used for the transmission circuit for transmitting the differential 15.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Dc Digital Transmission (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Noise Elimination (AREA)
Abstract
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE60221048T DE60221048T2 (de) | 2002-12-27 | 2002-12-27 | Empfänger zum Eliminieren von Gleichtaktrausch in einem Differenzsignal |
US10/468,829 US6992537B2 (en) | 2002-12-27 | 2002-12-27 | Receiver |
AU2002368534A AU2002368534A1 (en) | 2002-12-27 | 2002-12-27 | Receiver |
EP02790927A EP1492287B1 (en) | 2002-12-27 | 2002-12-27 | Receiver for eliminating common mode noise in a differential signal |
JP2004525643A JPWO2004062220A1 (ja) | 2002-12-27 | 2002-12-27 | 受信器 |
PCT/JP2002/013775 WO2004062220A1 (ja) | 2002-12-27 | 2002-12-27 | 受信器 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2002/013775 WO2004062220A1 (ja) | 2002-12-27 | 2002-12-27 | 受信器 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004062220A1 true WO2004062220A1 (ja) | 2004-07-22 |
Family
ID=32697326
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2002/013775 WO2004062220A1 (ja) | 2002-12-27 | 2002-12-27 | 受信器 |
Country Status (6)
Country | Link |
---|---|
US (1) | US6992537B2 (ja) |
EP (1) | EP1492287B1 (ja) |
JP (1) | JPWO2004062220A1 (ja) |
AU (1) | AU2002368534A1 (ja) |
DE (1) | DE60221048T2 (ja) |
WO (1) | WO2004062220A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007019990A (ja) * | 2005-07-08 | 2007-01-25 | Advantest Corp | 差動伝送システム |
JP2010233140A (ja) * | 2009-03-30 | 2010-10-14 | Hitachi Ltd | 半導体集積回路装置 |
JP2012222676A (ja) * | 2011-04-12 | 2012-11-12 | Nippon Telegr & Teleph Corp <Ntt> | 電界通信システムおよび電界通信方法 |
WO2013073093A1 (ja) * | 2011-11-15 | 2013-05-23 | パナソニック株式会社 | コモンモードフィルタ |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6956444B2 (en) * | 2003-02-14 | 2005-10-18 | Intel Corporation | Method and apparatus for rejecting common mode signals on a printed circuit board and method for making same |
US7388449B2 (en) * | 2004-12-10 | 2008-06-17 | Matsushita Electric Industrial Co., Ltd. | Radiation noise suppression circuit for differential transmission line |
CN1787504B (zh) * | 2004-12-10 | 2011-05-04 | 松下电器产业株式会社 | 差动传送线路的辐射噪音抑制电路 |
US20090058559A1 (en) * | 2007-08-31 | 2009-03-05 | Pakkala William F | Microprocessor common-mode emissions reduction circuit |
JP4482048B2 (ja) * | 2008-05-30 | 2010-06-16 | 株式会社日本自動車部品総合研究所 | 受信装置 |
JP5347608B2 (ja) | 2009-03-17 | 2013-11-20 | ソニー株式会社 | 受信装置 |
US8576930B2 (en) * | 2009-07-31 | 2013-11-05 | Stmicoelectronics S.R.L. | Receiver for signal communication apparatus and related signal communication apparatus |
US8824570B2 (en) * | 2010-04-06 | 2014-09-02 | Broadcom Corporation | Communications interface to differential-pair cabling |
JP6025438B2 (ja) * | 2011-09-14 | 2016-11-16 | キヤノン株式会社 | 差動伝送回路及びプリント回路板 |
JP5498475B2 (ja) * | 2011-12-27 | 2014-05-21 | 株式会社デンソー | 車両用電力線通信システム |
US9172563B2 (en) * | 2012-01-27 | 2015-10-27 | Tektronix, Inc. | Integrated combiner with common mode correction |
JP5722849B2 (ja) * | 2012-09-03 | 2015-05-27 | 株式会社デンソー | 車両用電力線通信システムおよび受信装置 |
JP5585748B1 (ja) * | 2012-10-19 | 2014-09-10 | 株式会社村田製作所 | コモンモードフィルタ |
US9577852B2 (en) * | 2014-11-03 | 2017-02-21 | Infineon Technologies Ag | Common-mode suppressor based on differential transmission line |
JP6524981B2 (ja) * | 2016-07-29 | 2019-06-05 | 株式会社デンソー | リンギング抑制回路 |
US10305432B1 (en) * | 2018-03-09 | 2019-05-28 | Zinwave, Ltd. | Balanced RF amplifier using a common mode choke |
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JPH04218214A (ja) * | 1990-02-22 | 1992-08-07 | American Teleph & Telegr Co <Att> | 通信伝送ケーブルと電磁干渉を抑圧する装置を有する通信伝送システム |
JPH09247217A (ja) * | 1996-03-11 | 1997-09-19 | Oki Electric Ind Co Ltd | 信号伝送回路 |
JP2002261842A (ja) * | 2001-02-28 | 2002-09-13 | Matsushita Electric Ind Co Ltd | 平衡伝送終端装置及びそれを用いた受信装置 |
JP2003018224A (ja) * | 2001-07-02 | 2003-01-17 | Canon Inc | 差動信号伝送方式および差動信号伝送における送信および受信に使用するic |
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JP3033424B2 (ja) * | 1994-02-28 | 2000-04-17 | 松下電工株式会社 | 平衡−不平衡変換器 |
AU3083595A (en) * | 1994-08-03 | 1996-03-04 | Madge Networks Limited | Electromagnetic interference isolator |
-
2002
- 2002-12-27 AU AU2002368534A patent/AU2002368534A1/en not_active Abandoned
- 2002-12-27 US US10/468,829 patent/US6992537B2/en not_active Expired - Fee Related
- 2002-12-27 EP EP02790927A patent/EP1492287B1/en not_active Expired - Fee Related
- 2002-12-27 WO PCT/JP2002/013775 patent/WO2004062220A1/ja active IP Right Grant
- 2002-12-27 DE DE60221048T patent/DE60221048T2/de not_active Expired - Fee Related
- 2002-12-27 JP JP2004525643A patent/JPWO2004062220A1/ja active Pending
Patent Citations (4)
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JPH04218214A (ja) * | 1990-02-22 | 1992-08-07 | American Teleph & Telegr Co <Att> | 通信伝送ケーブルと電磁干渉を抑圧する装置を有する通信伝送システム |
JPH09247217A (ja) * | 1996-03-11 | 1997-09-19 | Oki Electric Ind Co Ltd | 信号伝送回路 |
JP2002261842A (ja) * | 2001-02-28 | 2002-09-13 | Matsushita Electric Ind Co Ltd | 平衡伝送終端装置及びそれを用いた受信装置 |
JP2003018224A (ja) * | 2001-07-02 | 2003-01-17 | Canon Inc | 差動信号伝送方式および差動信号伝送における送信および受信に使用するic |
Non-Patent Citations (1)
Title |
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See also references of EP1492287A4 * |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007019990A (ja) * | 2005-07-08 | 2007-01-25 | Advantest Corp | 差動伝送システム |
JP2010233140A (ja) * | 2009-03-30 | 2010-10-14 | Hitachi Ltd | 半導体集積回路装置 |
JP2012222676A (ja) * | 2011-04-12 | 2012-11-12 | Nippon Telegr & Teleph Corp <Ntt> | 電界通信システムおよび電界通信方法 |
WO2013073093A1 (ja) * | 2011-11-15 | 2013-05-23 | パナソニック株式会社 | コモンモードフィルタ |
JP5547345B2 (ja) * | 2011-11-15 | 2014-07-09 | パナソニック株式会社 | コモンモードフィルタ |
JPWO2013073093A1 (ja) * | 2011-11-15 | 2015-04-02 | パナソニック株式会社 | コモンモードフィルタ |
US9007148B2 (en) | 2011-11-15 | 2015-04-14 | Panasonic Intellectual Property Management Co., Ltd. | Common mode filter provided with hightened removal function of common mode noise and de-emphasis function |
Also Published As
Publication number | Publication date |
---|---|
JPWO2004062220A1 (ja) | 2006-05-18 |
DE60221048D1 (de) | 2007-08-16 |
DE60221048T2 (de) | 2008-03-20 |
EP1492287A4 (en) | 2006-05-10 |
US20040155720A1 (en) | 2004-08-12 |
US6992537B2 (en) | 2006-01-31 |
EP1492287B1 (en) | 2007-07-04 |
EP1492287A1 (en) | 2004-12-29 |
AU2002368534A1 (en) | 2004-07-29 |
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