WO2004055922A2 - Procede de fabrication de transistors a effet de champ organiques a architecture de contact superieur a partir de polymeres conducteurs - Google Patents

Procede de fabrication de transistors a effet de champ organiques a architecture de contact superieur a partir de polymeres conducteurs Download PDF

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Publication number
WO2004055922A2
WO2004055922A2 PCT/DE2003/003936 DE0303936W WO2004055922A2 WO 2004055922 A2 WO2004055922 A2 WO 2004055922A2 DE 0303936 W DE0303936 W DE 0303936W WO 2004055922 A2 WO2004055922 A2 WO 2004055922A2
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WIPO (PCT)
Prior art keywords
layer
organic semiconductor
suspension
solution
organic
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PCT/DE2003/003936
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German (de)
English (en)
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WO2004055922A3 (fr
Inventor
Marcus Halik
Hagen Klauk
Ute Zschieschang
Günter Schmid
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Infineon Technologies Ag
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Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Priority to DE10394118T priority Critical patent/DE10394118D2/de
Priority to AU2003289814A priority patent/AU2003289814A1/en
Publication of WO2004055922A2 publication Critical patent/WO2004055922A2/fr
Publication of WO2004055922A3 publication Critical patent/WO2004055922A3/fr

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/60—Forming conductive regions or layers, e.g. electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/466—Lateral bottom-gate IGFETs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462—Insulated gate field-effect transistors [IGFETs]
    • H10K10/468—Insulated gate field-effect transistors [IGFETs] characterised by the gate dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/10—Organic polymers or oligomers
    • H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
    • H10K85/113—Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/60—Organic compounds having low molecular weight
    • H10K85/615—Polycyclic condensed aromatic hydrocarbons, e.g. anthracene
    • H10K85/622—Polycyclic condensed aromatic hydrocarbons, e.g. anthracene containing four rings, e.g. pyrene

Definitions

  • the invention relates to a method for producing layers from a layer material on organic semiconductor layers.
  • conductive organic polymers offer themselves in the long term as an inexpensive alternative to the inorganic semiconductor materials previously used.
  • Microelectronic components, such as transistors, based on organic semiconductors, for example, can be built up in relatively simple layers on a substrate using suitable printing techniques. The production of electronic circuits based on organic materials should therefore be able to be carried out in significantly shorter periods of time than with the inorganic analogs.
  • the first components based on organic semiconductors have already been successfully tested. However, there are still a number of problems to be solved before they can be introduced on an industrial scale.
  • the task remains to structure the organic semiconductor in accordance with the circuit logic to be achieved and to provide an electrical to produce a organic connection to the organic semiconductor path by the deposition of suitable contacts.
  • the layer which in this case can be constructed from a polymer, for example, is only to be structured after the deposition, suitable photoactive components can be added to the polymer, for example, and a formulation of the polymer with photoactive properties can be produced in this way. Selective exposure can then be used to specifically change the solubility of the polymer in a developer, for example. Areas of the layer that are not required for the production of the microelectronic component can then be removed with a suitable solvent.
  • a photoresist layer can also be applied to the layer to be structured, which layer is first exposed selectively using a photomask in order to prepare a structuring. After the development of the photoresist layer, a mask is obtained through which portions of the layer to be structured, which are to be removed, are exposed. In a subsequent etching step, in most cases a plasma process, the exposed sections of the layer can then be removed. Finally, the photo mask is removed, for example with a suitable solvent.
  • mechanical methods for structuring layers can also be used.
  • the screen printing process offers the possibility of applying a structured lacquer layer on a layer to be structured. Analogous to the optical methods, this method also requires a structure transfer process to the layer arranged under the lacquer layer in an etching process and the subsequent removal of the lacquer.
  • the structure resolution that can be achieved with the screen printing method is only about 200 ⁇ m and can therefore only be used for the production of relatively coarse structures. It is therefore sufficient for imaging large-area electrodes and conductor tracks, but must be replaced by higher-resolution processes for finer structures, such as highly integrated circuits.
  • Inkjet printing is also a mechanical process for creating defined structures.
  • the material forming the layer is sprayed onto the substrate surface as a solution in the form of small droplets.
  • the material to be applied either itself has a printable quality or is appropriately prepared by adding suitable solvents and additives.
  • the additives and solvents should evaporate quickly after application to prevent the layer structure from converging.
  • a microelectronic component based on organic materials is built up in layers.
  • a certain material is deposited as a layer and structured simultaneously with the deposition or in a later step. It is necessary that the layers arranged underneath this structure are separated by the deposition and material are not adversely affected. For example, a layer made of an organic semiconductor material must not lose its electrical properties due to the processing.
  • Organic semiconductors can be used, for example, in field effect transistors or electronic components, the functioning of which is based on a field effect.
  • the injection or extraction of charge carriers into or from the organic semiconductor layer takes place via a contact area which is formed between the organic semiconductor layer and a contact.
  • Both metals and organic conductive polymers can be used as the material for the contacts.
  • pentazene, tetrazene, ⁇ -oligothiophenes or polymeric semiconductors such as poly-3-hexylthiophene and F8T2 can be used as organic semiconductor materials.
  • the main difference between the two architectures is the order in which the organic semiconductor or the source / drain contacts are applied.
  • the source and drain electrodes are first deposited on the gate dielectric by means of photolithography, printing technology or vapor deposition methods, and the sensitive semiconductor is only applied in the last step.
  • the organic semiconductor layer can therefore no longer be destroyed by subsequent process steps.
  • the source or drain contacts are arranged on the layer of the organic semiconductor.
  • This has the advantage that, with this arrangement, more charge carriers can be injected into the semiconductor, since the contact area between the contact and the organic semiconductor is relatively large.
  • This achieves a high level of electronic efficiency, i.e. the response and switching times of the transistor can be shortened and thus the performance of the electronic component can be increased.
  • the manufacture of such a transistor presents difficulties because the electrodes have to be represented on the organic semiconductor layer without influencing the electrical properties of the semiconductor.
  • the object of the invention is therefore to provide a method for the deposition of layer materials on organic semiconductor layers which enables the production of electronic components which have a high performance.
  • an aqueous solvent is used in order to apply any layer material per se to the organic semiconductor layer.
  • the organic semiconductor layer has pronounced hydrophobic properties. This high hydrophobicity means that polar foreign molecules such as dopands, water molecules etc. cannot penetrate into the molecular structure of the organic semiconductor layer.
  • the method according to the invention thus uses the opposing interface properties of organic semiconductor layer and the solution or suspension to be applied thereon. Penetration of solvent molecules or other compounds is effectively suppressed. Therefore, irreversible structural changes in the ordered molecular structure are avoided during the processing of the layer material, so that no loss of the semiconductor properties is to be feared.
  • the layer material can in itself be chosen as long as it can be used to produce a solution or a suspension in the aqueous solvent.
  • a layer ateric For example, an organic polymer or an electrically conductive organic compound or a precursor of such a compound can be used.
  • metals can also be applied to the organic semiconductor layer using this method, for example.
  • the metals must be in a form that can be suspended in the aqueous solvent, for example as a sol or in the form of a suspension of nanoparticles made of metals.
  • Certain carbon modifications, for example fullerenes can also be applied as a suspension to the organic semiconductor layer.
  • the method according to the invention can now be used to apply layers of any desired layer materials to organic semiconductor layers, so that the possibilities of representing electronic components on the basis of organic semiconductors are considerably expanded.
  • the contact areas between the organic semiconductor layer and the deposited layer material, by means of which charge carriers are injected or extracted into or from the organic semiconductor layer, can be significantly increased, which enables the production of more powerful microelectronic components
  • An essential feature of the method according to the invention is the use of an aqueous solvent, through which the penetration of impurities into the organic semiconductor layer and thus the destruction of their ordered structures can be effectively avoided.
  • the aqueous solvent can also comprise other solvents, for example alcohols.
  • organic solvents lead to a loss of the semiconductor properties of the organic layer. Alcohols already significantly deteriorate the semiconductor properties of the organic semiconductor layer.
  • the proportion of such solvents in the aqueous solvent is therefore preferably kept as low as possible and should not exceed 5% if possible.
  • Pure water is particularly preferably used as the aqueous solvent, since it is strongly polar on the one hand, has a high surface tension and on the other hand can be completely evaporated under mild conditions, for example under reduced pressure.
  • the layer made of the layer material has a structure, for example the structure of a contact or, more generally, the layer made of the layer material forms raised portions on the organic semiconductor layer.
  • the solution or suspension of the layer made of the layer material has a structure, for example the structure of a contact or, more generally, the layer made of the layer material forms raised portions on the organic semiconductor layer.
  • Layer material applied in sections to the organic semiconductor layer After the aqueous solvent, in particular water, has evaporated, the layer material then remains as a raised section on the surface of the organic semiconductor layer.
  • the solution or the suspension of the layer material is applied to the organic semiconductor layer by a printing technique.
  • This method is particularly suitable for the production of large quantities of microelectronic circuits, with lower demands being placed on the resolution of the structures.
  • This embodiment is therefore particularly suitable for applications which are under high cost pressure.
  • the printing technique used for the application is not subject to any particular restrictions. High-volume printing techniques such as flexographic printing are particularly suitable. or offset printing, which allow inexpensive production of simple electronic components with large numbers.
  • the procedure is therefore preferably such that a mask with raised sections and trenches arranged between the raised sections is applied to the organic semiconductor layer and the solution or suspension of the layer material is filled into the trenches.
  • a negative mask of the structure to be produced is thus produced in a first step.
  • these negative structures are filled with a solution or suspension of the layer material, preferably an aqueous formulation of the layer material.
  • the hydrophobic character of the organic semiconductor layer prevents the hydrophilic formulation from penetrating. Excess formulation can be removed by doctoring from the raised areas of the negative mask.
  • the sections loaded with the formulation can thus be isolated from one another. It is then dried to remove the aqueous solvent.
  • Loading the mask with the solution or the suspension of the layer connection, in particular an electrically conductive polymer is carried out by means of customary techniques, such as spin-dip or spray coating. These processes allow the polymer solution to be applied quickly and over a large area while at the same time ensuring high homogeneity. It also acts these techniques are sophisticated processes. Appropriate systems are already available.
  • the mask can be produced, for example, by a printing technique, using a suitable organic polymer as layer material, which is dissolved or suspended in an aqueous solvent. The solvent is then removed and the structure obtained is hardened if necessary. Then, as described above, a solution or suspension of a further layer material, preferably an electrically conductive layer material, is filled into the trenches obtained.
  • a solution or suspension of a further layer material preferably an electrically conductive layer material, is filled into the trenches obtained.
  • the method according to the invention is used both for the production of the mask and for the production of the conductive structures. This shows the universal applicability of the method according to the invention in the production of structures on organic semiconductor layers.
  • the resolution in a printing process is approximately 50 ⁇ m and is therefore of particular interest for applications in which it is important to produce large quantities with a limited integration density of the electronic circuits produced.
  • the procedure is preferably that the mask is produced by depositing a solution or suspension of a polymer in an aqueous solvent on the layer of the organic semiconductor material, and the aqueous solvent is evaporated so that a polymer film is obtained, the polymer is converted into an insoluble form at least in sections, and soluble sections of the polymer film are detached with an aqueous solvent.
  • water is preferably used as the aqueous solvent.
  • this is preferably crosslinked with a suitable crosslinking agent.
  • the polymer film is processed using a photolithographic technique in order to produce soluble and insoluble sections.
  • a photolithographic technique in order to produce soluble and insoluble sections.
  • the exposure techniques required for this are known, for example, from the processing of silicon-based semiconductor chips.
  • the procedure is such that the polymer film is photoactive and the insoluble sections of the polymer film are obtained by exposing the polymer film in sections.
  • Polymer film converted into an insoluble form since the exposure causes the polymer to crosslink.
  • the photoresist is preferably applied to the organic semiconductor layer as an aqueous solution or suspension.
  • This embodiment of the method according to the invention is a simple method with a sophisticated, practice-proven lithography step of high resolution, as a result of which structures below 10 ⁇ are accessible.
  • An electrically conductive organic compound is chosen as the layer material for the production of contacts. In this way, the method according to the invention enables the simple production of top contacts on organic
  • Suitable electrically conductive organic compounds are known to the person skilled in the art and can also be obtained from commercial suppliers.
  • An exemplary ⁇ connection is Baytron P ® , which can be obtained from Bayer AG, DE.
  • the drying of the solution or the suspension of the layered compound is carried out at a temperature below 80 ° C. At a higher temperature there is a risk of a thermal change in the electrically conductive organic compound and thus a loss of the semiconductor properties.
  • a drying temperature of 60 ° C. is particularly preferred. On the one hand, this temperature is high enough to achieve a significant reduction in the drying time and, on the other hand, it is sufficiently low to largely preclude thermal decomposition of the sensitive organic materials.
  • the drying step is carried out under reduced pressure.
  • the reduced pressure is advantageously in a range from 100 to 500 bar. On the one hand, this range is high enough to be reached by inexpensive and commercially available vacuum devices, and on the other hand it is sufficiently low to achieve a significant reduction in the required drying temperature or reduction in drying time.
  • the organic semiconductor layer can be constructed from any organic semiconductor material.
  • the organic semiconductor layer is particularly preferably composed of a semiconductor which is selected from the group consisting of pentazene, tetrazene and ⁇ -oligothiophene.
  • the method according to the invention is particularly suitable for the production of top electrodes of organic field effect transistors.
  • a gate electrode is deposited on a substrate, the gate electrode is insulated with a layer of a gate dielectric, an organic semiconductor layer is deposited on the layer of the gate dielectric, and a source electrode and a drain electrode are deposited on the layer of the with an aqueous solution or suspension of an electrically conductive layer material organic semiconductor deposited.
  • a mask is produced on the layer of the organic semiconductor with an aqueous solution or suspension of a polymer, which mask has recesses corresponding to a drain and a source electrode, in which the layer of organic semiconductor is exposed, the recesses of the mask are filled with an aqueous solution or suspension of an electrically conductive layer material, and the water is evaporated, so that a source and a drain electrode are obtained.
  • the method according to the invention can be carried out at low temperatures.
  • Flexible temperature sensitive substrates can therefore be used.
  • Inexpensive, flexible polymer foils based on polyethylene naphthalate, polyethylene terephthalate, polyethylene, polypropylene, polystyrene, epoxy resins, polyimides, polybenzoxazoles, polyethers or their electrically conductive coated variants, as well as flexible metal foils, glass, quartz, or electrically conductive, are preferably used as the substrate coated glasses.
  • gate dielectric such as silicon dioxide or aluminum oxide
  • organic poly such as polyacrylates, polyphthalene, polyethylene or polystyrene and polyvinylphenol.
  • Printing process can also be used to define a gate layer, which reduces the unit cost for two layers per component, since it is the same process step.
  • the method according to the invention provides a simple, extremely inexpensive method for the structured application of preferably electrically conductive polymer directly to organic semiconductor layers.
  • organic field-effect transistors with top-contact architecture can be realized in high resolution that were previously not accessible.
  • the top contact architecture enables the production of integrated circuits with a higher performance, such as those required for use in RF-ID applications.
  • the main advantages of the method are the following points.
  • the process can be transferred to high-volume processes, for example to a printing process, so that in this case no lithography step is necessary.
  • the resolution in a printing process is approximately 50 ⁇ m and is therefore of particular interest for applications in which it is important to produce large quantities with a limited integration density of the electronic circuits produced.
  • the process is a low temperature process and is therefore suitable for flexible temperature sensitive substrates.
  • Another advantage of the method lies in the fact that the contact structures can also be produced without the use of traditional, cost-intensive and technologically complex photolithographic processes.
  • Figure 1 is a schematic representation of individual steps that are carried out in the execution of the inventive method for producing an organic field effect transistor with top contact architecture.
  • FIG. 2 shows a schematic illustration of an organic field effect transistor, with bottom contact architecture, shown in FIG. 2A, with top contact architecture, shown in FIG. 2B;
  • Fig. 4 is a graph in which electrical characteristics of an organic field effect transistor with top contact architecture based on pentacene are shown.
  • gate electrode 3 is defined on a substrate 4, for example a polymer film.
  • the gate electrode 3 can be made of aluminum, for example, and can be applied to the substrate 4 by a printing technique.
  • the gate electrode 3 is then covered with a layer of a dielectric 2 and thus insulated.
  • a suitable organic polymer can be used as the dielectric.
  • an organic semiconductor layer 1 is deposited on the dielectric 2.
  • the semiconductor layer can consist, for example, of pentazene, which is deposited by sublimation. The structure shown in Fig. 1A is obtained.
  • the organic semiconductor layer 1 is coated uniformly with a photoresist 5.
  • the photoresist is used as an aqueous solution or suspension. This solution or suspension can be applied as a thin layer using conventional methods, for example by spinning or spraying.
  • the structure shown in FIG. 1B is then briefly heated, for example to a temperature of 60 ° C., in order to evaporate the water and to obtain a uniform film of the photoresist.
  • the photoresist 5 is now exposed, as shown in FIG. IC, by means of a structured mask 6, so that exposed photoresist regions 7 and unexposed photoresist regions 8 are obtained, the arrangement of which corresponds to a negative image of the structure to be produced.
  • the exposed photoresist regions 8 are photochemically crosslinked by the exposure and are therefore insoluble in a developer solution.
  • the solution or suspension 9 can be sprayed on, for example.
  • the solution or suspension 9 can be used in excess, so that the photoresist regions 7 are also covered on their upper side.
  • the excess portions 10 of the polymer solution are then, as shown in FIG. 1F, removed with the aid of a doctor device 20, so that only the portions 11 of the polymer solution remain between the exposed photoresist regions 7, which later form the conductive structures.
  • the water is removed from the portions 11 of the polymer solution remaining in the trenches of the negative mask in a drying step, whereby, as shown in FIG. IG, the final electrically conductive structure 12 is obtained, which forms the drain and the source contact of the transistor ,
  • FIG. 2 shows a schematic comparison of the structure and mode of operation of various organic field effect transistors.
  • the source contact 15 and drain contact 14 are located below the organic semiconductor layer 13.
  • a layer of a dielectric 18 is arranged on a gate electrode 19, by means of which the gate electrode is electrically insulated.
  • Source and drain contacts 15, 14, which are electrically insulated from one another, are arranged on the layer of the dielectric 18.
  • Source and drain contacts 15, 14 and the regions of the dielectric 18 that are exposed between the source and drain contacts 15, 14 are covered by a layer of an organic semiconductor 13.
  • a conduction channel 16 is formed in the organic semiconductor layer between the source and drain contacts 15, 14, through which charge carriers 17 can flow when a voltage is applied between the source and drain contacts 15, 14.
  • the contact area between the source or drain contact 15, 14 and the organic semiconductor layer 13, through which charge carriers are injected from the source contact 15 into the line channel 16 or from the line channel 16 into the Drain contact 14 can be extracted, is formed only slightly, which is why only comparatively small currents can flow through the conduit 16.
  • a layer of a dielectric 18 is initially arranged on the gate electrode 19 again, by means of which the gate electrode 19 is electrically insulated.
  • the organic semiconductor layer 13 is now arranged directly on the layer of the dielectric 18.
  • source and drain contacts 15, 14 are arranged on the organic semiconductor layer 13, electrically insulated from one another.
  • Substantially larger areas of the organic semiconductor layer 13 are now detected by the field of the gate electrode 19, so that a very wide conduction channel 16 is formed within the organic semiconductor layer 13 between the source and drain contacts 15, 14.
  • a large contact area can form between the source / drain contacts 15, 16 and the organic semiconductor layer 13, through which charge carriers 17 can enter or exit the conduit 16. This passage area is significantly increased in comparison to the bottom contact architecture, see FIG. 2A. As a result, a larger number of charge carriers 17 pass through the line channel, i.e. a larger current flows.
  • a PVA solution prepared according to Example 1 2 ml of a PVA solution prepared according to Example 1 are applied with a pipette to a semiconductor layer which consists of pentazen, tetrazene or oligothiophene and which has been vapor-deposited on a substrate composed of carrier substrate, gate electrode and gate dielectric and has a layer thickness of 20-100 nm and spun on a spin coater at a speed between 1000 and 5000 revolutions per minute for a period of 30 s. The solution is then dried in air for 2 to 5 minutes.
  • the substrate prepared in this way is clamped in an imagesetter and adjusted with a brightfield hard mask, on which the corresponding structures of the source / drain layer are mapped, and between 15 and 45 depending on the layer thickness of the PVA layer s exposed to a dose of 7 mW / cm 2 .
  • the sample is developed with deionized water and washed thoroughly. Finally, drying takes place with the help of a spin dryer.
  • a PVA solution prepared according to Example 1 is deposited on a semiconductor layer produced according to Example 2 with the aid of a computer-controlled microdispenser. The solution is then dried for about 5 minutes and flood-exposed with a UV lamp for 40 s.
  • the sample is freed of any excess polymer solution using a silicone doctor blade.
  • the sample is then grooves dried in a vacuum drying cabinet at a temperature of 50 ° C and a pressure of 100 - 400 mbar.
  • Polymers eg Baytron P ®
  • a spin coater at a speed between 1000 and 3000 revolutions per minute for a period of 30 s.
  • Protruding polymer solution is removed from the sample using a silicone squeegee.
  • the sample is then dried for 20 minutes in a vacuum drying cabinet at a temperature of 50 ° C and a pressure of 100 - 400 mbar.
  • a Baytron P solution is deposited on a sample prepared according to Example 3 with the aid of a computer-controlled microdispenser.
  • the deposition takes place in the spaces between the negative structures, the negative structures preventing the Baytron drops from converging and thus maintaining sharp structures. In this case, scraping off the sample is not necessary, since a defined volume can be deposited via the computer-controlled microdispenser.
  • the sample is then dried for 20 minutes in a vacuum drying cabinet at a temperature of 50 ° C and a pressure of 100 - 400 mbar.
  • Example 7 Electrical characteristics of an organic field effect transistor with top contact architecture
  • FIG. 4 shows the typical electrical characteristics of an organic field effect transistor with top contact architecture based on pentacene.
  • the charge carrier mobility was 2.3 cm 2 / Vs, the on / off ratio 10 5 and the threshold voltage -3 V.
  • FIG. 4A shows the family of output characteristics of an organic field effect transistor with top contact architecture.
  • Four characteristic curves are plotted, ie the dependency of the current strength at the drain contact (drain current, in ⁇ A) against the applied voltage between drain and source contact (drain-source voltage, in V) on the drain-source voltage.
  • Share parameter is the voltage applied between the gate and source electrode (gate-source voltage) with values of -5 V, -10 V, -15 V and -20 V.
  • drain-source voltage A clear increase in the drain current with increasing drain-source voltage can be seen. This dependency increases with increasing gate-source voltage.
  • the driving force for charge carrier transport is the potential difference, i.e. the drain-source voltage. With increasing driving force, ie with increasing drain-source voltage, the drain current strength increases as expected. In contrast, the number of charge carriers available for the current flow depends on the applied gate-source voltage. The higher the gate-source voltage, the fewer charge carriers are available and vice versa. against this background, the increasingly clear dependence between drain current and drain-source voltage can be explained with increasing gate-source voltage.
  • Gate-source voltage shown at a drain-source voltage of -20 V The decrease in the drain current is clear at increasing gate-source voltage. If the root of the drain current value is plotted against the gate-source voltage, the linear dependency required by the theory is obtained in particular at very low gate-source voltage values.

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  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)

Abstract

L'utilisation d'une solution aqueuse contenant un polymère conducteur permet de fabriquer des transistors à effet de champ organiques sur la base des propriétés d'interface opposées d'une solution polymère hydrophile et d'un semi-conducteur organique hydrophobe. Lesdits transistors peuvent être fabriqués avec une architecture de contact supérieur, les propriétés électriques du semi-conducteur organique étant intégralement maintenues.
PCT/DE2003/003936 2002-11-29 2003-11-28 Procede de fabrication de transistors a effet de champ organiques a architecture de contact superieur a partir de polymeres conducteurs WO2004055922A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE10394118T DE10394118D2 (de) 2002-11-29 2003-11-28 Verfahren zur Herstellung von organischen Feldeffekttransistoren mit Top-Kontakt-Architektur aus leitfähigen Polymeren
AU2003289814A AU2003289814A1 (en) 2002-11-29 2003-11-28 Method for the production of organic field effect transistors with a top contact architecture made of conductive polymers

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DE10255870A DE10255870A1 (de) 2002-11-29 2002-11-29 Verfahren zur Herstellung von organischen Feldeffektransistoren mit Top-Kontakt-Architektur aus leitfähigen Polymeren
DE10255870.1 2002-11-29

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WO2004055922A2 true WO2004055922A2 (fr) 2004-07-01
WO2004055922A3 WO2004055922A3 (fr) 2004-09-30

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DE102005035696A1 (de) * 2005-07-27 2007-02-15 Thüringisches Institut für Textil- und Kunststoff-Forschung e.V. Verfahren zur Herstellung organischer Feldeffekttransistoren und darauf basierender Schaltungen auf Lösungsmittel- und temperaturempfindlichen Kunststoffoberflächen und organische Feldeffekttransistoren und organische optoelektronische Bauelemente nach diesem Verfahren

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AU2003289814A8 (en) 2004-07-09
DE10255870A1 (de) 2004-06-17

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