WO2004044935A1 - Element de circuit composite de condensateur et condensateur multicouche a carte a circuit integre - Google Patents

Element de circuit composite de condensateur et condensateur multicouche a carte a circuit integre Download PDF

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Publication number
WO2004044935A1
WO2004044935A1 PCT/JP2003/014306 JP0314306W WO2004044935A1 WO 2004044935 A1 WO2004044935 A1 WO 2004044935A1 JP 0314306 W JP0314306 W JP 0314306W WO 2004044935 A1 WO2004044935 A1 WO 2004044935A1
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Prior art keywords
capacitor
thin film
circuit element
dielectric
dielectric thin
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PCT/JP2003/014306
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English (en)
Japanese (ja)
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Yukio Sakashita
Hiroshi Funakubo
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Tdk Corporation
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/33Thin- or thick-film capacitors 
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/40Structural combinations of fixed capacitors with other electric elements, the structure mainly consisting of a capacitor, e.g. RC combinations

Definitions

  • the present invention relates to a device such as a smoothing circuit element built in an IC card.
  • This switching power supply circuit usually has a switching circuit, a rectifier circuit, and a smoothing circuit.
  • the smoothing circuit is composed of an inductor and a capacitor.
  • individual elements were used.
  • the inductor element an element in which a winding wire is wound around a ferrite core
  • a chip inductor element in which a number of ferrite layers and coil layers are alternately stacked, and the coil layers are connected between the layers are known.
  • a capacitor element a multilayer ceramic capacitor in which dielectric layers and internal electrode layers are alternately laminated is known.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 9-1213894.
  • the dielectric constant of these conventional dielectric thin films tends to decrease as the thickness of the dielectric thin film becomes thinner (for example, less than 100 nm).
  • these conventional dielectric thin films also have a problem in their surface smoothness, and there is also a problem that if the thickness of the dielectric thin film is reduced, insulation failure or the like is likely to occur.
  • it is difficult to laminate many other layers because the surface smoothness is poor when thinned, and it is difficult to laminate capacitors and other circuit elements on a substrate. It was difficult.
  • these conventional dielectric thin films have a problem that when the thickness of the dielectric thin film is reduced, for example, when an electric field of 100 kV / cm is applied, the capacitance is greatly reduced.
  • Non-Patent Document 1 “Particle Orientation of Bismuth Layered Structure Ferroelectric Ceramics and Its Application to Piezoelectric and Pyroelectric Materials” Tadashi Takenaka, Kyoto University Doctoral Dissertation (1 984), Chapters 23-77 of Chapter 3
  • the composition formula: (B i 2 ⁇ 2 ) 2+ (A m -i B m O 3m + i) 2 -, or B I is represented by 2 A m -1 B m ⁇ 3m + 3, a positive number of symbol m is 1-8 in the composition formula, the symbol A is N a, K, P b , B a, S r, C a and B i, at least one element selected from the group consisting of F e, C o, C r, Ga, T i, Nb, Ta, S b, V, Mo and It is known that a composition that is at least one element selected from W constitutes a bismuth layered compound dielectric of Balta
  • the composition represented by the above composition formula was formed into a thin film (eg, 1 ⁇ or less) under any conditions (eg, the relationship between the substrate surface and the degree of c-axis orientation of the compound). Even if it is thin, it can provide a relatively high dielectric constant and low loss even if it is thin, and obtain a thin film with excellent leakage characteristics, improved withstand voltage, excellent temperature characteristics of dielectric constant, and excellent surface smoothness. None was disclosed about what could be done. Disclosure of the invention
  • the present invention has been made in view of such circumstances. For example, it is small in size so that it can be arranged inside an IC card, has little characteristic change even at high temperatures, has a large capacity and low dielectric loss, and It is an object of the present invention to provide a capacitor composite circuit element in which a circuit element other than a capacitor, such as an inductor element, and a capacitor are combined. '
  • a capacitor suitable for use as a capacitor composite circuit element can be provided by forming a dielectric thin film by orienting the dielectric thin film perpendicular to the plane. That is, the present inventor formed a c-axis oriented film of a bismuth layered compound (the thin film normal is parallel to the c-axis) on the substrate surface, so that even if the thickness is reduced, a relatively high dielectric constant and low loss ( ta ⁇ ⁇ is low), and it has been found that a dielectric thin film having excellent temperature characteristics of dielectric constant and excellent surface smoothness can be realized.
  • a capacitor compound circuit element in which a capacitor is combined with a circuit element other than the capacitor
  • the capacitor has a dielectric thin film
  • the dielectric thin film is made of a bismuth layered compound having a c-axis oriented substantially perpendicular to the surface of the thin film forming substrate,
  • the bismuth layer compound is represented by the composition formula: (B i 2 0 2) 2+ ( ⁇ , -l B ra 0 3m + i) is represented by, or B i 2 An-l Bm 0 3m + 3, in the composition formula
  • the symbol ⁇ is a positive number
  • the symbol A is at least one element selected from Na, K, Pb, Ba, Sr, Ca and Bi
  • the symbol B is Fe, Co, Cr, Ga, It is characterized by being at least one element selected from Ti, Nb, Ta, Sb, V, Mo and W.
  • the capacitor composite circuit element according to the present invention can be incorporated in all electronic devices that are required to be reduced in size and thickness.
  • the circuit element is an inductor, and the circuit element is used as a smoothing circuit.
  • the IC card according to the present invention incorporates the above-described capacitor composite circuit element.
  • the circuit element other than the capacitor and the capacitor are integrally formed on the substrate by using a thin film forming method.
  • the dielectric thin film is disposed between the electrode thin films.
  • the capacitor is a thin-film capacitor including: a lower electrode formed on a substrate; the dielectric thin film formed on the lower electrode; and an upper electrode formed on the dielectric thin film. It is. These lower electrode, dielectric thin film and upper electrode are formed on the surface of the substrate by a thin film forming method.
  • the substrate is not particularly limited and is preferably a single crystal material, but may be made of an amorphous material or a synthetic resin such as polyimide.
  • the lower electrode formed on the substrate is preferably formed in the [100] direction. By forming the lower electrode in the [100] direction, the C-axis of the bismuth layered compound composing the dielectric thin film formed thereon can be oriented perpendicular to the substrate surface.
  • the composite circuit element of the present invention is formed on a surface of a substrate by a thin film forming method, cut by a dicer or the like, and then chipped.
  • the composite circuit element of the present invention may be formed directly on an LSI, a circuit board, another board (for example, a resin board), or another electronic device accessory such as a socket by a thin film forming method.
  • the c-axis of the bismuth layered compound is oriented 100% perpendicular to the substrate surface, that is, the degree of c-axis orientation of the bismuth layered compound is 100%.
  • the degree does not have to be 100%.
  • the bismuth layered compound has a degree of c-axis orientation of 80% or more.
  • m in the composition formula constituting the bismuth layered compound is any one of 1 to 7, and more preferably any one of 1 to 5. This is because manufacturing is easy.
  • the bismuth layer compound is a rare earth element (Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb). ⁇ ⁇ ⁇ ⁇ ⁇ At least one element selected from Lu).
  • the method for producing the dielectric thin film used in the capacitor composite circuit element according to the present invention is not particularly limited.
  • the dielectric thin film is oriented in the [100] direction such as cubic, tetragonal, orthorhombic, and monoclinic.
  • the composition formula is represented by: (B i 2 ⁇ 2 ) 2+ (A m ⁇ 1 B m 0 3 m + i) 2 — or B i 2 Am-i B m ⁇ 3 m + 3 ,
  • the symbol m in the formula is Positive number
  • symbol A is Na, K :, at least one element selected from Pb, Ba, Sr, Ca and Bi
  • symbol B is Fe, Co, Cr, Ga, Ti
  • It can be manufactured by forming a dielectric thin film having a bismuth layered compound which is at least one element selected from Nb, Ta, Sb, V, Mo and W as a main component.
  • a dielectric thin film composed of a bismuth layered compound having the above composition and having a c-axis orientation has a relatively high dielectric constant (for example, a dielectric constant of more than 100) and low loss (ta eta [delta] a is 0.02 or less), excellent leakage characteristic (e.g. leakage current measured at the electric field intensity 5 0 k VZcm is 1 X 10- 7 a / cm 2 or less, the short ratio is 10% or less), the breakdown voltage is Improved (for example, 1000 kV / cm or more), excellent permittivity temperature characteristics (for example, the average rate of change of permittivity with respect to temperature is within ⁇ 200 ppm at a reference temperature of 25 ° C. Within ⁇ C), and surface smoothness (For example, the surface roughness Ra is 2 nm or less.)
  • the dielectric thin film in the capacitor composite circuit element according to the present invention can maintain a relatively high dielectric constant even if it is thin, and has good surface smoothness, so that a single layer can increase the capacity.
  • the capacitor in the capacitor composite circuit element of the present invention has excellent frequency characteristics (for example, a dielectric constant value at a specific temperature in a high-frequency region of 1 MHz and a dielectric constant value of 1 kHz in a low-frequency region lower than that).
  • the ratio to the absolute value is 0.9 to 1.1 in absolute value
  • the voltage characteristics are excellent (for example, the value of the dielectric constant at a measurement voltage of 0.4 V at a specific frequency and the value of the The ratio to the dielectric constant is 0.9 to 1.1 in absolute value.
  • the capacitor in the capacitor composite circuit element according to the present invention has excellent temperature characteristics of capacitance (the average rate of change of capacitance with temperature is within ⁇ 200 ppm / ° C at a reference temperature of 25 ° C). ). [0 0 2 9]
  • the “thin film” in the present invention refers to a film of a material having a thickness of about 0.2 to several / m formed by various thin film forming methods, and a thickness of several hundred / xm formed by a sintering method.
  • the purpose is to exclude barta (lumps) with a thick film of a degree or more.
  • the thin film includes not only a continuous film that covers a predetermined region intermittently, but also a discontinuous film that covers intermittently at an arbitrary interval.
  • the thin film may be formed on a part of the substrate surface, or may be formed on the entire surface.
  • FIG. 1 is a circuit diagram of a capacitor composite circuit device according to one embodiment of the present invention.
  • FIG. 2 is a schematic sectional view of a capacitor composite circuit device according to one embodiment of the present invention.
  • FIG. 3 is a cross-sectional view of a sample for testing a capacitor alone in the capacitor composite circuit device according to one embodiment of the present invention.
  • FIG. 4 is a graph showing frequency characteristics of the capacitor sample according to the example of the present invention.
  • FIG. 5 is a graph showing voltage characteristics of the capacitor sample according to the embodiment of the present invention.
  • the capacitor composite circuit element 20 forms a smoothing circuit, includes a capacitor 2 and an inductor 30 connected in parallel, and the capacitor 2 and the inductor 3 “0” means that they are laminated on the substrate 4 by a thin film forming method to be integrally formed.
  • the capacitor 2 in the capacitor composite circuit element 20 has a substrate 4, and a lower electrode thin film 6 is formed on the substrate 4.
  • a dielectric thin film 8 is formed on the lower electrode thin film 6.
  • An upper electrode thin film 10 is formed on the dielectric thin film 8.
  • the end of the dielectric thin film 8 and the surface of the upper electrode 10 are covered with a first interlayer insulating layer 12, and a magnetic layer 14 are stacked. Inside the magnetic layer 14, a coil layer 18 for constituting the inductor 30 is arranged together with the second interlayer insulating layer 16.
  • the first interlayer insulating layer 12 and the second interlayer insulating layer 16 are made of, for example, silicon oxide / silicon nitride, the magnetic layer 14 is made of a fiber material, and the coil layer 18 is made of the lower electrode thin film 8. And a conductive layer similar to the upper electrode thin film 10, and is formed into a predetermined coil pattern by photolithography or the like.
  • These insulating layers 12 and 16, the magnetic layer 14 and the coil layer 18 are formed by a thin film forming method such as CVD or sputtering similar to the thin film forming method for forming the capacitor 2, and are formed by photolithography. Is processed into a predetermined pattern.
  • the coil layer 18 is formed into a coil pattern so as to constitute the inductor 30 shown in FIG. 1, and both ends thereof are connected to the capacitor 2 in parallel so that the upper electrode thin film 10 and the lower electrode 10 of the capacitor 2 are connected. It is necessary to connect to the electrode thin film 6. In the present embodiment, both ends of the coil layer 18 are connected to the upper electrode thin film 10 and the lower electrode thin film 6 via contact holes or external terminals (not shown).
  • the substrate 4 may be a single crystal having good lattice matching (for example, SrTi 3 single crystal, MgO single crystal, LaAlOs single crystal, etc.), an amorphous material (for example, glass, fused silica, Si ⁇ like 2 Bruno S i), a synthetic resin (e.g. polyimide resin), other materials (eg, Z R_ ⁇ 2 ZS i, etc. C EOS ZS i) is constituted by a.
  • a substrate that is oriented in the [100] direction such as cubic, tetragonal, orthorhombic, or monoclinic.
  • the thickness of the substrate 4 is not particularly limited, and is, for example, about 10 to: L000 jum.
  • the lower electrode film 6 in the case of using the lattice-match well single crystal substrate 4, for example other, conductive oxides such as C a RuOa and S r Ru0 3, or P t and Ru
  • a noble metal such as a conductive metal or a noble metal oriented in the [100] direction.
  • a conductive oxide or a noble metal oriented in the [100] direction can be formed on the surface thereof.
  • Such a lower electrode thin film 6 is manufactured by a normal thin film forming method.
  • the lower electrode thin film 6 is formed by a physical vapor deposition method such as a sputtering method or a pulse laser vapor deposition method (PLD).
  • the substrate 4 is preferably formed at a temperature of 300 ° C. or higher, more preferably 500 ° C. or higher.
  • the lower electrode thin film 6 can be made of, for example, conductive glass such as ITO.
  • conductive glass such as ITO.
  • the substrate 4 When a single crystal is used for the substrate 4 with good lattice matching, it is easy to form the lower electrode thin film 6 oriented in the [100] direction on the surface thereof.
  • the c-axis orientation of the dielectric thin film 8 to be formed tends to increase.
  • an amorphous material such as glass is used for the substrate 4
  • lower electrode thin films 6 include, for example, noble metals such as gold (Au), palladium (Pd), and silver (Ag) or alloys thereof, and base metals such as nickel (N i) and copper (Cu). Alternatively, an alloy thereof can be used.
  • noble metals such as gold (Au), palladium (Pd), and silver (Ag) or alloys thereof
  • base metals such as nickel (N i) and copper (Cu).
  • an alloy thereof can be used.
  • the thickness of the lower electrode thin film 6 is not particularly limited, but is preferably 10 to 1000 nm, more preferably about 50 to 100 nm.
  • the upper electrode thin film 10 can be made of the same material as the lower electrode thin film 6.
  • the thickness may be the same.
  • the dielectric thin film 8 is an example of a thin film capacitor element composition of the present invention, the composition formula: (B i 2 0 2) 2+ (A m -i B m O 3m + 1) 2 or B ⁇ 2 Am, -1 Bm O Contains a bismuth layered compound represented by 3m + 3.
  • a bismuth layered compound shows a layered structure in which a pair of Bi and O layers sandwiches the upper and lower layers of a layered perovskite layer consisting of a perovskite lattice consisting of (m-1) ABOs. .
  • the orientation of the bismuth layered compound in the [001] direction that is, the c-axis orientation, is enhanced. That is, the dielectric thin film 8 is formed such that the c-axis of the bismuth layered compound is oriented perpendicular to the substrate 4.
  • the c-axis orientation of the bismuth layered compound is 100%, but the c-axis orientation is not necessarily 100%, and preferably 80% or more of the bismuth layered compound. More preferably, 90% or more, and even more preferably, 95% or more should be c-axis oriented.
  • the c-axis orientation degree of the bismuth layered compound is preferably 80% or more.
  • the degree of c-axis orientation of the bismuth layered compound is preferably 90% or more, more preferably 95% or more. .
  • the degree of c-axis orientation (F) of a bismuth layered compound is defined as the c-axis X-ray diffraction intensity of a polycrystal that has a completely random orientation, and the actual c-axis X-ray intensity.
  • P in equation 1 is the sum of the reflection intensity I (00 1) from the (00 1) plane ⁇ ⁇ the sum of (00 1) and the reflection intensity I (hk l) from each crystal plane (hk 1) This is the ratio to I (hk 1) ( ⁇ I (00 1) / ⁇ 1 (hk 1) ⁇ ), and the same applies to P 0.
  • the X-ray diffraction intensity P when the crystal is oriented 100% in the c-axis direction is 1.
  • F 0% when completely random orientation (PP 0)
  • the c-axis of the bismuth layer compound the pair (B i 2 0 2) 2+ layer direction connecting to each other, i.e., means [001] orientation.
  • the dielectric properties of the dielectric thin film 8 are maximized. That is, even if the thickness of the dielectric thin film 8 is reduced to, for example, 100 nm or less, a relatively high dielectric constant and a low loss (low tan S) can be provided, and the leakage characteristics are excellent and the withstand voltage is low. It has improved temperature characteristics of dielectric constant and surface smoothness. If ta ⁇ ⁇ decreases, the loss Q (IX ta ⁇ ⁇ ) value increases.
  • the symbol m is not particularly limited as long as it is a positive number.
  • the symbol m is an even number, since the mirror plane has a mirror plane parallel to the c plane, the components of the spontaneous polarization in the c axis direction cancel each other out from the mirror plane, and the polarization axis is set in the c axis direction. You will not have it. Therefore, the paraelectric property is maintained, the temperature characteristic of the dielectric constant is improved, and a low loss (low ta ⁇ ) is realized.
  • the symbol ⁇ is composed of at least one element selected from Na, K, Pb, Ba, Sr, Ca and Bi.
  • the symbol A is composed of two or more elements, their ratio is arbitrary.
  • the symbol B is, F e, C o, C r N Ga, T i, Nb, T a, composed of at least one element selected from S b, V, Mo and W.
  • the symbol B is composed of two or more elements, their ratio is arbitrary.
  • the bismuth layer compound is the formula: C a x S r - represented by x) B i 4 T i 4 ⁇ 15, X in Formula is 0 ⁇ x ⁇ 1.
  • the temperature characteristic is particularly improved.
  • the Curie temperature (the phase transition temperature from ferroelectric to paraelectric) of the dielectric thin film 8 is preferably from 100 ° C to 100 ° C, More preferably, the temperature can be kept between 50 ° C and 50 ° C.
  • the Curie point is between 100 ° C. and + 100 ° C.
  • the dielectric constant of the dielectric thin film 8 increases.
  • Curie temperature can also be measured by DSC (differential scanning calorimetry) or the like. When one point of the lily drops below room temperature (25 ° C), ta ⁇ ⁇ further decreases, and as a result, the loss Q value further increases.
  • composition formula B i 2 A 3 - in x R e x B 4 0 15 , preferably 0. 0 1 ⁇ x ⁇ 2. 0, more preferably 0 l ⁇ x ⁇ 1.0.
  • the dielectric thin film 8 does not have the rare-earth element Re, it has excellent leakage characteristics as described later, but the leakage characteristics can be further improved by the substitution of Re.
  • the dielectric thin film 8 does not have a rare earth element R e, a leakage current measured at the electric field intensity 5 O k V / cm, preferably 1 X 1 0- 7 A / cm 2 or less, more preferably Can be 5 ⁇ 1Q ⁇ A / cm 2 or less, and the short-circuit rate can be preferably 10% or less, more preferably 5% or less.
  • the dielectric thin film 8 has a rare-earth element R e, the leakage current when measured under the same conditions, preferably 5 X 1 0- 8 A / cm 2 or less, more preferably 1 X 1 0- 8 a / cm 2 or less and it is possible to, yet short ratio, preferably 5% or less, more preferably be 3% or less.
  • the dielectric thin film 8 is formed using various thin film forming methods such as a vacuum evaporation method, a high-frequency sputtering method, a pulse laser evaporation method (PLD), a MOCVD (Metal Organic Chemical Vapor Deposition) method, and a liquid phase method (CSD method). be able to.
  • a vacuum evaporation method a high-frequency sputtering method
  • PLD pulse laser evaporation method
  • MOCVD Metal Organic Chemical Vapor Deposition
  • CSD liquid phase method
  • the dielectric thin film 8 is formed using a substrate or the like oriented in a specific direction (such as the [1,00] direction). From the viewpoint of reducing the manufacturing cost, it is more preferable to use the substrate 4 made of an amorphous material.
  • a bismuth layered compound having a specific composition is configured to be c-axis oriented.
  • a relatively high dielectric constant and low loss can be provided, and the Excellent characteristics, improved withstand voltage, excellent temperature characteristics of dielectric constant, and excellent surface smoothness.
  • the thickness of the dielectric thin film 8 can be reduced, it is possible to simultaneously increase the capacitance of the capacitor 2 and reduce its size. Moreover, in the present embodiment, since the surface of the dielectric thin film 8 in the capacitor 2 is excellent in the surface smoothness, the inductor 30 can be easily laminated on the capacitor 2 by the thin film forming method. .
  • the thickness including the packaging of the capacitor composite circuit element 20 including the capacitor 2 and the inductor 30 can be reduced to about 0.05 to 0.5 mm. Therefore, the capacitor composite circuit element 20 according to the present embodiment can be easily embedded in a thin electronic device such as an extremely thin IC card.
  • the dielectric thin film 8 has excellent temperature characteristics, the capacitance of the capacitor does not change even when the operating temperature environment changes, so that the function of the element is maintained.
  • capacitor 2 may be combined with a circuit element other than inductor 30 to form a capacitor composite circuit element.
  • the circuit element that can be combined with the capacitor 2 is not particularly limited, and examples thereof include a passive element such as a resistor and an active element such as a semiconductor element.
  • a passive element such as a resistor
  • an active element such as a semiconductor element.
  • a composite device for monolithic-microwave IC MMIC
  • HMIC monolithic-microwave IC
  • hybrid circuit board is exemplified as a specific application in which an active element or a passive element is combined with a capacitor.
  • the dielectric thin layer 8 may be laminated on the surface of the substrate 4 via the electrode films 6 and 10 in multiple layers. Since the dielectric thin film of the capacitor according to the present invention has excellent surface smoothness, even if it is thin, it has excellent insulation properties and pressure resistance, and can be stacked in a larger number than before.
  • the S r T i O 3 single crystal substrate of S r Ru_ ⁇ 3 serving as a lower electrode film in the [100] orientation is Epitakishanore growth ((100) S r RuO 3 ⁇ (100) S r T i Os ) 700 ° Heated to C.
  • the surface of the S RRu_ ⁇ third lower electrode film Ca (C 11H19O2) 2 (C8H23N5) 2, S r (C iiHi 9 0 2) 2 (C sHasN s) 2, B i
  • MOCVD method is used to obtain a Ca X S r (1 — x > B i 4 T i with a film thickness of about 100 nm.
  • the value of X was controlled by adjusting the carrier gas flow rates of the Ca raw material and the Sr raw material. .
  • the crystal structure of these dielectric thin films was measured by X-ray diffraction (XRD). I was able to confirm that.
  • the surface roughness (R a) of these dielectric thin films was measured by AFM (atomic force microscope, SPI 3800, manufactured by Seiko Instruments Inc.) according to JIS-B0601.
  • the electrical characteristics (dielectric constant, tan 5, loss Q value, leakage current, breakdown voltage) of the obtained capacitor samples and the temperature characteristics of the dielectric constant were evaluated.
  • Dielectric constant (no unit) was measured on a capacitor sample using a digital LCR meter (4274A manufactured by YHP) at room temperature (25 ° C) and measurement frequency 100 kHz (AC 2 OmV). It was calculated from the capacitance, the electrode dimensions of the capacitor sample, and the distance between the electrodes.
  • the tan S was measured under the same conditions as those for measuring the capacitance, and the loss Q value was calculated accordingly. [0 0 6 5]
  • Leak current characteristics (unit: AZ cm 2 ) were measured at an electric field strength of 50 kVZcm.
  • the temperature characteristics of the dielectric constant were measured for the capacitor sample under the above conditions, and when the reference temperature was set at 25 ° C, the temperature was within a temperature range of 150 to + 150 ° C.
  • the average change rate of the dielectric constant ( ⁇ ) was measured, and the temperature coefficient (PP m / ° C) was calculated.
  • the breakdown voltage (unit: kV / cm) was measured by increasing the voltage in the leak characteristic measurement.
  • c-axis oriented film of the bismuth layer compound obtained in Example 1 the breakdown voltage is higher than 1000 KVZcm, leakage current low enough 1 X 10- 7 or less, a dielectric constant of 200 or more It was confirmed that & 113 was 0.02 or less and the loss Q value was 50 or more. As a result, further thinning can be expected, and a higher capacity as a thin film capacitor can be expected.
  • Example 1 Although the temperature coefficient was very small at ⁇ 150 ppm // ° C or less, the dielectric constant was relatively large at 200 or more, and it had excellent basic characteristics as a temperature compensation capacitor material. It was also confirmed that. Further, in Example 1, it was confirmed that the thin film material was suitable for producing a laminated structure because of its excellent surface smoothness. That is, Example 1 confirmed the effectiveness of the c-axis oriented film of the bismuth layered compound.
  • the frequency characteristics were evaluated as follows. For the capacitor sample, the frequency was changed from 1 kHz to 1 MHz at room temperature (25 ° C), the capacitance was measured, and the permittivity was calculated. Figure 4 shows the results. An LCR meter was used to measure the capacitance. As shown in Fig. 4, it was confirmed that the value of the dielectric constant did not change even when the frequency at a specific temperature was changed to 1 MHz. That is, it was confirmed that the frequency characteristics were excellent.
  • the voltage characteristics were evaluated as follows. For the capacitor sample, change the measured voltage (applied voltage) at a specific frequency (100 kHz) from 0.4 IV (electric field strength 5 kV / cm) to 5 V (electric field strength 250 kVZ.cm).
  • Figure 5 shows the results of measuring the capacitance under a specific voltage (measurement temperature is 25 ° C) and calculating the permittivity. did.
  • an LCR meter was used. As shown in Fig. 5, it was confirmed that the value of the dielectric constant did not change even when the measurement voltage at a specific frequency was changed to 5 V. That is, it was confirmed that the voltage characteristics were excellent.
  • the size is so small that it can be arranged inside an IC card, the change in characteristics is small even at high temperatures, the capacity is large, and the dielectric loss is small.
  • a capacitor composite circuit element in which a circuit element other than a capacitor such as an inductor element and a capacitor are combined can be provided.

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Abstract

La présente invention concerne un élément (20) de circuit composite de condensateur d'une bobine d'induction (30) et d'un condensateur (20). Le condensateur (20) comporte un film mince diélectrique (8) constitué d'une couche de composé de bismuth à axe c orienté sensiblement perpendiculairement à la surface d'un substrat servant à former le film mince. La couche de composé de bismuth a une formule empirique représentée par (Bi2O2)2+(Am-1BmO3m+1)2- ou Bi2Am-1BmO3m+3, dans laquelle m représente un nombre positif, le symbole A représente au moins un élément sélectionné parmi Na, K, Pb, Ba, Sr, Ca et Bi et le symbole B représente au moins un élément sélectionné parmi Fe, Co, Cr, Ga, Ti, Nb, Ta, Sb, V, Mo et W.
PCT/JP2003/014306 2002-11-12 2003-11-11 Element de circuit composite de condensateur et condensateur multicouche a carte a circuit integre WO2004044935A1 (fr)

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JP2002328574A JP2004165372A (ja) 2002-11-12 2002-11-12 コンデンサ複合回路素子およびicカード
JP2002-328574 2002-11-12

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CN208173340U (zh) 2015-10-30 2018-11-30 株式会社村田制作所 Lc复合器件以及处理器

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JPH07106198A (ja) * 1993-10-08 1995-04-21 Matsushita Electric Ind Co Ltd 積層薄膜コンデンサの製造方法
JPH07245236A (ja) * 1994-01-13 1995-09-19 Rohm Co Ltd 誘電体キャパシタおよびその製造方法
JPH08253324A (ja) * 1995-03-10 1996-10-01 Sumitomo Metal Mining Co Ltd 強誘電体薄膜構成体
JPH08306865A (ja) * 1995-05-11 1996-11-22 Nec Corp ビスマス系層状強誘電体を用いたキャパシタとその製造方法
JPH09213894A (ja) * 1996-02-06 1997-08-15 Nippon Telegr & Teleph Corp <Ntt> 平滑回路素子
JPH10294432A (ja) * 1997-04-21 1998-11-04 Sony Corp 強誘電体キャパシタ、強誘電体不揮発性記憶装置および強誘電体装置
JP2000169297A (ja) * 1998-09-29 2000-06-20 Sharp Corp 酸化物強誘電体薄膜の製造方法、酸化物強誘電体薄膜及び酸化物強誘電体薄膜素子

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07106198A (ja) * 1993-10-08 1995-04-21 Matsushita Electric Ind Co Ltd 積層薄膜コンデンサの製造方法
JPH07245236A (ja) * 1994-01-13 1995-09-19 Rohm Co Ltd 誘電体キャパシタおよびその製造方法
JPH08253324A (ja) * 1995-03-10 1996-10-01 Sumitomo Metal Mining Co Ltd 強誘電体薄膜構成体
JPH08306865A (ja) * 1995-05-11 1996-11-22 Nec Corp ビスマス系層状強誘電体を用いたキャパシタとその製造方法
JPH09213894A (ja) * 1996-02-06 1997-08-15 Nippon Telegr & Teleph Corp <Ntt> 平滑回路素子
JPH10294432A (ja) * 1997-04-21 1998-11-04 Sony Corp 強誘電体キャパシタ、強誘電体不揮発性記憶装置および強誘電体装置
JP2000169297A (ja) * 1998-09-29 2000-06-20 Sharp Corp 酸化物強誘電体薄膜の製造方法、酸化物強誘電体薄膜及び酸化物強誘電体薄膜素子

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JP2004165372A (ja) 2004-06-10
TWI234792B (en) 2005-06-21

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