WO2003100862A1 - Dispositif de formation d'images a semi-conducteurs et reseau d'imageurs a semi-conducteurs - Google Patents
Dispositif de formation d'images a semi-conducteurs et reseau d'imageurs a semi-conducteurs Download PDFInfo
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- WO2003100862A1 WO2003100862A1 PCT/JP2003/005610 JP0305610W WO03100862A1 WO 2003100862 A1 WO2003100862 A1 WO 2003100862A1 JP 0305610 W JP0305610 W JP 0305610W WO 03100862 A1 WO03100862 A1 WO 03100862A1
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- state imaging
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- 238000003384 imaging method Methods 0.000 title claims abstract description 121
- 230000007423 decrease Effects 0.000 claims abstract description 10
- 238000001514 detection method Methods 0.000 claims description 35
- 239000004065 semiconductor Substances 0.000 claims description 29
- 238000000034 method Methods 0.000 claims description 16
- 239000000758 substrate Substances 0.000 claims description 14
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- 229910021332 silicide Inorganic materials 0.000 claims description 5
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 5
- 230000001678 irradiating effect Effects 0.000 claims 1
- 230000003247 decreasing effect Effects 0.000 abstract description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 4
- 230000003287 optical effect Effects 0.000 abstract 4
- 238000001444 catalytic combustion detection Methods 0.000 description 46
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 101100115215 Caenorhabditis elegans cul-2 gene Proteins 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 238000009434 installation Methods 0.000 description 3
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14831—Area CCD imagers
- H01L27/1485—Frame transfer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14806—Structural or functional details thereof
- H01L27/14812—Special geometry or disposition of pixel-elements, address lines or gate-electrodes
Definitions
- the present invention relates to a solid-state imaging device and a solid-state imaging device array.
- Figure 7A shows a top view of a conventional full frame transfer type solid-state imaging device (FFT type CCD) or frame transfer type (FT type) CCD in the case of two-phase drive, and Fig. 7 shows a cross-sectional view of the IV-IV arrow. Shown in B.
- FFT type CCD full frame transfer type solid-state imaging device
- FT type frame transfer type
- the CCD 100 includes a semiconductor substrate 101, a transfer electrode 102 provided on a front surface side of the semiconductor substrate 101, and a supply wiring 103 electrically connected to the transfer electrode 102.
- the CCD 100 is provided with a light detection unit that captures an image of incident light.
- a plurality of pixels E are arranged in a horizontal direction and a vertical direction. Then, when light enters the pixel E, charges are generated inside the pixel E, and an image of the light is captured.
- the transfer electrodes 102 are arranged on a predetermined number of the pixels E in parallel with one pixel E with the horizontal direction of the light detection unit as a longitudinal direction, and the transfer electrodes 102 transfer charges in a vertical direction by supplying a vertical transfer voltage. I do.
- the supply wiring 103 is a wiring for supplying a transfer voltage to the transfer electrode 102, and is provided at both ends of the CCD 100, which is a dead area F in which a vertical direction is a longitudinal direction and does not capture a light image. .
- a material that transmits light such as polycrystalline silicon (polysilicon) is used as a material of the transfer electrode 102.
- the supply wiring 103 made of a metal such as aluminum provided at both ends of the transfer electrode 102 is used to supply a voltage to the S transfer electrode 102.
- the supply wiring 103 made of aluminum or the like blocks light, in the conventional CCD, the supply wiring 103 is installed in the dead areas F at both ends of the CCD 100 as described above.
- the presence of the dead area F is a problem in that the surface of the CCD 100 is effectively used, and the dead area F is preferably as small as possible.
- Such a dead area F also poses a problem when a plurality of solid-state imaging devices are arranged side by side in the horizontal direction. That is, a part of the light image is not captured due to the presence of the dead area F between the plurality of solid-state imaging devices.
- the present invention has been made in order to solve the above problems, and provides a solid-state imaging device capable of reducing a dead area and widening a light detection unit, and a solid-state imaging device array using the same. Aim.
- a solid-state imaging device is formed on a semiconductor substrate including a p-type semiconductor layer and an n-type semiconductor layer, and divides m columns (m is an integer of 2 or more) in a horizontal direction.
- a photodetector that has m x n pixels arranged in a two-dimensional array consisting of n rows (n is an integer of 2 or more) dividing the vertical direction and capturing an image of incident light;
- a transfer electrode which is installed on the pixel with the horizontal direction of the photodetector as the longitudinal direction, and to which a vertical transfer voltage is applied to transfer the charge generated in the pixel in the vertical direction, and a metal or metal silicide, And a supply line electrically connected to the transfer electrode to apply a vertical transfer voltage to the transfer electrode.
- the pixels to be shielded by the supply wiring The decreased amount of the force signal you, characterized in that it is configured to be ToTadashi.
- the solid-state imaging device by providing supply wiring made of metal or metal silicide that blocks light on the pixel, a dead area for installing supply wiring at both ends in the horizontal direction of the light detection unit is reduced. Since it can be eliminated, the photodetector can be widened. In addition, by eliminating the dead zone, multiple solid-state In the case of using adjacently in the direction, it is possible to reduce the portion that is not imaged.
- the supply wiring is configured to cover only a part of the light-shielded pixel. At this time, light is incident on other portions of the light-shielded pixel, and an output signal whose output amount has been reduced to some extent is output from the light-shielded pixel. Therefore, according to the solid-state imaging device having the above configuration, the amount of decrease in the amount of light incident on the light-shielded pixel can be corrected based on the output signal.
- a solid-state imaging device array is characterized in that a plurality of the solid-state imaging devices described above are arranged adjacent to each other in a state where the light detection units are arranged in a horizontal direction. Since the above-described solid-state imaging device does not require a dead area for supplying the supply wiring, when a plurality of solid-state imaging devices are arranged in this way, the interval between the light detection units can be reduced. Thereby, the non-imaging portion existing in the image captured by the solid-state imaging device array can be reduced.
- FIG. 1 is a schematic configuration diagram of a first embodiment of a solid-state imaging device according to the present invention as viewed from the front side.
- 2A and 2B are (A) a top view and (B) a cross-sectional view taken along the line II-I showing a part of the configuration of the CCD of the solid-state imaging device shown in FIG.
- FIGS. 3A and 3B show (A) an example of output signal data of pixel A, and (B) output signal data of pixel D and pixel A, respectively, in an FFT type CCD of 102 4 columns and 6 rows.
- 6 is a table showing an example of the above.
- FIG. 4 is a schematic configuration diagram of a solid-state imaging device array using the solid-state imaging device according to the present invention as viewed from the front side.
- 5A and 5B are (A) a top view and (B) a cross-sectional view taken along the line II-II showing a part of the configuration of the CCD of the solid-state imaging device according to the second embodiment.
- 6A and 6B are (A) a top view and (B) a cross-sectional view taken along the line III-III, showing a part of the configuration of the CCD of the solid-state imaging device according to the third embodiment.
- 7A and 7B show the conventional full frame transfer type solid-state imaging device (FFT type CCD) or frame transfer type (FT type) CCD, (A) Top view of two-phase drive, and (B) IV—a sectional view taken along the arrow IV.
- FFT type CCD full frame transfer type solid-state imaging device
- FT type frame transfer type
- FIG. 1 is a schematic configuration diagram of a first embodiment of a solid-state imaging device according to the present invention as viewed from the front side.
- the solid-state imaging device includes a two-phase driven FFT type CCD.
- This FFT-type CCD has a configuration in which charges generated when a light image is incident from the surface side of the light detection unit are transferred in the light detection unit.
- the solid-state imaging device includes a CCD 1 that is an FFT type CCD and a charge transfer control unit 20.
- the CCD 1 includes a light detection unit 10, a horizontal shift register 15 and an amplification unit 16.
- the photodetector 10 has m rows H1 to Hm (m is an integer of 2 or more) whose horizontal direction is the vertical direction, and n rows whose vertical direction is the horizontal direction. Are divided into rows Vl to Vn (n is an integer of 2 or more), and are composed of mXn pixels A. Then, when a light image is incident from the surface side of the light detection unit 10, charges are generated inside the pixel A.
- the supply wirings 13a and 13b are made of a metal such as aluminum or a metal silicide having a low electric resistance. Of the m rows, the rows H1 and Hm at both ends of the photodetector 10 are provided. It is installed on the pixel so as to cover a part of each pixel. At this time, a part of the light-shielded pixel D covered by the supply wirings 13a and 13b is not covered, and light enters the light-shielded pixel D; Further, the supply wirings 13a and 13b are provided in pairs, one set each for the supply wirings 13a and 13b.
- the supply wiring 13a is electrically connected to the corresponding transfer electrodes among the two or four transfer electrodes provided for each row Vj, and transfers the transfer voltage P1 to these transfer electrodes.
- Supply Similarly, the supply wiring 13b is electrically connected to the corresponding transfer electrode, and supplies the transfer voltage P2 to these transfer electrodes.
- a vertical shift register that accumulates charges generated inside the pixel A and transfers the electric charges in the vertical direction (arrow a in the figure). Be composed. Then, the vertical transfer voltages P l and P 2 are controlled by the charge transfer control unit 20, whereby charges are transferred in the pixel A.
- the horizontal shift register 15 receives the electric charge generated in each pixel A and transferred in the vertical direction of the photodetector 10 from the photodetector 10 and transfers the electric charge in the horizontal direction (arrow b). Is output to the amplifier section 16. The electric charge output from the horizontal shift register 15 is amplified by the amplifier section 16 and output to the outside of the solid-state imaging device as an output signal for each pixel.
- FIGS. 2A and 2B are (A) a top view, and (B) a cross-sectional view taken along the line II-I, showing a part of the configuration of the CCD 1 of the solid-state imaging device shown in FIG. CCD 1 shown in FIGS. 2A and 2B includes a semiconductor substrate 11, transfer electrodes 12 a to 12 d, supply wires 13 a and 13 b, and an insulating layer 14.
- the semiconductor substrate 11 has a conductivity type of P + type and is a p + type n to m
- PCT / JP03 / 05610 Semiconductor substrate 1 1 1, P-type semiconductor layer 1 1 2 which is an epitaxial layer formed on the surface side, and 11-type semiconductor layer 1 1 1 further formed on the surface side 3 and a p + type semiconductor layer 114.
- the n-type semiconductor layers 113 and the p + -type semiconductor layers 114 are provided alternately in the horizontal direction with the vertical direction of the photodetector 10 as the longitudinal direction.
- the n-type semiconductor layer 113 and the p-type semiconductor layer 112 form a pn junction, and the n-type semiconductor layer 113 is a photodetection region that receives a light image and generates charges.
- the mold semiconductor layer 114 forms an isolation region C that separates each column Hi.
- the transfer electrodes 12 a to 12 d are provided on the surface of the semiconductor substrate 11 via the insulating layer 14.
- the n-type semiconductor layer 1 13 and the transfer electrodes 12 a to 12 d constitute pixels A arranged in n rows and m columns.
- the supply electrode 13a is electrically connected to the transfer electrodes 12a and 12b, and the vertical transfer voltage P1 is supplied to the transfer electrodes 12a and 12b.
- the supply electrode 13b is electrically connected to the transfer electrodes 12c and 12d, and the vertical transfer voltage P2 is supplied to the transfer electrodes 12c and 12d. That is, a pair of the transfer electrodes 12a and 12b applies a one-phase vertical transfer voltage to the semiconductor substrate 11, and a pair of the transfer electrodes 12c and 12d further adds the one-phase transfer electrode. Is applied.
- an oxide film that transmits light is used as a material of the insulating layer 14 that insulates the semiconductor substrate 1, the transfer electrodes 12a to 12d, and the supply wirings 13a and 13b from each other.
- the supply wirings 13a and 13b are installed on the surfaces of the rows HI and Hm of the photodetecting section 10 with the direction parallel to each row Hi of the photodetecting section 10 taken as the longer direction. Further, a convex portion 131a is provided on the semiconductor substrate 11 side of the supply wiring 13a, and the convex portion 13a is provided. 13a is electrically connected to the transfer electrodes 12a and 12b. Similarly, a convex portion 13 1 b (not shown in FIG. 2B) is provided on the semiconductor substrate 11 side of the supply line 13 b, and the convex portion 13 1 b It is electrically connected to 2c and 1 2d.
- the solid-state imaging device when a light image enters from the surface side of the light detection unit 10, the light image passes through the transfer electrodes 12 a to 12 d and the insulating layer 14, and Each pixel A of the output part 10 reaches the inside. Then, charges are generated inside each pixel A. This charge is applied to the corresponding transfer electrodes 12 a to 12 d corresponding to the vertical transfer voltages P l and P 2, and these voltages are controlled by the charge transfer control unit 20 so that the charge is transferred into the pixel A. Once held and transferred vertically. The transferred charge is output to the horizontal shift register 15. Then, the electric charges are transferred in the horizontal direction by the horizontal shift register 15 and input to the amplifier section 16 where they are amplified. The amplified charge is output to the outside of the solid-state imaging device as an output signal for each pixel A.
- the solid-state imaging device has the following effects by the above-described configuration and operation. That is, the supply wirings 13a and 13b, which are made of metal or metal silicide that shields light, which were conventionally installed in the dead areas at both ends of the CCD, are installed on the pixels in the solid-state imaging device according to the present embodiment. Have been. Thus, the dead area for installing the supply lines 13 & and 13 b can be eliminated from both ends of the CCD, so that the photodetector 10 in the CCD 1 can be widened.
- the supply springs 13a and 13b are configured to cover only a part of the light-shielded pixel D. At this time, light is incident on the other portion of the light-shielded pixel D, and an output signal whose output amount is reduced to some extent is output from the light-shielded pixel D. Therefore, according to the solid-state imaging device having the above configuration, it is possible to correct a decrease in the amount of light incident on the light-shielded pixel D based on the output signal whose output amount has decreased.
- Figures 3A and 3B show the (A) pixels in an FFT CCD of 102 4 columns 6 rows 6 is a table showing an example of output signal data of A and (B) an example of output signal data of a light-shielded pixel D and a pixel A.
- the method of correcting the output signal when the FFT CCD is driven by TDI which will be described later, is equivalent to the addition of signals for 64 pixels in the vertical direction. Therefore, it is sufficient to correct the output signals for the 104 channels in the horizontal direction corresponding to each column. For this reason, the tables of FIGS. 3A and 3B all show changes in the output signal in the horizontal direction.
- the pixel numbers shown in FIG. 3A indicate the channel numbers in the horizontal direction.
- the output signal is an example of the output signals of channels 1 to 4 and 10 21 to 10 24.
- the output signals of channels 5 to 10 20 are omitted because they are substantially the same as those of channels 1 to 4 and channels 10 21 to 10 24.
- the pixel numbers shown in FIG. 3B also indicate the channel numbers in the horizontal direction, as in FIG. 3A.
- the output signals also show examples of the output signals of channels 1 to 4 and channels 102 to 100.
- the supply wiring is placed on the surface of the pixels in columns H2 and H3, and columns H102 and HI023, and all the pixels of the corresponding channel are Has become.
- the difference between the output signals of adjacent pixels is very small.
- the output signal of the light-shielded pixel decreases in accordance with the area covered by the supply wiring and the like, as compared with the output signal of the pixel without the supply wiring. By compensating for the decrease in the output signal, the effect on the output signal of the supply wiring can be eliminated.
- the following method is effective as a method for correcting the output signal of the light-shielded pixel as shown in FIG. 3B.
- a reference output signal which is an output signal obtained by previously injecting light having substantially uniform intensity into the photodetector, is obtained. Then, the output signal of the light-shielded pixel is corrected based on the reference output signal of the light-shielded pixel. Alternatively, the output signal of the light-shielded pixel may be corrected based on the reference output signal of the pixel adjacent to the light-shielded pixel. Further, the correction may be performed based on the output signal of the pixel adjacent to the light-shielded pixel without using the reference output signal.
- the output signal of the light-shielded pixel is corrected using the correlation between the value of the output signal of the light-shielded pixel and the value of the output signal of a pixel adjacent to the light-shielded pixel that is not the light-shielded pixel.
- correction based on the reference output signal, correction is performed so that the value obtained by multiplying the reference output signal of the light-shielded pixel by the correction coefficient is substantially equal to the value of the reference output signal of the other pixels.
- a coefficient is calculated, and when an image of light is captured, a correction coefficient is multiplied by an output signal of a light-shielded pixel in an output signal obtained by imaging to correct this.
- the ratio of the light-shielded portion is large, and the error at the time of correction is large.
- the output signal of the light-shielded pixel is corrected. You may.
- the resolution may often be lower than that of visible light imaging.
- the resolution is 5 to 10 It may be about L p / mm.
- a resolution of about 2 to 5 Lp / mm is sufficient.
- 2 to 5 Lp / mm is a resolution that can resolve up to 2 to 5 black-and-white line pairs (line pairs) drawn within a width of l mm. This corresponds to a pixel size of about 200-500 / m.
- Panorama, cephalometric X-ray imaging device flick ⁇ TO
- these X-ray imaging devices can function effectively as sensors even if binning is performed, for example, by adding the output signals of four 2 ⁇ 2 pixels. .
- the influence of the supply wiring on the output signal of the unit pixel is smaller than that on the light-shielded pixel, and the output signal of the light-shielded pixel can be suitably corrected.
- the supply wiring is arranged so that the rows where the supply wiring is installed are not adjacent to each other. Should be installed.
- the supply wirings 13a and 13b are provided on the pixels in the columns at both ends of the light detection unit 10. In this way installation, supply wiring lines 1 3 a and 1 3 b from the transfer electrodes 1 2 a ⁇ 1 2 d to the vertical transfer voltage P l, the P 2 can be efficiently applied. Further, in addition to the present embodiment, the same effects as those of the present embodiment can be obtained by arranging the supply wirings 13a and 13b in a row substantially at the center of the photodetector 10. Further, by arranging in this way, the number of supply distribution # is minimized, so that the number of light-shielded pixels can be reduced.
- the supply wires 13a and 13b are installed as a set of two wires for applying the two-phase vertical transfer voltages P1 and P2, and the two supply wires that make up the set are one It is set on the pixels in the column.
- TDI Time Delay Integration
- the TDI driving method is a method of transferring electric charges between potential layers at a speed corresponding to the moving speed of the imaging target, further accumulating electric charges, and performing imaging without blurring for the moving light image.
- Such a driving method is based on the charge transfer control unit 20 described above.
- the effect of eliminating the dead area by the above configuration is advantageous in a solid-state imaging device array in which a plurality of solid-state imaging devices are arranged so as to be adjacent to each other in a state where the photodetectors 10 are arranged in a horizontal direction. Especially effective.
- FIG. 4 is a schematic configuration diagram of a solid-state imaging device array using the solid-state imaging device according to the present invention as viewed from the front side.
- a plurality of CCDs 1 shown in FIG. 1 are arranged so as to be horizontally adjacent.
- the solid-state imaging device array is large in size, and an imaging target that cannot be imaged by one solid-state imaging device is imaged by a plurality of solid-state imaging devices.
- both ends of the light detection unit where the supply wiring is provided are not used as the light detection unit, and no pixels are provided. For this reason, in an image captured over a plurality of light detection units, a certain non-imaging portion occurs inside the image because of the dead area due to the installation of the supply wiring existing between the light detection units.
- the solid-state imaging device eliminates the dead area caused by installing the supply wiring by installing the supply wirings 13a and 13b on the pixels.
- the non-imaging part existing in the image picked up by the array can be reduced.
- an X-ray imaging apparatus used for dental treatment is taken as an example.
- the length of the effective light detection area which is an area where solid-state imaging can be performed, is about 220 mm, and in a panoramic X-ray imaging device it is 15 mm. O mm is required.
- the width of the dead area at one end of the photodetecting section is 100 ⁇ m and the other is 200 ⁇ m at the joint between the photodetecting sections.
- a dead area having a width of 300 ⁇ is generated.
- there is a non-imaging portion in an image captured by the dead area which may affect the diagnosis in dentistry.
- the conventional solid-state imaging device array there is a problem that a non-imaging portion exists in the captured image. Therefore, if the solid-state imaging device array shown in FIG. 4 is used, the dead area due to the installation of the supply wiring is eliminated, and the non-imaging part can be reduced.
- FIGS. 5A and 5B are a (A) top view, and (B) a cross-sectional view taken along the line II-II, showing a part of the configuration of the CCD 2 of the solid-state imaging device according to the second embodiment.
- the CCD 2 shown in FIGS. 5A and 5B includes a semiconductor substrate 11, transfer electrodes 12a to 12d, supply wirings 23a and 23b, and an insulating layer 14. Among these, the configuration is the same as that of the solid-state imaging device according to the first embodiment except for the configuration of the supply wirings 23a and 23b, and therefore, the description is omitted.
- the supply wirings 23a and 23b are installed on the surfaces of the rows Hl, Hm, and the substantially central row, with the direction parallel to each row Hi of the photodetector 10 as its long direction. .
- the supply wiring 23a is provided with a convex portion 231a
- the supply wiring 23b is provided with a convex portion 231b.
- the vertical transfer voltage P1 is applied to the transfer electrodes 12a and 12b
- the vertical transfer voltage P2 is applied to the transfer electrodes 12c and 12d.
- the dead area for installing the supply wirings 23a and 23b can be eliminated from both ends of the CCD, it is possible to widen the light detection unit 10 in the CCD 2 . it can.
- the supply wirings 23a and 23b are configured to cover only a part of the light-shielded pixel D. Therefore, output with reduced output Based on the signal, the decrease in the amount of light incident on the light-shielded pixel D can be corrected.
- a pair of supply wirings 23a and 23b are provided on the surface of the substantially central row of the photodetector 10 in addition to the position in the first embodiment. Therefore, the distance between the supply wirings 23a and between the supply wirings 23b is reduced. As a result, the influence of the electric resistance of the transfer electrodes 12a to l2d can be reduced, so that the charge transfer speed of the CCD 2 can be increased, and the CCD 2 can be driven at a high speed. .
- the supply distribution lines 23a and 23b may be installed only on the surface of the substantially central row of the photodetection section 10. With this arrangement, the vertical transfer voltages P1 and P2 can be efficiently applied from the supply wires 23a and 23b to the transfer electrodes 12a to 12d. Further, since the number of supply wirings is minimized, the number of light-shielded pixels can be reduced.
- FIGS. 6A and 6B are (A) a top view, and (B) a cross-sectional view taken along the line III-III, showing a part of the configuration of the CCD 3 of the solid-state imaging device according to the third embodiment.
- the CCD 3 shown in FIGS. 6A and 6B includes a semiconductor substrate 11, transfer electrodes 12a to 12d, supply wirings 33a and 33b, and an insulating layer 14. Among them, the configuration is the same as that of the solid-state imaging device according to the first embodiment except for the configuration of the supply wirings 33a and 33b, and therefore, the description is omitted.
- the supply wirings 33a and 33b are placed on the surface of any row Hi on the surface of the insulating layer 14 with the direction parallel to each row Hi of the photodetector 10 as the long direction. Is done. At this time, the supply wirings 33a and 33b are installed in different rows.
- the supply wiring 33a is provided with a convex portion 331a.
- the power supply wiring 33b is provided with a convex portion 331b. Then, the vertical transfer voltage P1 is applied to the transfer electrodes 12a and 12 and the vertical transfer voltage P2 is applied to the transfer electrodes 12c and 12d via these convex portions.
- the solid-state imaging device according to the present embodiment is provided with the supply wirings 33a and 33b.
- the supply wirings 33a and 33b cover only a part of the light-shielded pixel D. Therefore, the amount of decrease in the amount of light incident on the light-shielded pixel D can be corrected based on the output signal whose output amount has decreased.
- two supply wirings constituting a set for applying two-phase vertical transfer voltages P1 and P2 are provided on pixels in mutually different columns.
- the supply wiring By providing the supply wiring in this manner, the area covered by the supply wiring per pixel to be shielded is reduced, and the amount of light incident on the pixel to be shielded is reduced. Thereby, it is possible to easily correct the output signal of the light-shielded pixel.
- the solid-state imaging device is not limited to the embodiment described above, and various modifications are possible.
- any number and number of supply wirings can be provided on the surface of the pixel at any position. Therefore, the supply wirings may be appropriately designed according to the required charge transfer speed, correction method, and the like.
- the two-phase drive CCD is used.
- the solid-state imaging device according to the present invention can be suitably configured by installing a necessary number of supply wirings on the pixel even when using CCD of three-phase drive or more.
- the FCD type CCD is used as the CCD, but other CCDs may be used.
- a frame transfer type CCD (FT type CCD) having a charge storage unit between the light detection unit and the horizontal shift register is provided with the supply wiring having the above configuration, so that the light detection unit of the solid-state imaging device can be widened. Can be.
- the solid-state imaging device and the solid-state imaging device array according to the present invention can be used as a solid-state imaging device and a solid-state imaging device array in which a dead area can be reduced and a light detection unit can be widened. That is, the solid-state imaging device eliminates the dead area for installing the supply wiring, which has conventionally existed at both ends in the horizontal direction of the light detection unit, by providing the supply wiring made of a material that blocks light on the pixel. So the photodetector can be wider it can. Further, the solid-state imaging device eliminates the dead area, so that a portion that is not imaged when a plurality of solid-state imaging devices are used adjacent to each other in the horizontal direction can be reduced.
- the supply wiring is configured to cover only a part of the light-shielded pixel. At this time, light is incident on other portions of the light-shielded pixel, and an output signal whose output amount has been reduced to some extent is output from the light-shielded pixel. Therefore, according to the solid-state imaging device having the above configuration, it is possible to correct a decrease in the amount of light incident on the light-shielded pixel based on the output signal.
- the solid-state imaging device array since the distance between the respective light detection units can be reduced by using the above-described solid-state imaging device, there is no possibility that the solid-state imaging device array is present in an image captured by the solid-state imaging device array.
- the imaging part can be reduced.
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Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE60326955T DE60326955D1 (de) | 2002-05-27 | 2003-05-02 | Halbleiterabbildungseinrichtung und halbleiterabbildungsarray |
EP03725732A EP1515370B1 (en) | 2002-05-27 | 2003-05-02 | Solid-state imaging device and solid-state imaging device array |
AU2003231373A AU2003231373A1 (en) | 2002-05-27 | 2003-05-02 | Solid-state imaging device and solid-state imaging device array |
US10/515,548 US7193252B2 (en) | 2002-05-27 | 2003-05-02 | Solid-state imaging device and solid-state imaging device array |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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JP2002-153035 | 2002-05-27 | ||
JP2002153035A JP4246964B2 (ja) | 2002-05-27 | 2002-05-27 | 固体撮像装置及び固体撮像装置アレイ |
Publications (1)
Publication Number | Publication Date |
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WO2003100862A1 true WO2003100862A1 (fr) | 2003-12-04 |
Family
ID=29561286
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2003/005610 WO2003100862A1 (fr) | 2002-05-27 | 2003-05-02 | Dispositif de formation d'images a semi-conducteurs et reseau d'imageurs a semi-conducteurs |
Country Status (6)
Country | Link |
---|---|
US (1) | US7193252B2 (ja) |
EP (1) | EP1515370B1 (ja) |
JP (1) | JP4246964B2 (ja) |
AU (1) | AU2003231373A1 (ja) |
DE (1) | DE60326955D1 (ja) |
WO (1) | WO2003100862A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1571830A2 (en) * | 2004-02-27 | 2005-09-07 | Rigaku Corporation | Method for CCD sensor control, CCD sensor system and X-ray diffraction apparatus |
Families Citing this family (9)
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JP4714502B2 (ja) * | 2005-04-26 | 2011-06-29 | パナソニック株式会社 | 固体撮像装置 |
US20060267059A1 (en) * | 2005-05-25 | 2006-11-30 | Macronix International Co., Ltd. | Peripheral circuit architecture for array memory |
JP4731278B2 (ja) * | 2005-10-25 | 2011-07-20 | パナソニック株式会社 | 固体撮像素子の駆動法方法 |
JP5000258B2 (ja) * | 2006-10-18 | 2012-08-15 | 浜松ホトニクス株式会社 | 固体撮像装置 |
JP5470928B2 (ja) * | 2009-03-11 | 2014-04-16 | ソニー株式会社 | 固体撮像装置の製造方法 |
JP2011056170A (ja) * | 2009-09-14 | 2011-03-24 | Fujifilm Corp | X線撮影システム及びその制御方法 |
JP6110154B2 (ja) | 2013-02-13 | 2017-04-05 | 浜松ホトニクス株式会社 | 固体撮像装置及び固体撮像装置の製造方法 |
US10903258B2 (en) * | 2017-10-11 | 2021-01-26 | Kla Corporation | Image sensors with grounded or otherwise biased channel-stop contacts |
JP6788648B2 (ja) * | 2018-10-24 | 2020-11-25 | キヤノン株式会社 | 放射線撮影装置、放射線撮影方法及びプログラム |
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JP2880026B2 (ja) * | 1992-08-28 | 1999-04-05 | 富士写真フイルム株式会社 | Ccd撮像装置とその駆動方法 |
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US5821547A (en) * | 1997-03-10 | 1998-10-13 | Talmi; Yair | Temporal filter using interline charged coupled device |
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-
2003
- 2003-05-02 DE DE60326955T patent/DE60326955D1/de not_active Expired - Lifetime
- 2003-05-02 EP EP03725732A patent/EP1515370B1/en not_active Expired - Lifetime
- 2003-05-02 US US10/515,548 patent/US7193252B2/en not_active Expired - Lifetime
- 2003-05-02 WO PCT/JP2003/005610 patent/WO2003100862A1/ja active Application Filing
- 2003-05-02 AU AU2003231373A patent/AU2003231373A1/en not_active Abandoned
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US6310370B1 (en) * | 1997-10-21 | 2001-10-30 | Sanyo Electric Co., Ltd. | Solid state image sensing device and method of manufacturing the same |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1571830A2 (en) * | 2004-02-27 | 2005-09-07 | Rigaku Corporation | Method for CCD sensor control, CCD sensor system and X-ray diffraction apparatus |
EP1571830A3 (en) * | 2004-02-27 | 2007-08-22 | Rigaku Corporation | Method for CCD sensor control, CCD sensor system and X-ray diffraction apparatus |
Also Published As
Publication number | Publication date |
---|---|
DE60326955D1 (de) | 2009-05-14 |
US20050151169A1 (en) | 2005-07-14 |
US7193252B2 (en) | 2007-03-20 |
EP1515370A4 (en) | 2006-03-15 |
EP1515370B1 (en) | 2009-04-01 |
JP2003347539A (ja) | 2003-12-05 |
AU2003231373A1 (en) | 2003-12-12 |
JP4246964B2 (ja) | 2009-04-02 |
EP1515370A1 (en) | 2005-03-16 |
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