WO2003030238A1 - Procede de traitement - Google Patents

Procede de traitement Download PDF

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Publication number
WO2003030238A1
WO2003030238A1 PCT/JP2002/009130 JP0209130W WO03030238A1 WO 2003030238 A1 WO2003030238 A1 WO 2003030238A1 JP 0209130 W JP0209130 W JP 0209130W WO 03030238 A1 WO03030238 A1 WO 03030238A1
Authority
WO
WIPO (PCT)
Prior art keywords
film layer
processing method
pressure
gas
organic film
Prior art date
Application number
PCT/JP2002/009130
Other languages
English (en)
French (fr)
Inventor
Akihito Toda
Kazuto Ogawa
Original Assignee
Tokyo Electron Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Limited filed Critical Tokyo Electron Limited
Priority to US10/490,201 priority Critical patent/US7297635B2/en
Publication of WO2003030238A1 publication Critical patent/WO2003030238A1/ja
Priority to US11/765,281 priority patent/US20070298617A1/en

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/42Stripping or agents therefor
    • G03F7/427Stripping or agents therefor using plasma means only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • H01L21/31116Etching inorganic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312Organic layers, e.g. photoresist

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
PCT/JP2002/009130 2001-09-26 2002-09-06 Procede de traitement WO2003030238A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US10/490,201 US7297635B2 (en) 2001-09-26 2002-09-06 Processing method
US11/765,281 US20070298617A1 (en) 2001-09-26 2007-06-19 Processing method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001-295187 2001-09-26
JP2001295187A JP4838464B2 (ja) 2001-09-26 2001-09-26 処理方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US11/765,281 Continuation US20070298617A1 (en) 2001-09-26 2007-06-19 Processing method

Publications (1)

Publication Number Publication Date
WO2003030238A1 true WO2003030238A1 (fr) 2003-04-10

Family

ID=19116663

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/009130 WO2003030238A1 (fr) 2001-09-26 2002-09-06 Procede de traitement

Country Status (5)

Country Link
US (2) US7297635B2 (ja)
JP (1) JP4838464B2 (ja)
CN (2) CN100349268C (ja)
TW (1) TW561546B (ja)
WO (1) WO2003030238A1 (ja)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4838464B2 (ja) * 2001-09-26 2011-12-14 東京エレクトロン株式会社 処理方法
JP4209277B2 (ja) * 2003-07-24 2009-01-14 コバレントマテリアル株式会社 プラズマ耐食性溶射部材の製造方法
US8193096B2 (en) 2004-12-13 2012-06-05 Novellus Systems, Inc. High dose implantation strip (HDIS) in H2 base chemistry
US8129281B1 (en) 2005-05-12 2012-03-06 Novellus Systems, Inc. Plasma based photoresist removal system for cleaning post ash residue
KR100680502B1 (ko) * 2005-09-21 2007-02-08 동부일렉트로닉스 주식회사 반도체 소자의 제조 방법
US7976641B1 (en) * 2005-09-30 2011-07-12 Lam Research Corporation Extending storage time of removed plasma chamber components prior to cleaning thereof
JP4559973B2 (ja) * 2006-01-13 2010-10-13 富士通セミコンダクター株式会社 半導体装置の製造方法
JP4948278B2 (ja) * 2006-08-30 2012-06-06 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US7740768B1 (en) * 2006-10-12 2010-06-22 Novellus Systems, Inc. Simultaneous front side ash and backside clean
US8435895B2 (en) 2007-04-04 2013-05-07 Novellus Systems, Inc. Methods for stripping photoresist and/or cleaning metal regions
JP4160104B1 (ja) * 2007-08-16 2008-10-01 株式会社アルバック アッシング装置
US8591661B2 (en) * 2009-12-11 2013-11-26 Novellus Systems, Inc. Low damage photoresist strip method for low-K dielectrics
US20110143548A1 (en) 2009-12-11 2011-06-16 David Cheung Ultra low silicon loss high dose implant strip
CN102652351B (zh) 2009-12-11 2016-10-05 诺发系统有限公司 在高剂量植入剥除前保护硅的增强式钝化工艺
WO2011141761A1 (en) 2010-05-13 2011-11-17 Nokia Corporation Method and apparatus for providing context sensing and fusion
US9613825B2 (en) 2011-08-26 2017-04-04 Novellus Systems, Inc. Photoresist strip processes for improved device integrity
CN103668081A (zh) * 2013-12-09 2014-03-26 京东方科技集团股份有限公司 一种晶振片清理设备
US9514954B2 (en) 2014-06-10 2016-12-06 Lam Research Corporation Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films
CN105374742B (zh) * 2014-09-02 2019-03-12 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
WO2024058135A1 (ja) * 2022-09-13 2024-03-21 東京エレクトロン株式会社 基板処理方法及び基板処理システム

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63216346A (ja) * 1987-03-04 1988-09-08 Matsushita Electric Ind Co Ltd 有機物のエツチング方法
JP2001085411A (ja) * 1999-09-16 2001-03-30 Matsushita Electric Ind Co Ltd 真空処理方法
JP2001118830A (ja) * 1999-10-19 2001-04-27 Tokyo Electron Ltd プラズマ処理方法
US20010003271A1 (en) * 1999-12-10 2001-06-14 Tokyo Electron Limited Processing apparatus with a chamber having therein a high-corrosion-resistant sprayed film

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3318241B2 (ja) 1997-09-19 2002-08-26 富士通株式会社 アッシング方法
US6207583B1 (en) * 1998-09-04 2001-03-27 Alliedsignal Inc. Photoresist ashing process for organic and inorganic polymer dielectric materials
US6325861B1 (en) * 1998-09-18 2001-12-04 Applied Materials, Inc. Method for etching and cleaning a substrate
US6277733B1 (en) * 1998-10-05 2001-08-21 Texas Instruments Incorporated Oxygen-free, dry plasma process for polymer removal
US6383964B1 (en) * 1998-11-27 2002-05-07 Kyocera Corporation Ceramic member resistant to halogen-plasma corrosion
US6379574B1 (en) * 1999-05-03 2002-04-30 Applied Materials, Inc. Integrated post-etch treatment for a dielectric etch process
JP3348706B2 (ja) * 1999-09-29 2002-11-20 日本電気株式会社 半導体装置の製造方法
US6554004B1 (en) * 2000-11-07 2003-04-29 Motorola, Inc. Method for removing etch residue resulting from a process for forming a via
JP4838464B2 (ja) * 2001-09-26 2011-12-14 東京エレクトロン株式会社 処理方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63216346A (ja) * 1987-03-04 1988-09-08 Matsushita Electric Ind Co Ltd 有機物のエツチング方法
JP2001085411A (ja) * 1999-09-16 2001-03-30 Matsushita Electric Ind Co Ltd 真空処理方法
JP2001118830A (ja) * 1999-10-19 2001-04-27 Tokyo Electron Ltd プラズマ処理方法
US20010003271A1 (en) * 1999-12-10 2001-06-14 Tokyo Electron Limited Processing apparatus with a chamber having therein a high-corrosion-resistant sprayed film

Also Published As

Publication number Publication date
US20040259356A1 (en) 2004-12-23
TW561546B (en) 2003-11-11
CN100477111C (zh) 2009-04-08
CN101026097A (zh) 2007-08-29
US20070298617A1 (en) 2007-12-27
JP2003100719A (ja) 2003-04-04
CN1561540A (zh) 2005-01-05
JP4838464B2 (ja) 2011-12-14
US7297635B2 (en) 2007-11-20
CN100349268C (zh) 2007-11-14

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