WO2001095489A1 - Circuits de decalage du niveau de tension et procedes et systemes utilisant lesdits circuits - Google Patents

Circuits de decalage du niveau de tension et procedes et systemes utilisant lesdits circuits Download PDF

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Publication number
WO2001095489A1
WO2001095489A1 PCT/US2001/040667 US0140667W WO0195489A1 WO 2001095489 A1 WO2001095489 A1 WO 2001095489A1 US 0140667 W US0140667 W US 0140667W WO 0195489 A1 WO0195489 A1 WO 0195489A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
latch
transistor
level shifter
input
Prior art date
Application number
PCT/US2001/040667
Other languages
English (en)
Inventor
Michael Allan Kost
Original Assignee
Cirrus Logic, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/590,596 external-priority patent/US6779125B1/en
Priority claimed from US09/625,899 external-priority patent/US6535018B1/en
Application filed by Cirrus Logic, Inc. filed Critical Cirrus Logic, Inc.
Priority to AU2001259825A priority Critical patent/AU2001259825A1/en
Publication of WO2001095489A1 publication Critical patent/WO2001095489A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356182—Bistable circuits using complementary field-effect transistors with additional means for controlling the main nodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
    • H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit

Landscapes

  • Logic Circuits (AREA)

Abstract

L'invention concerne un dispositif (200) de décalage de niveau permettant de faire passer la tension de niveau logique élevé d'un signal d'entrée d'une tension basse à une tension élevée. Ledit dispositif comprend un élément de verrouillage (204) capable de stocker un bit de données et pourvu d'une sortie permettant de faire passer à une tension supérieur un bit de niveau logique élevé stocké. Un noeud de données est couplé à la source de tension élevée et à une entrée dudit élément de verrouillage. Des circuits (203) de régulation de la tension font sélectivement correspondre le signal d'entrée basse tension reçu à un bit de données stocké dans l'élément de verrouillage (204) et en réaction, abaissent sélectivement la tension au niveau du noeud de données.
PCT/US2001/040667 2000-06-09 2001-05-03 Circuits de decalage du niveau de tension et procedes et systemes utilisant lesdits circuits WO2001095489A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2001259825A AU2001259825A1 (en) 2000-06-09 2001-05-03 Voltage level shifting circuits and methods and systems using the same

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US09/590,596 US6779125B1 (en) 2000-06-09 2000-06-09 Clock generator circuitry
US09/590,596 2000-06-09
US09/625,899 2000-07-26
US09/625,899 US6535018B1 (en) 2000-07-26 2000-07-26 Voltage level shifting circuits and methods and systems using the same

Publications (1)

Publication Number Publication Date
WO2001095489A1 true WO2001095489A1 (fr) 2001-12-13

Family

ID=27080884

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/040667 WO2001095489A1 (fr) 2000-06-09 2001-05-03 Circuits de decalage du niveau de tension et procedes et systemes utilisant lesdits circuits

Country Status (2)

Country Link
AU (1) AU2001259825A1 (fr)
WO (1) WO2001095489A1 (fr)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0661811A2 (fr) * 1993-12-28 1995-07-05 Oki Electric Industry Co., Ltd. Circuit de décalage de niveau
US6011421A (en) * 1996-12-20 2000-01-04 Samsung Electronics, Co., Ltd. Scalable level shifter for use in semiconductor memory device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0661811A2 (fr) * 1993-12-28 1995-07-05 Oki Electric Industry Co., Ltd. Circuit de décalage de niveau
US6011421A (en) * 1996-12-20 2000-01-04 Samsung Electronics, Co., Ltd. Scalable level shifter for use in semiconductor memory device

Also Published As

Publication number Publication date
AU2001259825A1 (en) 2001-12-17

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