Classifications

• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/18—Printed circuits structurally associated with non-printed electric components
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/0213—Electrical arrangements not otherwise provided for
  • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
  • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
  • H05K1/0231—Capacitors or dielectric substances
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W44/00—Electrical arrangements for controlling or matching impedance
  • H10W44/601—Capacitive arrangements
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
  • H05K2201/10431—Details of mounted components
  • H05K2201/10507—Involving several components
  • H05K2201/10515—Stacked components
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
  • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
  • H05K2201/10621—Components characterised by their electrical contacts
  • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
  • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
  • H05K2201/10621—Components characterised by their electrical contacts
  • H05K2201/10734—Ball grid array [BGA]; Bump grid array
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
  • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
  • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making
  • Y10T29/49117—Conductor or circuit manufacturing
  • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
  • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Definitions

• TITLE A PRINTED CIRCUIT BOARD ASSEMBLY WITH IMPROVED BYPASS DECOUPLING FOR BGA PACKAGES
• This invention relates to printed circuit board assemblies, and more particularly, to the use of thin decouplmg capacitors in conjunction with ball-g ⁇ d array (BGA) packages
• Decouplmg capacitors are used m electronic circuits to filter out transients in their associated power distribution systems Transients such as voltage spikes and momentary voltage drops may have adverse affects on various circuits, and may possibly cause erroneous operation Transients may often times be filtered out of a power distribution system by the use of capacitors (this is often referred to as decouplmg) When electrically connected between a power line and an electrical ground, a capacitor will tend to filter out many transients, as the voltage across a capacitor cannot change instantaneously
• the amount of capacitance necessary for effective elimination of power system transients can vary based on several different factors
• One such factor is the frequency of operation of the circuits for which decouplmg is to be provided Circuits which operate at higher frequencies, such as some radio circuits and high-speed computer systems, may produce more transients than low frequency or DC circuits
• some high frequency circuits may produce a number of harmonics or sub-harmonics, which may result m transients at different frequencies
• ESL Equivalent Series Inductance
• FIGs 1A and IB illustrate two possible BGA configurations
• the BGA shown includes a plurality of electrical contacts in a "ring" arrangement near the peripheries of the package
• a plurality of electrical contacts is also located in the center of the package, with an open space in between
• electrical contacts for conveymg power m this type of BGA are located on the inner portion of the ring, with ground contacts located in the center
• Figure IB illustrates a similar BGA arrangement, minus the central group of electrical contacts In this arrangement, power and ground contacts are typically located on the inner portion of the ring
• Both types of BGA's may be mounted to corresponding contact pads on a PCB
• the plurality of contact pads to which a BGA is mounted is sometimes referred to as a "footprint"
• decouplmg capacitance is provided for BGA's through the use of one or more surface mounted capacitors If the decouplmg capacitors are mounted on the same side of the PCB as the BGA, they will typicall ⁇ be placed some distance away from the power and ground pms of the BGA package In such cases, a greater number of capacitors may be required to overcome the effects of ESL As an alternative, ESL may be minimized by mounting the decouplmg capacitors nearer the pow er and ground contacts of the BGA, but on the opposite side of the PCB While this alternative may reduce the effects of ESL.
• a capacitor may be interposed between a BGA package and a PCB within a perimeter of the contact pads that form a BGA footprint
• the capacitor may have physical dimensions which allow a BGA package to be mounted such that there is no physical contact between the capacitor and the BGA
• the capacitor used is an thin capacitor, with a thickness of no more than 0 5 millimeters The small thickness of the capacitor may allow it to be easily interposed between a BGA and a PCB
• One embodiment of the thm capacitor has no leads Terminals located on the capacitor package may be soldeied directly to the appropriate contact pads on the PCB Since the package is leadless, equivalent series inductance (ESL) may be minimized In some cases, the minimization of ESL may result in the need for fewer capacitors to effectively decouple a BGA package
• multiple capacitors may be embodied within a common package
• an ultra-thm capacitor package includes two capacitors which differ in capacitance value by a factor of 10
• improved bypass decoupling for BGA packages may be accomplished by interposing thin capacitors (or capacitor packages) between a BGA and a PCB
• interposing capacitors between a BGA and the PCB some manufacturing operations may be eliminated which may result m cost reductions to the finished product
• the use of leadless capacitor packages may help minimize ESL and thus allow the use of fewer capacitors to effectively decouple a BGA
• the use of capacitor packages with multiple capacitors may allow the effective filtering of transients occurring at different frequencies
• the use of open space under a BGA may allow for more efficient utilization of circuit board area for other components BRIEF DESCRIPTION OF DRAWINGS
• Figure 1A is a view of the underside of one embodiment of a ball-grid array (BGA) package
• Figure IB is a view of the underside of another embodiment of a BGA package
• Figure 2 is a drawing illustrating a view of the placement of one embodiment of a mm capacitor withm a BGA footprint
• Figure 3 is a drawing of a printed circuit board (PCB) illustrating the mountmg of capacitors under a BGA in one embodiment
• Figure 4 is a side view of one embodiment of an ultra-thm capacitor mounted upon a PCB and interposed between a BGA and the PCB upon which it is mounted,
• PCB printed circuit board
• Figure 5A is a top view of one embodiment of a thm capacitor package which may be interposed between a PCB and a BGA,
• Figure 5B is a bottom view of the thm capacitor package of Figure 5 A
• Figure 5C is a side view of a capacitor such as those contained in the capacitor package illustrated m
• PCA 100 includes printed circuit board
• PCB 101 includes two BGA footprints 102, each of which is formed by a plurality of contact pads 105 A plurality of chips 107 is mounted upon PCB 101 Mounted within the periphery of each BGA footprint are capacitors 103 Each capacitor 103 is a thin capacitor that may be interposed between a BGA and PCB 101 Capacitors 103 may be physically and electrically connected to PCB 101 by soldering them to additional contact pads 104, which are located withm the periphery of the BGA footprint formed by contact pads 105 Capacitors 103 may be electrically coupled to a power distribution line at one terminal and a ground at the other terminal In the embodiment shown, capacitors 103 do not have leads, and thus are soldered to contact pads 104 via terminals located on the body of the capacitor packaging Capacitors 103 provide decouplmg for BGA packages that may be mounted to contact pads 105 of BGA footprints 102, and may be effective m filtering out power system transients Various alternate embodiments may use more than two capacitor
• capacitors 103 may be mounted to PCB 101 Terminals on capacitors 103 may be soldered to contact pads 104 which are located withm the periphery of BGA footprint 102 m this embodiment Contact pads 104 are also located on the same surface of PCB 101 as contact pads 105 BGA footprint 102 is formed b ⁇ a plurality of contact pads 105
• capacitors 103 may be secured to PCB 101 by an adhesive prior to soldering
• BGA 110 may be placed on PCB 101 , aligning it with contact pads 105 of BGA footprint 102
• a soldering operation may be used to physically and electrically connect BGA 110 to PCB 101
• a smgle soldering operation may be used to solder both BGA 1 10 and capacitors 103 to their respective contact pads
• FIG 4 is a side ⁇ lew of one embodiment of a th capacitor mounted upon a PCB and interposed between a BGA and the PCB upon which it is mounted
• Capacitor 103 may be mounted to PCB 101 as described with reference to Figure 2 and Figure 3 BGA 1 10 is also mounted to PCB 101
• Electrical contacts 1 1 1 may be used to couple BGA 110 to PCB 101
• each electrical contact 111 include;, a pre-formed ball of solder that may be used to solder the BGA to contact pads such as those shown in Figure 2
• the thickness of the type of capacitois used in the embodiment shown are no more than 0 5 millimeters and may be sigmficantlv less
• FIGS 5 A and 5B illustrate a top view and a bottom view , respectively, of one embodiment of a capacitor package 1030 that may be used m various embodiments
• Capacitor package 1030 includes a pluralm of contact terminals 1031 , which may include exposed metal suitable for soldering to a contact pad on a PCB Metal may be exposed on both sides of the terminals in some embodiments, which may allow for a more secure solder connection between the capacitor package and the contacts of the PCB
• two of contact terminals 1031 are electrically connected to a capacitor plate 1033 by conductors 1032
• Conductors 1032 provide an electrical connection between a contact terminal 1031 and capacitor plate 1033
• Alternate embodiments of the capacitor package may be constructed such that a capacitor plate makes direct contact with a contact terminal, thus eliminating the need for a conductor such as that shown here
• Capacitor plates 1034 and 1035 are show n m Figure 5B, which is a bottom view of the capacitor package 1030 Each of these capacitor plates is electrically connected to a terminal 1031 by a conductor 1032 Since there are two separate capacitor plates present on the bottom side, capacitor package 1030 essentially includes two capacitors Each capacitor m this embodiment is a two-plate capacitor, with the capacitor plates show n in Figure 5B each forming a capacitor with capacitor plate 1033 shown in Figure 5 A The capacitor plates may be separated by a dielectric material, as w ill be explained m further detail below
• capacitor package may include only a smgle capacitor, while others may include more than two capacitors
• capacitor packages may include a network of several capacitors of equal capacitance, or multiple capacitors with different ⁇ alues of capacitance Since the area of capacitor plate 1034 is greater than that of capacitor plate 1035, its capacitance value will also be greater as well
• the capacitance values of two capacitors m a package may differ by a factor of 10 By decouplmg in a "decade” fashion such as this, different frequencies may be filtered out when power system transients occur
• the capacitors shown m this embodiment have a tolerance value of ⁇ 20%, although greater or lesser tolerance values may be present m other embodiments
• Movmg now to Figure 5C a side view of a capacitor such as those contamed in the capacitor package illustrated in Figures 5A and 5B is shown It should be noted that the dimensions as shown m this drawing are exaggerated for clarity, and are not intended to represent the actual dimensions of the various embodiments Cap
• This invention is applicable to prmted circuit board assemblies, and more particularly, to the use of thm decouplmg capacitors m conjunction with ball-grid array (BGA) packages

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• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Physics & Mathematics (AREA)
• Electromagnetism (AREA)
• Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Priority Applications (3)

Applications Claiming Priority (2)

Publications (1)

Family

ID=24064157

Family Applications (1)

Country Status (7)

Families Citing this family (18)

Citations (6)

Family Cites Families (22)

• 2000
  • 2000-03-03 US US09/518,491 patent/US6404649B1/en not_active Expired - Lifetime
  • 2000-11-21 JP JP2001565717A patent/JP2003526221A/ja active Pending
  • 2000-11-21 CN CNB008192111A patent/CN1204793C/zh not_active Expired - Lifetime
  • 2000-11-21 KR KR1020027011585A patent/KR100747130B1/ko not_active Expired - Lifetime
  • 2000-11-21 WO PCT/US2000/031960 patent/WO2001067833A1/en not_active Ceased
  • 2000-11-21 DE DE60029011T patent/DE60029011T2/de not_active Expired - Lifetime
  • 2000-11-21 EP EP00990918A patent/EP1260121B1/en not_active Expired - Lifetime

Patent Citations (6)

Non-Patent Citations (5)

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