WO2001009890A1 - Dispositif de reproduction/enregistrement d'informations utilisant un disque optique et procede correspondant; systeme et procede d'enregistrement d'informations - Google Patents
Dispositif de reproduction/enregistrement d'informations utilisant un disque optique et procede correspondant; systeme et procede d'enregistrement d'informations Download PDFInfo
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- WO2001009890A1 WO2001009890A1 PCT/JP2000/004960 JP0004960W WO0109890A1 WO 2001009890 A1 WO2001009890 A1 WO 2001009890A1 JP 0004960 W JP0004960 W JP 0004960W WO 0109890 A1 WO0109890 A1 WO 0109890A1
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B27/00—Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
- G11B27/10—Indexing; Addressing; Timing or synchronising; Measuring tape travel
- G11B27/19—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
- G11B27/28—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording
- G11B27/30—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording
- G11B27/3027—Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier by using information signals recorded by the same method as the main recording on the same track as the main recording used signal is digitally coded
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1883—Methods for assignment of alternate areas for defective areas
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1883—Methods for assignment of alternate areas for defective areas
- G11B20/1889—Methods for assignment of alternate areas for defective areas with discs
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/20—Disc-shaped record carriers
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/20—Disc-shaped record carriers
- G11B2220/21—Disc-shaped record carriers characterised in that the disc is of read-only, rewritable, or recordable type
- G11B2220/215—Recordable discs
- G11B2220/216—Rewritable discs
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B2220/00—Record carriers by type
- G11B2220/20—Disc-shaped record carriers
- G11B2220/25—Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
- G11B2220/2537—Optical discs
- G11B2220/2562—DVDs [digital versatile discs]; Digital video discs; MMCDs; HDCDs
- G11B2220/2575—DVD-RAMs
Definitions
- the present invention relates to an information recording / reproducing apparatus and method using an optical disk, an information recording system, and an information recording method.
- the present invention relates to an information recording / reproducing apparatus and method for recording and / or reproducing information, and more particularly to an optical disk recording apparatus and method for recording information on an optical disk as a recording medium, and an optical disk for reproducing information from the optical disk
- the present invention relates to a reproducing apparatus and a method thereof, and further relates to an information recording system and a method using an optical disc recording apparatus in combination with an external apparatus.
- optical disks have attracted attention as large-capacity information recording media, and are being developed and commercialized as external storage devices for computers and media for video / audio recording.
- a spiral or concentric track is provided on the disk surface, and information is recorded and reproduced by irradiating a laser beam along the track.
- the track is further divided into a plurality of sectors which are the minimum units for recording and reproducing information data. Address information is recorded in advance in each sector so that the position on the disk can be uniquely specified.
- the recording / reproducing device can read / write address information from the disk to enable recording / reproduction of information in sector units. ing.
- FIG. 18 is a diagram showing a data format in a sector of a rewritable optical disk which has recently been put into practical use, taking a DVD-RAM as an example.
- the sector 1001 has a header area 1002 and a data recording area 1003.
- the header area 1002 has an address area 1004 and a mirror area 1005, and the address area 1004 further has four address area parts, that is, first to fourth address area parts 1004a, 1004b, 1004c, 1004. is divided into d. Each address area is addressed in order from the top.
- VFO sections VFOa, VFOb, VF Oc, VFOd (hereinafter abbreviated as VFO part), address mark part AMa, AMb, AMc, AMd (hereinafter abbreviated as AM), address information part PI Da, PI Db, PI Dc, PI Dd ( Hereinafter, abbreviated as PID), error detectors I ED a, I ED b, I ED c, I ED d (hereinafter abbreviated as I ED), postamble PAa, PAb, PAc, P Ad (hereinafter, abbreviated as P ID) PA).
- the data recording area 1003 has a gap area 1006, a front guard area 1007, a data VFO area 1008, a pre-sync code area 1009, a data area 1010, a data postamble area 1011, a rear guard area 1012, and a buffer in order from the beginning. It consists of area 1013.
- header area 1 The content and role of each of the above areas will be briefly described. First, header area 1
- Reference numeral 002 denotes an area for uniquely specifying the position (ie, address) of each sector 1001 on the optical disc.
- the recording / reproducing apparatus performs the following.
- a pattern for recognizing the address is recorded.
- the VFO section has a single pit pattern for performing high-speed pull-in of PLL in the playback system of the apparatus. Be recorded.
- a single pit pattern for example, a continuous pattern of 4T mark / 4T space is used.
- T is the channel bit period
- the mark is a pit or recess
- the space is a mirror or protrusion.
- the definition of mark space can be reversed.
- a specific pattern indicating the start of address information is recorded in the address mark part (AM), and is used to correctly synchronize the byte of each immediately following address information part (PID) in the device.
- Address information is recorded in the address information section (PID).
- This address information includes at least an address number for uniquely specifying the position of each sector on the optical disc. Other information includes the attribute of the sector, and what number of address information among the four address information sections in each sector. Includes additional information such as whether it is a department.
- An error detection code (parity) for detecting a byte error in the immediately preceding address information section (PID) is recorded in the error detection section (IED).
- Example of error detection code For example, a Reed-Solomon code, a cyclic code, or the like is used to reproduce address information error detection coded data in which an error detection code is added to address information.
- the reproduced address information error detection coded data (that is, address information PI D +
- By passing the pattern of the error detection code (IED) through an error detection circuit errors contained in the pattern can be easily detected.
- a specific pattern indicating the end of each address area is recorded in the postamble (PA).
- each of the address information section (PID) and each error detection section (IED) a modulation code obtained by modulating the address information and the binary data of the error detection code based on a predetermined modulation rule is actually used. Is recorded.
- 8/16 means that 8-bit binary data is converted to 16 channel bits.
- RLL is an abbreviation of Run Length Limited.
- NRZ Non Return to Zero
- the run length that is, the number of symbols 0 inserted between symbols 1 is finite. Means a range.
- RLL (2, 10) restricts run length to a number between 2 and 10.
- the length of the mark and the space is 3 T (0 Can be said to be limited to the range from 2) to a maximum of 1 1 T (0 is 10).
- 3T is called the shortest mark Tmin
- 11T is called the longest mark Tmax.
- the gap area 1006 is used as a time margin for post-processing of the address information reproducing operation in the header area 1002 in the device and pre-processing for the succeeding front guard area 1007 and subsequent recording operations. This area is provided and does not record data to be reproduced.
- the front guard area 1007 and the rear guard area 1012 are areas that absorb the deterioration of the recording film that occurs when data is repeatedly recorded in the same sector, and a specific repetition pattern is recorded.
- a single pit pattern is recorded in the data VF ⁇ area 1008 to perform the pull-in operation of the reproduction PLL at high speed during data reproduction.
- the 4T mark and 4T space continuous patterns are the same as each VFO section of the header area 10 ⁇ 2 in the data area 1 0 7, the data VF ⁇ area 1 0 8 and the rear guard area 1 0 1 2 Is recorded.
- a pre-sync which is a specific pattern provided for detecting the head of the subsequent data area 1100 and easily establishing byte synchronization is recorded.
- the data area 1100 is an area for actually recording user data, and although not shown, is composed of a plurality of sync frames to ensure the reliability of byte synchronization. Adds a specific pattern of sync code to facilitate byte synchronization in each sync frame. Further, an error detection code based on a predetermined coding rule is added to the user data recorded in the data area 10010, and each address information section (PID) and each error detection section (PID) in the header area 1002 are added.
- PID address information section
- PID error detection section
- the buffer area 101 3 has enough time to prevent overwriting the immediately following header area even if the linear velocity changes due to disk rotation fluctuation or eccentricity during data recording. No data is recorded.
- the following describes a method employed in a conventional optical disk device when recording / reproducing data on / from a rewritable optical disk having the data format sector structure described above.
- the conventional optical disk device when performing data recording / reproduction on a predetermined sector 1001, first, discriminating the address information from the header area 1002, the disk of the predetermined sector 1001 is discriminated. From the time when the above error detection circuit detects that there is no error in the address information part to which the error detection code is added, that is, the pattern of (address information + error detection code), The timing for actually performing recording or reproduction in the data recording area 1003 is generated.
- At least one address area of a plurality of address areas of the sector has address information error detection code data, That is, at least one There was no error in the pattern of (dress information + error detection code) as a condition for recording in the sector. That is, if there is an error in the pattern of (address information + error detection code) in all the address areas of the sector for which recording is to be performed, it is determined that the sector is defective and recording is not performed on that sector. The process of alternate recording in the sector was performed.
- the sector synchronization is performed in the sector. Correction of the counter cannot be performed, and at least one of the immediately preceding counters uses the output of the sector synchronization counter corrected in the sector in which no error was detected in the pattern of (address information + error detection code).
- the timing required for the data reproduction operation is generated by interpolation.
- a correction operation of the sector synchronization counter is performed at a timing when it is detected that there is no error in at least one address area of each sector, and a timing necessary for recording or reproducing data is generated. Therefore, if there is an error in all address areas of the sector where data is to be reproduced, timing generation must be performed by interpolating at the timing obtained from a sector without errors in the immediately preceding address area. was there. For this reason, there was a problem in the accuracy of the data reproduction timing.
- the timing signal required for the operation of detecting the beginning of data such as the above-mentioned pre-sync detection window signal, is shifted, and the pattern is not detected. Detection ⁇ There was a risk of leading to false detection. In the worst case, multiple frames at the beginning of a sector are missing. This can cause a fatal problem that data cannot be corrected and data cannot be reproduced.
- the operation of recording AV data on an optical disk is Real-time property, that is, a predetermined transfer rate is required.
- the operation of recording computer data on an optical disk which is handled by a conventional personal computer, does not always require real-time operation. The occurrence of data errors is unacceptable because it may have a fatal effect on the data.
- the types of data errors include data errors and address information. Two types of errors are expected.
- the conventional device has adopted the concept of assuring the quality of recorded data by performing verification.However, by performing the verification process, the normal recording sequence execution time becomes longer. There is a problem.
- the conventional apparatus does not record data in a sector in which an error of a predetermined level or more is detected in the address information. Further, it is common practice to record data in the sector as described above by a retry process. However, the recording retry process or the replacement process for the same sector increases the recording sequence execution time, and thus reduces the data transfer rate during recording. Disclosure of the invention
- the present invention provides an optical disk recording and reproducing method for reliably recording and / or reproducing data even when an error rate of an address area of a sector is deteriorated while minimizing a decrease in recording throughput.
- Z or a reproducing apparatus and a method thereof, and an information recording system and a method using the same are provided. The purpose is to provide.
- an optical disk recording and Z or reproducing apparatus of the present invention has a sector structure including a header area in which address information is recorded in advance and a data recording area in which data is recorded. Is an optical disc having an address mark portion in which an address mark indicating the beginning of address information is recorded, an address information portion in which the address information is recorded, and an error detection portion in which an error detection code for detecting an error in the address information portion is recorded.
- an optical disk recording and Z or a reproducing apparatus for recording data in the data recording area and reproducing data from the data recording area or Z
- Means for detecting an address mark recorded in the address mark portion of the sector
- the address mark detection timing of the address mark detection means is used.
- the data recording and Z or reproduction determination control means includes: an address information error detection means for detecting presence or absence of an error in the address information from the address information and the error detection code; Data recording, Z or reproduction operation is performed by using the timing at which the address mark is detected by the address mark detecting means and the timing at which the address information error detecting means detects that there is no error in the address information. Timing generation means for generating a recording and Z or reproduction timing signal for determination.
- the data recording and Z or reproduction determination control means performs the following two cases when recording data in the data recording area of a predetermined sector and reproducing data from Z or the data recording area. :
- the address information is stored in a predetermined number of sectors before the sector.
- the error detection means As a result of error detection performed by the error detection means, at least one address information in which no error is detected is obtained, and at least one address mark is detected in the address mark part of the sector, data recording and data recording are performed only. Z or reproduction is allowed.
- the optical disk recording and Z or reproducing method of the present invention has a sector structure including a header area in which address information is recorded in advance and a data recording area for recording data, and the header area has address information.
- the above-described data recording is performed on an optical disc including an address mark portion in which an address mark indicating the start is recorded, an address information portion in which address information is recorded, and an error detection portion in which an error detection code for detecting an error in the address information portion is recorded.
- the data recording determination control step includes: an address information error detection step of detecting presence / absence of an error in the address information from the address information and the error detection code; and the address mark is detected.
- the recording and / or reproducing timing signal for determining the data recording and / or reproducing operation is determined by using the detected timing and the timing at which the address information has no error in the address information error detecting step.
- a timing generating step of generating is
- the information recording system of the present invention provides a transfer rate priority data supplied from an external device to an optical disc having a sector structure including a header area in which address information is recorded in advance and a data recording area for recording data. And an information recording system for recording information in which the data and the transfer rate non-priority data are mixed.
- Data is recorded in the data recording area in a predetermined sector of the optical disk.
- Determining means for determining whether information to be recorded on the optical disc is transfer rate priority data or transfer rate non-priority data
- the optical disc drive When the information to be recorded is the transfer rate priority data, the optical disc drive performs the recording even if the address information has an error equal to or more than a predetermined criterion in the sector where the recording is to be performed. In some cases, the recording retry process is performed if there is an error exceeding a predetermined standard in the sector to be recorded.
- the data discriminating means interprets a transfer rate priority data issued from an external device to the optical disk drive as a command or a command handling transfer rate non-priority data, or Whether the mode is the transfer rate priority data or the mode that handles the transfer rate non-priority data set from the device to the optical disk drive or the mode that handles the transfer rate non-priority data is used to determine whether the data is transfer rate priority data or non-priority data. It is characterized by.
- the information recording method of the present invention is directed to an optical disc having a sector structure including a header area in which address information is recorded in advance and a data recording area for recording data, the data supplied from an external device being written in the data recording area.
- the information recording method includes a step of detecting an address mark recorded in the address mark portion of the sector, and a step of determining and controlling a data recording period in the data recording area of the sector. In the determination control of the data recording period, the timing of the address mark detection is used.
- the data recording determination control step includes the address information and the error detection.
- An address information error detection step for detecting the presence or absence of an error in the address information from a code; a timing at which the address mark is detected; and a timing at which no error is detected in the address information in the address information error detection step.
- the data recording start timing or the data reproduction start timing can be determined from the timing at which the address mark is detected. Even in a certain sector, accurate recording or reproduction can be performed, and the reliability of the device can be improved.
- the optical disk recording device or the optical disk reproducing device of the present invention it is possible to obtain error-free address information in a predetermined sector by determining whether or not the capability of recording or reproducing data in a predetermined sector. Or that error-free address information is obtained in at least a certain sector up to a predetermined sector before the sector and that an address mark is detected in the sector.
- the sector synchronization timing correction in the sector data is recorded or reproduced only in the sector where accurate timing can be generated, and the reliability of the device can be improved.
- the optical disc recording method of the present invention it is determined whether the data is data of a transfer rate priority or data in which an error cannot be tolerated, and the data recording process of the transfer rate priority is performed only on the data of the transfer rate priority. Therefore, it is possible to respond finely to the performance of the equipment required for each data.
- FIG. 1 is a block diagram showing an example of a configuration of an optical disc device according to the present invention
- FIG. 2 shows one configuration of a data format in a sector of the optical disc according to the present invention. Diagram showing an example,
- FIG. 3 is a block diagram showing an example of the internal configuration of the timing generation means 114 according to an embodiment of the present invention and one configuration around it.
- m 4 (a), (b), (c), (d), (e) is a timing diagram for explaining an example of the count value correction operation of the sector synchronization counter 202 in one embodiment of the present invention
- m 6 (a), (b), (c), (d), (e) is a timing diagram for explaining an example of the count value correction operation of the sector synchronization counter 202 in one embodiment of the present invention
- FIGS. 7 (a), (b), (c), (d), (e), (f) are timing diagrams for explaining the operation of the count value decoding means 203 in one embodiment of the present invention.
- FIG. 8 is a block diagram showing an example of the internal configuration of the timing generation means 114 in the embodiment of the present invention and one configuration around it.
- FIGS. 9A, 9B and 9C are timing charts for explaining the operation of the count value decoding means 303 in one embodiment of the present invention.
- FIG. 10 is a block diagram showing an example of the internal configuration of the timing generation means 114 in one embodiment of the present invention and a configuration around it.
- FIG. 11 (a), (b), (c), (d), (e), (f), (g), (h), (i) are sector synchronization counters in one embodiment of the present invention.
- FIG. 12 is a timing chart for explaining an example of a count value correcting operation of 402,
- FIG. 12 is a flow chart for explaining data recording Z reproduction processing in one embodiment of the present invention,
- FIG. 13 is a block diagram showing an example of the configuration of an information recording system according to the present invention
- FIG. 14 is a flowchart for explaining data recording processing in one embodiment of the present invention
- FIG. FIG. 16 is a flowchart for explaining data recording processing in the embodiment.
- FIG. 16 is a flowchart for explaining data discrimination processing in one embodiment of the present invention.
- FIG. 17 is a data recording processing in one embodiment of the present invention.
- FIG. 18 is a diagram showing a configuration example of a data format in a sector of a conventional optical disc. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 is a block diagram showing a configuration of an optical disk device (also referred to as a disk drive) according to the present invention.
- a disk motor 102 rotates an optical disk 101 at a predetermined rotation speed.
- the optical pickup 103 incorporates a semiconductor laser, an optical system, a photodetector, and the like (not shown).
- the laser light emitted from the semiconductor laser is collected by the optical system, and the recording surface of the optical disc 101 is recorded.
- the data is recorded / reproduced by irradiating a light spot to the light.
- the reflected light from the recording surface is collected by an optical system, converted into a current by a photodetector, further converted and amplified by an amplifier 104, and output as a reproduction signal.
- the servo circuit 105 controls the rotation of the disk motor 102, the transport control that moves the optical pickup 103 in the radial direction of the optical disk 101, and the focus control that focuses the optical spot on the disk recording surface. Perform tracking control for tracking the light spot at the center of the target track.
- the focus control and the tracking control use a focus error signal and a tracking error signal among the reproduction signals output from the amplifier 104.
- the focus error signal is an electric signal indicating a defocus shift of the light spot from the recording surface of the optical disc 101, and the tracking error signal indicates a shift of the light spot from a predetermined track of the optical disc 101. It is an electric signal.
- the reproduction signal processing unit 106 extracts a signal component corresponding to the data recorded on the optical disc 101 from the reproduction signal, binarizes the extracted signal, and converts the binarized data and the reference clock into a built-in signal.
- PLL short for Phase Locked Loop: phase locked loop
- a read clock is generated, and read data synchronized with the read clock is reproduced.
- the laser drive unit 108 drives the laser so that the semiconductor laser incorporated in the optical pickup 103 emits light with the power for reproduction when reproducing address and user data and with the power for recording when recording data. Generate a signal.
- the format encoder / decoder 107 reads the read clock and the read data output from the reproduction signal processing unit 106 into an adder recorded on the optical disc 101.
- the address information is reproduced, and various timing signals necessary for recording and reproduction are generated and supplied at a timing synchronized with the sector of the optical disk 101 based on the reproduced address information position.
- Examples of the timing signal include: outputting a timing signal such as a read gate signal necessary for binary address / PLL processing to the reproduction signal processing unit 106 during reproduction; By outputting a timing signal such as a write gate signal that permits light emission of recording power to the unit 108 during recording, data recording / reproducing processing can be performed at correct timing.
- the address mark detection unit 111 detects an address mark (AM) recorded in the address area using the read clock and read data supplied from the reproduction signal processing unit 106.
- the demodulation unit 112 demodulates address information and user data using the read clock and read data supplied from the reproduction signal processing unit 1 • 6.
- the address error detection unit 113 detects an error in the address information (address demodulated data) demodulated by the demodulation unit 112.
- the timing generation section 114 uses the address mark detection timing signal from the address mark detection section 111 and the timing signal from the address error detection section 113 to detect that there is no error in the address information. Synchronize with the clock and generate the timing signal necessary for recording and reproducing data. The details of the operation of the above-described portion will be described later.
- the format encoder Z decoder 107 adds redundant data parity such as an error correction code to user data supplied from the outside of the apparatus through the host interface 109, and the built-in modulation unit 1
- write data modulated according to a predetermined format is output to the laser driving unit 108.
- demodulation of data recorded on the optical disk 101 is performed based on the read clock and read data output from the reproduction signal processing unit 106, error correction processing is performed, and the corrected data is transmitted. It is sent out of the device through the host interface 109.
- the system controller 110 interprets commands (commands) supplied from outside the device through the host interface 109 and records / reproduces data to / from a predetermined sector of the optical disc 101. So, the servo circuit 105, the reproduction signal The operation of the signal processing unit 106, the format encoder / decoder 107, the laser drive unit 108, and the host interface 109 is controlled.
- timing generation unit 114 In the following, the configuration and operation of the timing generation unit 114 and its surroundings, which are features of the present invention, will be described using a plurality of examples.
- the optical disc 101 has a data format as shown in FIG.
- a predetermined number of bytes as shown in the figure is allocated to each area of the data format shown in FIG. 18 described in the related art.
- 1 byte is 8 bits of binary data
- the length of 16 channels is the length of the modulated pattern.
- the length of one sector is 2697 bytes
- the length of the header area 1002 is 130 bytes.
- the parameter J used to represent the length of the gap area 106 and the buffer area 101 is an integer from 0 to 15, and the byte between the gap area and the buffer area. The sum of the numbers is 3 5 (—constant). Also, the parameter K used to represent the length of the front guard area 1 0 7 and the rear guard area 1 0 1 2 is
- each address mark part (AM) of each address area part has three bytes (ie,
- ⁇ 000100010000000000000100010001000000000000010001 ⁇ is recorded. It consists of ⁇ 4 T mark ⁇ 4 T space ⁇ 14 T mark ⁇ 4 T space ⁇ 4 T mark ⁇ 14 T space ⁇ 4 T mark] in NRZI notation.
- the length of the code is long because it contains one 14T mark and one 14T space, each of which has a length of (Tmax + 3T), and an 8/16 RLL (2,10) modulation code is used as the modulation code. It is unlikely that the address information PID, error detector IED, and data area 11010 patterns will be erroneously detected as this address mark.
- DSV is an abbreviation of Digital Sum Value, which is the sum of a certain pattern, with coded data 1 set to +1 and coded data 0 set to 1, and the DC component of the codeword is calculated as It is used as a measure to measure the effect on the reproduction system such as binary data.
- the address error detection unit 113 detects that there is no error in the pattern of the address information (address information + error detection code)
- the data is actually recorded or recorded in the data recording area 1003.
- a basic operation for generating a timing signal to be reproduced will be described. This is performed using a counter that counts a clock having a cycle of one channel bit or a cycle that is an integral multiple thereof, for example, as in the prior art.
- the above-described counter is a sector synchronization counter that counts 2697 bytes in length of one sector, and is corrected to a predetermined count value when the error detection circuit detects no error. Since the data format shown in FIG. 2 has a plurality of address areas, when the number of the address area in the sector can be identified by the additional information included in the address information, a separate count value is set. Will be corrected.
- the count value output from the sector synchronization counter can represent the byte position from the head of the sector almost exactly. Therefore, the recording start timing of the sector to be recorded and the reproduction start timing of the sector to be reproduced can be generated using the output of the sector synchronization counter.
- a recording gate signal is generated so as to be H level in a period from a front guard area 1007 to a rear guard area 1012 of a sector to be recorded and is used for controlling a recording operation of a recording system of the apparatus.
- the start position of the front guard area 1007 is (140 + J / 16) bytes after the start of the sector, and the end position of the rear guard area 1012 is (26 72 + J / 16). is there.
- the force value of the sector synchronization counter is (140 + JZ16) in bytes, that is, 16 When it becomes double (2240 + J), it is set to H, and the count value of the sector synchronous counter is the number of bytes (2672 + JZ16), that is, 16 times the number of channel bits (4
- the recording gate signal can be generated by using a logic circuit that drops to L when it reaches 2 7 5 2 + J).
- an offset value may be provided for the above-described count value in order to bring the recording gate signal to the H level earlier in anticipation of a circuit delay or the like of the recording system.
- a presync detection window signal that is at H level in at least the presync code area 1109 of a sector from which data is to be reproduced is generated and used for the presync detection operation of the device.
- the end position of the pre-sync code area 1 009 is from the beginning of the sector (1 98 + K
- the pre-sync is assumed to be a perfect match detection of a 3-byte pattern, and in order for the pre-sync detection window signal to be able to detect the pre-sync during the H level period regardless of the value of J and K, at least 1 Generates a pre-sync detection window signal that is H level during the period from 9 bytes after the maximum value of K 7 and the maximum value 15 of J are substituted (205 + 15/16) bytes There is a need.
- the H level period may be set to some extent wider by shifting the time position of the presync detection window in anticipation of processing delays such as circuit delays in the reproduction system, or by considering fluctuation factors such as linear velocity fluctuation.
- the H-level end position may be set to be later by a predetermined number of bytes because it is used not only for detecting the pre-sync but also for detecting the sync code of the first frame of the data area 11010.
- the H level period of the pre-sync detection window may be set to a width other than the above.
- FIG. 3 is a block diagram showing an example of the configuration of the timing generation unit 114 and its surroundings in one embodiment of the present invention. The operation will be described in detail with reference to FIG. First, the address mark detection unit 111 records in each address mark unit (AM) shown in FIG. 2 using the read dock RCLK and the read data RD supplied from the reproduction signal processing unit 106. Address mark pattern is detected. The AM detection pulse AMDP is output at the timing when the clock is detected.
- AM address mark unit
- the demodulation unit 112 includes address information error detection encoded data corresponding to the address information and the error detection code recorded in the address information unit (PID) and the error detection unit (IED). , (Address information + error detection code) are demodulated using the read clock RCLK and the read data RD, and the address demodulated data ADMD is output.
- the demodulation unit 112 refers to the AM detection pulse MDP as the generation timing, and based on the timing of the AM detection pulse AMDP. Demodulation is started using the subsequent read data RD corresponding to (address information + error detection code).
- the address error detector 113 detects whether there is an error in the pattern of (address information + error detection code) using the address demodulated data ADMD, and outputs a CRCOK pulse (CRC0K) if there is no error. I do.
- (address information + error detection code) data is composed of a total of 6 bytes, of which 2 bytes error detection code is code using a well-known Reed-Solomon code. If so, it is possible to easily detect whether there is an error in the data of a total of 6 bytes by performing a known syndrome calculation.
- the timing generation unit 114 shown in FIG. 3 has a function of generating a timing signal such as a write gate signal WGS necessary for data recording.
- the reference clock generation unit 201 and the sector synchronization counter 200 are provided. 2. It is composed of a count value decoder 203 and a count value corrector 204, and each function block will be described below.
- the reference clock generation unit 201 generates a reference clock REFCLK serving as a reference for recording data.
- one cycle of the reference clock is one channel bit cycle of the data format shown in FIG.
- a method of generating the reference clock REFCLK by the reference clock generation unit 201 a plurality of methods can be considered depending on the track format of the optical disc 101.
- the jitter component of the clock may affect the recording quality. Therefore, it is necessary to suppress the jitter component of the reference clock REFCLK to the extent that the recording quality is not degraded.
- the reference clock generating means 201 includes a means for reproducing the pattern formed on the optical disk as described above, and a PLL means for generating a clock synchronized with the reproduced pattern. Steps are required.
- the sector synchronization counter 202 is a counter that counts the reference clock REFCLK so that the count value indicates a byte position in one sector.
- the count value correcting means will be described later.
- the count value of the sector synchronization counter 202 indicates the number of channel bits from the head of each sector, and the count value is output as the counter output CT0.
- the count value decoder 203 synchronizes with the sector data format by decoding the counter output CT0 output from the sector synchronization counter 202.
- Various timing signals are generated.
- the example of FIG. 2 shows a case where a data recording command RECC0M input via the host interface 109 is received from the system controller 110, and the count value decoder 203 writes light to the laser driver 108.
- a modulation signal WGS is output, and an enable signal ENBL required for performing modulation is output to the modulation section 115. Details of the timing signal generation will be described later.
- the count value correction unit 204 receives the address mark detection pulse P output from the address mark detection unit 111 and the CRCOK pulse output from the address error detection unit 113 indicating that there is no error.
- the count value correction pulse CCP and the count correction value CCV are output to the sector synchronization counter 202.
- FIG. 4 shows the timing for explaining the operation of correcting the count value of the sector synchronization counter 202 in this embodiment.
- the top of the figure shows the details of the data format of the header area 1002 in one sector, in other words, the position where the light spot follows a predetermined sector on the optical disk. It is assumed that time flows from left to right.
- the address mark detection pulse AMDP output from the address mark detection unit 111 is output as a pulsed H level at the timing when the address mark is detected by the reproduction of each address mark unit (AM), as shown in the figure, Are output as AMDP-a, AMDP-b, AMDP-c, and AMDP-d with a delay of about n1 delay channel bits from the tracking position of the light spot (the end position of each address mark AM).
- n 1 is the AM detection pulse from the irradiation of the end position of the address mark part of the optical spot.
- the CRCOK pulse output from the address error detector 1 13 has its playback data demodulated by the playback of each address information section (PID) and error detector (IED), and furthermore, an error has been detected in the address demodulated data. As a result, if there is no error, a pulsed H-level CRCOK is output, so that OK-a,
- the signals are output as OK-b, OK-c, and OK-d with a delay of about n2 channel bits from the light spot tracking position (end position of each IED section).
- n 2 represents the number of delay channel bits from the time of irradiation of the IED section end position to the output of the CRCOK pulse after error detection of the light spot.
- the count value correction pulse CCP is an H-level pulse signal generated by the count value correction unit 204 using the AM detection pulse AMDP and CRCOK pulse, and as shown in the figure, each AMDP-a, AMDP-b, AMDP -c, CCP-ma, CCP-mb, CCP-mc, CCP-md corresponding to AMDP-d CCP-ea, corresponding to OK-a, OK-b, OK-c, OK-d CCP-eb, CCP-ec and CCP-ed are generated and used for the timing to correct the count value in the sector synchronization counter 202.
- the count correction value CCV takes a predetermined value for each position of the AM detection pulse AMDP and the CRCOK pulse.
- the values are represented by the address mark part AMa and the error detection part IEDa of the first address area 1004a, the address mark part AMb of the second address area 1004b and the error detection part AMb. Division IED b, third address area 1 0
- the address mark part AMc and the error detection part IEDc of the fourth address area 104c In each of the address mark part AMc and the error detection part IEDc of the fourth address area 104c, the address mark part AMd and the error detection part IEDd of the fourth address area 104d, A, B; C, D; E, F; G, H. Since the count correction value CCV is output to the sector synchronous counter 202 together with the count value correction pulse CCP, it must be determined at each H pulse portion of the count value correction pulse CCP.
- each sector output AM detection pulse AMDP or CRC ⁇ K pulse power;
- To determine which address area it belongs to for example, specify a bit pattern that can specify which address area corresponds to Please refer to it.
- a code that can identify the order of the address area is assigned as additional information to a specific bit in the address information section (PID), so that it can be easily identified by using the code.
- each count value correction pulse The power point correction value CCV for each CCP, that is, the values from A to H, are set to the following values to completely synchronize the irradiation position of the light spot and the value of the sector synchronization counter. Good.
- n 3 is the number of delay channel bits from the output of the AM detection pulse AMDP or CRCOK pulse to the completion of correction of the count value of the sector synchronization counter 202.
- the count value of the sector synchronization counter 202 can be corrected by using the AM detection pulse AMDP, which is the address mark detection timing, and the CRCQK pulse, which is the timing when it is detected that there is no error in the address information. Is possible.
- the counter output CT0 after the count value correction operation can accurately represent the irradiation position of the light spot at that time, that is, the number of channel bits from the head of the sector.
- the deviation between the counter output CT0 and the irradiation position of the light spot at the end of one sector is caused by fluctuation factors such as the rotation speed deviation, linear velocity fluctuation due to disk eccentricity, and reference clock frequency fluctuation. Even if the error occurs, it is possible to correct the displacement of each sector by correcting the count value in the header area 1002 of the next sector, and to adjust the data recording / reproducing timing accurately. And the reliability of the device can be kept high.
- the feature of the present invention is that the count value of the sector synchronization counter 202 is corrected using the AM detection pulse P which is the address mark detection timing.
- the AM detection pulse P which is the address mark detection timing.
- ⁇ and X drawn immediately below the data format of the top header area 1002 indicate that all the address marks are detected in the address mark portions AMa, AMb, AMc, and AMd, respectively. This indicates that errors were all detected in the error detectors I EDa, I EDb, I EDc, and I EDd. Therefore, the AM detection pulse AMDP is output after a predetermined period of n1 channel bit periods from the end of each address mark portion as in the example of FIG. Also, unlike the example in Fig. 4, the CRCOK pulse does not output an H pulse in the sector shown, but remains at the L level (indicated by the dotted line).
- the count value correction pulse CCP outputs the H pulse only when it corresponds to the output of the AM detection pulse AMDP.
- the count correction value CCV takes a predetermined value for each position of the output AM detection pulse AMDP. That is, address mark part AMa, A
- Mb, AMc and AMd are A, C, E and G.
- the present embodiment exhibits the following effects. That is, according to the configuration shown in the present embodiment, even in a sector in which all address information has an error, if the address mark is detected, the count value of the sector synchronization counter 202 is corrected using the AM detection pulse AMDP. It is possible to follow Thus, regardless of the presence or absence of an error in the address information, it is possible to correct the misalignment of each sector, to accurately adjust the data recording / reproducing timing, and to maintain high reliability of the device.
- FIG. 6 is a diagram illustrating a third example of the count value correction operation of the sector synchronization counter 202 according to the present embodiment.
- the operation example in this figure is characterized in that once the count value correction accompanying the CRC OK pulse is performed, the count value correction by the address mark detection timing is not performed as described below.
- ⁇ and X which are drawn immediately below the details of the data format of the top header area 1002, indicate that all the address marks are detected in the address mark portions AMa, AMb, AMc, and AMd, respectively.
- ⁇ In each error detector, it is shown that an error was detected for IEDa and IEDb (X) and no error was detected for IEDc and IEDd ( ⁇ ). Therefore, as in the example of Fig. 5, the AM detection pulse AMDP outputs H pulses at four locations (shown as AMDP-a, AMDP-b, AMDP-c, and AMDP-d). Also, unlike the example in Fig. 5, the CRC ⁇ K pulse outputs H pulses only in the latter two places in the illustrated sector (indicated by OK-c and OK-d).
- the count value correction pulse CCP has three AM detection pulses AMDP corresponding to the address mark parts AMa, AMb, and AMc.
- the timing of AMDP (indicated by CCP-ma ⁇ CCP-mb and CCP-mc), and the error detection part I H pulses are output at a total of five points of the two CLOCK pulse timings (indicated by CCP-ec and CCP-ed) corresponding to ED c and I ED d.
- the force correction value CCV takes a predetermined value shown in FIG. 4 for each position, that is, the values of A, C, E, F, and H in order from the front.
- the count value at the timing corresponding to the AM detection pulse AMDP Do not output the correction pulse CCP.
- the count value corresponding to AMd; ffi Positive pulse CCP (shown by a dotted line) is not output.
- the sector synchronization counter 202 can always be synchronized based on the CRCOK pulse timing ( This example In this case, CCP-ec and CCP-ed are used), but only in the sector where only the address mark is detected, the sector synchronization counter 202 can be synchronized based on the AM detection pulse AMDP timing.
- the address mark AM is generally used.
- the same pattern is used for all patterns, and the order of a plurality of address areas can be determined by looking at a specific bit in the address information section.
- the CROCK pulse has a higher degree of location identification reliability than the AM detection pulse AMDP.
- the address mark detection timing By not performing count value correction and synchronizing based on the CRCOK pulse timing, the data recording / reproducing timing can be adjusted more accurately, and the reliability of the device can be kept high. .
- FIG. 7 is a timing chart for explaining the timing signal generation operation of the count value decoder 203 in the present embodiment.
- the count value decoder 203 Upon receiving the recording command RECC0M at the time of data recording as described above, the count value decoder 203 outputs the laser drive unit 108 write gate signal WGS, and the modulation unit 115 is required to perform modulation. It outputs various enable signals ENBL, that is, a VFO enable signal ENBLa, a data enable signal ENBLb, a post-enable signal EMBLc, and a sync code enable signal ENBLd.
- a write gate signal WGS is a gate signal for permitting the laser driving unit 108 to emit laser light for recording.
- Inadvertent recording operation by enabling emission of recording laser power only when the write gate signal WGS is at H level, and prohibiting emission of high laser power during playback (at L level). Can be eliminated. It is also possible to control the operation on / off of a high-frequency module (not shown) built in the laser driver 108 by the write gate signal WGS. In other words, by superimposing a high frequency on the laser power only during reproduction, laser noise can be reduced and the reproduction signal S / N ratio can be improved.
- Count value decoder 2 03 decodes the counter output CT0 from the sector synchronization counter 202 in the sector to be recorded, and outputs the write gate signal WGS to the counter output CT0 from c1 as shown in Figs. 7 (a) and (b). Set to the H level during the value up to (c 6-1). As a result, it is possible to emit light with the recording laser power only from the head of the sector to be recorded to the c1 channel bit color to the c6 channel bit.
- the VF enable signal ENBLa shown in FIG. 7C is a timing signal that prompts the modulator 115 to output a pattern corresponding to the front guard area 1007 and the data VFO area 1008.
- a continuous pattern of 4T mark / 4T space is recorded in the above area, so that the modulator 115 sums the above patterns during the period when the VFO enable signal ENBLa is at the H level ( Operates to output 55 + K) bytes.
- the count value decoder 203 sets the VFO enable signal ENBLa to the H level while the counter output value is from c2 to (c3 ⁇ l) by decoding the counter output CT0 in the sector that performs recording.
- the data enable signal ENBL b shown in Fig. 7 (d) is applied to the modulation section 115 by the pre-sync code area 1009, data area 1010, and data post-amble area 10
- the modulator 1 15 first outputs the pre-sync code pattern for 3 bytes, and then outputs the data in the data area corresponding to the sync frame including the sync code and the modulation data. Is output for a total of 2418 bytes, and finally the data postamble pattern is output for one byte.
- one sync frame in the data area is composed of a total of 93 bytes including a 2-byte sync code and 91-byte modulation data, and a 93-byte sync frame is 26 frames ( That is, 2418 bytes) are output.
- the count value decoder 203 sets the data enable signal ENBLb to the H level while the counter output is a value from c3 to (c4-1) by decoding the counter output CT0 in the sector for recording.
- the sync code enable signal ENBL d shown in Fig. 7 (f) is used to control the sync code addition and the acquisition of the pre-modulation data PMD and the data modulation operation. That is, the modulation section 115 has a data enable signal ENBL b and a sync code enable signal. When both ENBL d are at the H level, a pattern corresponding to the sync code is output, and the data enable signal ENBL b is at the H level and the sync code enable signal ENBL d is at the L level. It operates to acquire and modulate and output a modulation data pattern.
- the count value decoder 203 decodes the counter output CTO in the sector to be recorded, and outputs the sync code enable signal ENBLd to the counter output by two bytes of H from the value of (C3 + 93 ⁇ 16XS). Outputs a pulse.
- S is an integer from 0 to 25. Therefore, a 2-byte H pulse is output 26 times, the same as the number of frames.
- the rear guard enable signal ENBLc shown in FIG. 7E is a timing signal that prompts the modulation section 115 to output a pattern corresponding to the rear guard area 1012.
- the modulation section 115 performs the above pattern during the period when the rear guard enable signal ENBLc is at the H level.
- the count value decoder 203 decodes the counter output CT0 in the recording sector, and sets the rear guard enable signal ENBLd to the H level while the counter output is a value from c4 to (c5-1).
- the VFO enable signal ENBLa and the rear guard enable signal ENBLd are different signals.
- the modulation section 115 outputs when either of them is active. Since the patterns are the same, they can be shared and used as a single timing signal.
- the decode values corresponding to the rise / fall of each timing signal that is, the values of c 1 to c 6 may be set as follows, for example.
- n 4 takes into account the circuit delay in the modulation section 115 and the laser drive section 108 and the delay time until the light spot is actually irradiated on the recording film of the optical disc 101.
- Channel bit number the delay time until the irradiation of the light spot can be canceled, so that the recording position can be determined accurately. Is possible.
- the recording power exceeds the reproducing power in a predetermined section of the gap area 106. It is the 132nd byte from the top of the sector to allow power emission. In an apparatus that does not require such a preparatory laser emission period immediately before recording, the value of c1 should be set so that the recording power can be emitted up to the beginning of the front guard area 107. Good.
- J and K are random parameters for suppressing the deterioration of the recording film, as described in the related art. It is preferable to provide a means for randomly selecting, for example, J as an integer from 0 to 15 and K as an integer from 0 to 7 for each sector.
- FIG. 8 is a timing generation section for data reproduction according to the second embodiment of the present invention.
- FIG. 2 is a block diagram showing a configuration example of 114 and its surroundings.
- the address mark detection unit 111, the demodulation unit 112, and the address error detection unit 113 have the same functions as those described in FIG. 1 and FIG. The explanation is omitted.
- the timing generation unit 114 in FIG. 8 has a function of generating a timing signal such as a read gate signal RGS required for data reproduction, and includes a reference clock generation unit 301 and a sector. It is composed of a synchronous counter 302, a count value decoder 303, and a count value correction unit 304. Each functional block is described below.
- the reference clock generation unit 301 generates a reference clock REFCLK2 serving as a reference for data reproduction.
- REFCLK2 serving as a reference for data reproduction.
- one cycle of the reference clock is a 4-channel bit cycle of the data format shown in FIG.
- a plurality of methods can be considered depending on the track format of the optical disk 101.
- the description is omitted.
- the reference signal REFCLK2 is used to generate a timing signal required for data reproduction, it is only necessary that the frequency be in accordance with the linear velocity. Therefore, the read clock RCLK output from the reproduction signal processing unit 106 may be shared as the reference clock REFCLK2.
- the sector synchronization counter 302 is a counter that counts the reference clock REFCLK2 so that the count value indicates a byte position in one sector. According to the data format shown in Figure 2, one sector is 2697 bytes long, or 2697 bytes.
- the reference clock REFCLK2 is a clock having a 4-channel bit period
- 2697 X 16 + 4 107
- the 88-clock period is one sector long, it counts from 0 to 10787, and after the 0 It can be configured by a 14-bit loop counter that returns to
- the count value correction unit 304 receives the AM detection pulse AMDP from the address mark detection unit 111 and the CRCOK pulse from the address error detection unit 113, and converts the count value correction pulse CCP2 and count correction value CCV2 into the sector synchronization counter 302. Output to
- the count value of the sector synchronization counter indicates the position from the head of each sector in 4-channel bits, that is, in 0.25 byte units, and the count value is output to the outside as the counter output CT02. Is output.
- the count value decoder 303 decodes the counter output CT02 from the sector synchronization counter 302 to obtain various types of data synchronized with the sector data format. Generate an imaging signal.
- a playback command REPC0M is received from the system controller 110 during data playback
- a read gate signal RGS is output to the playback signal processing unit 106, and the pre-sync code detection and data demodulation are sent to the demodulation unit 112.
- FIG. 9 is a timing chart for explaining the timing generation operation of the count value decoding unit 303 in the present embodiment.
- a read gate signal RGS is a gate signal for permitting the reproduction signal processing unit 106 to perform binarization of the reproduction signal and a PLL operation synchronized with the binarized data. Only when the read gate signal RGS is at the H level, by performing operations such as binarization and PLL, it is possible to eliminate unnecessary reproduction operation in a portion where data is not recorded. This is effective for stabilizing the read clock and reducing power consumption.
- the count value decoder 303 decodes the counter output CT02 shown in FIG. 9 (a) in the sector where data is reproduced, and outputs the read gate signal RGS shown in FIG.
- the sync detection window signal WNS shown in FIG. 9 (c) is a window signal for permitting the demodulation means 112 to detect the presinter code pattern and ⁇ or the first frame sync code pattern in the data area. is there.
- the sync code can be detected within an appropriate range by detecting the pre-sync and the first frame sync only when the sync detection window signal S is at the H level, and the sync code is incorrectly detected. And non-detection can be prevented.
- the demodulation unit 112 starts detection of the pattern of the pre-sync code and the sync code of the first frame. Start the data demodulation operation. As for the frame sync detection of the second and subsequent frames, a window for detecting the frame sync following the detection timing of either the pre-sync code or the first frame sync code is generated, and the sync detection within the above window is performed. Action to take And If no frame sync code is detected in a certain frame, interpolation is performed from the immediately preceding sync detection timing.
- the pre-sync code and first frame sync code detection operations are performed. It stops and generates the sync detection window of the second frame at a predetermined timing, for example, the falling timing of the sync detection window signal WNS, and performs the interpolation operation. It goes without saying that the data demodulation of each frame is performed using the sync detection timing or the interpolated sync timing.
- the detection operation of the pre-sync code pattern and the detection of the first frame sync code in the Z or data area is controlled using the sync detection window signal WNS, and the detection timing after the detection timing of any of the above patterns is controlled.
- frame synchronization can be efficiently and stably secured, and data can be reproduced with high reliability.
- the position of the pre-sync code area since the recording position is randomly shifted using the parameters J and K, the position of the pre-sync code area, in other words, the data The start position of one frame changes randomly within the range of 8 bytes. Therefore, it is very important to generate the sync detection window signal WNS at an appropriate position using the timing generation section 114 having the sector synchronization counter 302 as described above.
- the decode value corresponding to the rise and fall of each timing signal From 7 to c 10, for example, the following may be set.
- w is a parameter for determining the window width of the sync detection window signal WNS.
- the window width is 8 w channel bits. Since the sector synchronization counter 302 in this embodiment expresses the count value in units of 0.25 bytes, the parameters of c7 to c10 are of the format (number of bytes X 4). It is represented by
- the pre-sync code is almost at the center of the sync detection window signal WNS.
- the end position of the area 1 009 is set. In order to be able to detect the pre-sync code wherever the recording position is in the random shift range (8 bytes), it is necessary to set w so that at least 8 w> 8 X 16.
- w is set to 2 It is desirable to set it to 0 or more. If w is made larger than necessary, the window width becomes too wide and erroneous detection increases, so an appropriate value is set by experiments and the like.
- FIG. 10 is a block diagram showing a configuration example of a timing generation section 114 and its periphery according to the third embodiment of the present invention.
- the address mark detection unit 111, demodulation unit 112, address error detection unit 113, and modulation unit 115 have the same functions as those described in FIGS. 1, 3, and 8. And the description is omitted here.
- the timing generation section 114 in FIG. 10 has a function of generating various timing signals necessary for recording and reproducing data, a reference clock generation section 401, a sector synchronization counter 402, It is composed of a count value decoder 4 • 3, a count value corrector 404, and a recording / reproducing controller 405. The operation of each functional block is described below.
- the reference clock generation unit 401 generates a reference clock REFCLK3 serving as a reference for recording and reproducing data.
- the cycle of the reference clock REFCLK3 is the data format one-channel bit cycle shown in FIG.
- the sector synchronization counter 402 counts the reference clock REFCLK3 so that the count value indicates the byte position in one sector.
- the count value decoder 403 when receiving the read enable signal RENBL from the recording / reproduction control unit 405 during data reproduction, the count value decoder 403 outputs a read gate signal RGS to the reproduction signal processing unit 106 and the demodulation unit 1 A window signal WNS required for performing pre-sync code detection and data demodulation is generated and output to 12. The details of the timing signal generation at the time of data reproduction are the same as the contents described in FIG. 9, and the description is omitted here.
- the count value decoder 403 also generates an AM detection window signal AMDWNS, and feeds it back to the count value correction unit 404.
- the count value corrector 4404 receives the AM detection pulse AMDP transmitted from the address mark detector 111, the CRCOK pulse transmitted from the address error detector 113, and the count value decoder 4003. Outputs count correction pulse CCP3 and count correction CCV3 using AM detection window AMDWNS.
- the recording / reproduction control unit 405 receives a recording command RECC0M from the system controller 110 during data recording, and outputs a write enable signal WENBL based on a predetermined reference. Upon data reproduction, it receives a reproduction command REPC0M from the system controller 110 and outputs a re-enable signal RENBL based on a predetermined standard.
- the output algorithm of the write enable signal WENBL and the read enable signal RENBL in each sector that is, the conditions for permitting data recording and data reproduction in each sector will be described later.
- FIG. 11 is a diagram illustrating an example of a count value correction operation of the sector synchronization counter 402 according to the present embodiment.
- the operation example in this figure is characterized in that the AM detection window AMDWNS is used to control the count correction when detecting an address mark as described below.
- the first AM detection window AMDWNSa shown in FIG. 11 (b) is a detection window for the address mark portion AMa in the first address area 104a, and
- the counter output CT03 of the sector synchronization counter 402 is set to the H level within the range of 2W a channel bits centering on the force value corresponding to the end position of the address mark part AMa.
- the count value corrector 404 outputs the count value correction pulse CCP3 as an H pulse. Then, the count correction value CCV3 is set to A at such a timing as to be determined at the H level portion of the count value correction pulse CCP3.
- the H level period of the first AM detection window AMDWNSa has ended. Has become.
- the sector synchronization counter 402 is largely shifted in the early direction from the actual light spot irradiation position at the above time. For this reason, the count value correction pulse CCP3 is not output at the above time point, and the sector synchronization counter 402 is not corrected (indicated by the dotted line, that is, there is no occurrence of CCP-ma shown in FIG. 3).
- the second AM detection window AMDWNS b shown in Fig. 11 (c) has the address area 10
- the count value correction unit 404 counts The value correction pulse CCP3 is output as an H pulse (indicated by CCP-mb), and the count correction value CCV3 is set to C at a timing such that it is determined at the H level portion of the power point value correction pulse CCP3.
- the address mark detection time for the address mark portion AMb is the H level period of the second AM detection window AMDWNSb. Therefore, the count value correction pulse CCP3 is output as an H pulse at the above time, and the sector synchronization counter 402 is corrected.
- the third AM detection window AMDWNSc shown in FIG. 11D is a detection window for the address mark portion AMc in the address area 1004c,
- the counter output CT03 of the synchronous counter 402 is set to the H level within the range of 2Wc channel bits around the count value corresponding to the end position of the address mark part AMc. As shown in the figure, when the address mark is detected while the third AM detection window AMDWNSc is at the H level and the H pulse of the AM detection pulse AMDP is output.
- the count value correction unit 404 outputs an H pulse of the count value correction pulse CCP3 (illustrated by CCP-mc), and the count correction value CCV3 is determined by the H level portion of the count value correction pulse CCP3. Set to E at the appropriate timing.
- the fourth AM detection window AMDWNS d shown in FIG. 11 (e) is a detection window for the address mark part AMd in the address area 1004 d, and the counter output CT03 of the sector synchronization counter 402 is the end position of the address mark part AMd.
- the count value correction unit 404 outputs an H pulse of the count value correction pulse CCP3 (illustrated by CCP-md), and outputs the count correction value CCV3 in the H level portion of the above force point value correction pulse CCP3. Set to G at the timing to determine.
- the count value correction by the CRCOK pulse is equivalent to the example in FIG. That is, the address area 1004a, 1004b, 1004c, and 1004d are identified as (address information section + error detection section), and the count value correction pulse CCP3 is output as an H pulse. At the same time, the count correction value CCV3 is set to B,
- the deviation of the count value of the sector synchronization counter 402 allowed between two sectors is ⁇ 4 bytes. That is, the reference clock generated between two sectors
- the count value is corrected based on the address mark detection timing.
- FIG. 12 is a flowchart for explaining an example of the data recording / Z reproduction permission processing in the present embodiment.
- step 1 it is determined whether an address mark is detected in the sector (step 1). At this time, if at least one address mark is detected in the sector, it is considered that an address mark has been detected. However, if an AM detection window is provided as described in Fig. 11, address mark detection outside the AM detection window is not covered.
- step 1 If it is determined in step 1 that no address mark has been detected, the recording / reproduction of the data in the sector is not permitted, and the process shifts to a predetermined recording / reproduction disabled process (case 0).
- case 0 for example, when data is reproduced, It is possible to consider a retry process for replaying each time, and an operation to shift to a so-called replacement process, ie, a process of recording to an alternative sector without recording the sector during data recording.
- step 2 If it is determined in step 1 that the address mark has been detected, it is determined whether an error has not been detected in the address information, that is, whether or not a CRCOK pulse has been output (step 2).
- step 2 If it is determined in step 2 that the CRC ⁇ K pulse has been output, the process shifts to recording / reproducing processing in the sector (case 1). That is, the write enable signal WENBL is activated during data recording, and the read enable signal RENBL is activated during data reproduction.
- step 2 If it is determined in step 2 that the CRCOK pulse has not been output, it is determined whether an error has not been detected in the address information in the sector M sectors before (M is a natural number) from the relevant sector and the CRCOK pulse is output. Is determined (step 3).
- M may be set to be the same as the number of sectors that see the CRCOK pulse, which is a criterion for determining whether or not to perform count value correction at the above-described address mark detection timing.
- step 3 If it is determined in step 3 that the CRCOK pulse has been output, the process proceeds to the recording / Z reproduction process in the sector (case 2). That is, the write enable signal WENBL is activated during data recording, and the read enable signal RENBL is activated during data reproduction.
- step 3 If it is determined in step 3 that the CROCK pulse has not been output, the recording / reproduction of the data in the sector is not permitted, and the process shifts to a process when predetermined recording / reproduction is impossible (case 3). Case 3 processing is equivalent to case 0 processing.
- the recording / reproducing control unit 405 permits recording / reproducing of data in each sector, and outputs the write enable signal WENBL or the read enable signal RENBL. As a result, data is recorded or reproduced only in the sector for which the count value of the sector synchronization counter 402 has been corrected, so that the data recording / reproduction timing can be accurately adjusted, and the reliability of the apparatus can be improved. Can be kept high.
- FIG. 13 is a block diagram showing a configuration example of the information recording system according to the present invention.
- the optical disk 101 has a data format as shown in FIG.
- the optical disk drive 501 has a basic configuration as shown in FIG. 1 and can record at least data in a predetermined sector of the optical disk 101.
- the host computer 502 incorporates various application programs that handle mixed information of AV data 510 and computer data 511 as a database, and operates these application programs. Information is recorded on the optical disk 101 by using the optical disk drive 501.
- the optical disk drive 501 and the host computer 502 are connected by a built-in host interface 504 and a drive interface 505, respectively. It is possible to transmit mixed information and commands for recording the information.
- the system controller 503 interprets the command transmitted via the host interface 504 and records the same transmitted information in a predetermined sector of the optical disk 101 so that the optical disk drive 501 can record the transmitted information. It plays a role in controlling the whole.
- the i / o driver 506 issues a command to the optical disk drive 501 so that information can be correctly recorded in a predetermined sector of the optical disk 101, and transmits the command via the file system 507. It has a function of extracting the AV data 510 and the computer data 511 as necessary.
- the file system 507 handles the AV data 510 and the computer data 511 as a plurality of files, and each file includes a file name, a data length (number of data bytes), a file type, and the like.
- This software manages all files such as saving (save), erasing (deleting), and reading (opening) files by adding file attributes.
- the AV data 510 and the computer data 511 are data stored in a storage medium such as a hard disk or flash ROM, or an information recording system. It is assumed that data is input or output from outside. Inputs and outputs to the information recording system include digitalized data of video and audio signals input through a video camera, microphone, etc., in addition to digitized information in advance, and a keyboard, mouse, touch panel. Any form can be assumed, such as character information and control commands input through such as, video and character information displayed on an external display device such as a television monitor or a liquid crystal display, and audio information output to a speaker or the like.
- the application program A 508 and the application program B 509 handle the AV data 510 and / or the computer data 511 through the file system 507 according to the instructions of the user, and process the information. It is software for performing operations for storing necessary information in the optical disk 101 and other storage media.
- the host computer 502 has a central processing unit CPU 513 for executing and calculating programs, a semiconductor memory (not shown) used for temporary storage of data and programs, and a storage for data.
- a predetermined function can be executed by providing an auxiliary storage device, such as a hard disk, as necessary, and by operating each of the above hardware organically by each application program. .
- the operation of recording the AV data 510 on the optical disk 101 often requires real-time properties. For example, assume a situation in which video information obtained by digitizing a video signal from a camera is treated as AV data 510 and recorded on an optical disk 101. In this case, in order to record the video from the camera onto the optical disc 101 without interruption, it is necessary to transmit and record the AV data 510 from the host computer 502 to the optical disc drive 501 at a predetermined speed. That is, a predetermined transfer rate is required.
- the data such as AV data 501 input continuously to the optical disc 101
- the transfer rate-priority recording mode described here prevents the transfer rate from dropping by performing recording without interruption even in situations where some data errors may be expected when recording in a certain sector Mode.
- the situations in which data errors are expected can be classified into two types: data errors and address information errors.
- data errors conventional computer storage devices use the concept of verifying the quality of recorded data by performing verification. “Verify” refers to performing playback immediately after recording data and verifying that the error rate is sufficiently recoverable by error correction.
- a verification method for example, a method in which data before demodulation at the time of recording is held, the byte error rate is measured by comparing the data with the data after demodulation, and it is determined that the byte error rate is equal to or lower than a predetermined standard. Can be considered.
- performing the verify operation has a problem that the normal recording sequence execution time becomes longer. This is because the verifi- cation requires time for data reproduction and quality judgment of the reproduced data. Therefore, by not performing the verify operation, It is possible to prevent a decrease in the data transfer rate during recording.
- data is not recorded in a sector where an error of a predetermined level or more is detected in the address information.
- address information is recorded multiple times in each sector. was set as a predetermined standard.
- FIG. 14 is a flowchart illustrating an example of the data recording process according to the present embodiment.
- the address information has an error equal to or more than a predetermined reference (step 1401). If the error power S is equal to or less than a predetermined standard (arrow of NO), data recording processing to the sector is performed (case 1401). If the error is equal to or greater than a predetermined reference (YES arrow), it is determined whether or not the data to be recorded is the data at the transfer rate destination (step 1442). If the data is not transfer rate priority data, the recording operation of the sector is interrupted and the recording retry process is performed (Case 1442). If the data has priority on the transfer rate, data recording processing to the sector is performed (Case 1443).
- the data with the transfer rate priority is added. As long as recording is not interrupted, recording in the sector concerned is continued (Case 1443). In other words, with regard to data with a priority on the transfer rate, a data recording process that gives the highest priority not to lower the transfer rate is performed. For data that does not need to prioritize the transfer rate, select the data recording process that gives the highest priority not to cause data errors, so that the required performance can be satisfied in any case. Becomes
- Step 1401 and Step 1402 may be reversed, and the obtained effects are the same.
- FIG. 15 is a flowchart showing another example of the data recording process in the present embodiment, and the process of step 1401 in the flow of FIG. 14 is further detailed as a specific example.
- the process when data is recorded in a predetermined sector, it is first determined whether or not an address mark has been detected in the sector (step 1501). If no address mark is detected, the process moves to recording retry processing (Case 1501). When the address mark is detected, it is determined whether or not address information without error is obtained in the sector (that is, whether or not it is CRCOK) (step 1502). If correct address information is obtained, data is recorded in the sector (Case 1). If no error-free address information is obtained, it is determined whether there is a sector for which error-free address information has been obtained up to M sectors before the sector (M is a natural number) (step 1503).
- the processing shifts to recording retry processing (Case 1502). If error-free address information has been obtained in the period up to the M sector, it is determined whether or not the data to be further recorded is data with priority on the transfer rate (step 1504). If the data is not transfer-priority-priority data (that is, if the transfer rate is not priority-priority data), the recording operation of the sector is interrupted and a recording retry process is performed (case 1503). If the data has the transfer rate priority, the data recording process to the sector is performed (Case 2).
- FIG. 1 By performing the data recording operation based on the flow described above, FIG. 1
- the presence / absence of address mark detection is included in the criterion (step 1501).
- One of the features of this example is that data is not recorded in a sector where no dress mark is detected. Thereby, by combining with the method of determining the recording start timing from the address mark detection timing as described in detail in the optical disc recording apparatus of the present invention, it is possible to perform recording with high timing accuracy.
- step 1503 Furthermore, even if no error-free address information was obtained in the relevant sector, at least error-free address information was obtained in any of the sectors up to the Mth sector (YES in step 1503).
- the data is recorded only in the sector for which the timing of the sector synchronization counter has been corrected as described in detail in the optical disc recording apparatus of the present invention, and thus the data recording / reproducing timing is accurately adjusted. And the reliability of the device can be kept high.
- a total of four types of judgment processing of steps 1501, 1502, 1503, and 1504 were provided, but the order of the judgment steps is as shown in FIG. It is not limited. For example, it is possible to bring the processing of step 1504 to the top, and the obtained effect is the same.
- Step 1601 is provided to determine whether the command is a command that handles AV data, and if it is determined that the AV data is a ⁇ ⁇ command, data recording processing with priority on the transfer rate
- a data recording process (case 1602) with a non-priority transfer rate is performed.
- the data recording process with priority on the transfer rate means a process in which even if there is an error in the address information, the recording retry process or the replacement process is not performed as far as possible, and the data recording in the sector is continued.
- data recording processing with non-priority transfer rate means that data errors do not occur first, and if errors are anticipated, recording retry processing or This means a process that actively performs the replacement process.
- a command (called a host command) for defining the contents of a certain routine process is defined.
- a host command For defining the contents of a certain routine process, prepare a first host command that guarantees a recording data transfer rate higher than a predetermined reference.
- a second host command with no conditions for the record data transfer rate is prepared. I do. Note that the first host command and the second host command may be completely different host commands, or may be switched according to the same host command option.
- step 1402 In order to incorporate the method of (1) into the flow of FIG. 14 or FIG. 15 and process it, it is advisable to replace step 1402 with step 1601. The same effects as those described above can be obtained.
- the method (1) makes it possible to easily perform processing switching from transfer rate priority to Z non-priority in units of commands from the host computer 502 to the optical disk drive 501. Therefore, this is an effective method in a usage form in which, for example, AV data 5110 and computer data 511 are transferred in a mixed manner.
- the file system 507 shown in FIG. 13 performs file management by adding, to the attribute of each file to be handled, a code for identifying whether or not the transfer rate has priority. For example, it is preferable to add a transfer rate priority code to each file belonging to the AV data 510, and to add a transfer rate non-priority code to each file belonging to the computer data 511.
- application A or application B can use the file belonging to AV data 501 and the file belonging to computer data Even if both are mixed, the first host command can be sent to the optical disk drive 501 by referring to the file attributes in the file system 507 or iZo driver 506. It is possible to easily select whether to issue or to issue the second host command.
- Fig. 17 shows an example of processing.
- a mode setting is provided in advance to determine whether or not to perform the transfer rate priority processing.
- the system controller 503 incorporated in the optical disk drive 501 is provided with the mode setting register 512, and the contents of the mode setting register are rewritten. It's good to set it up.
- the mode setting may be performed by directly rewriting the mode setting register 512 through the host computer 502 and the S drive interface 505 and the host interface 504, or the optical disk from the host computer 502.
- a mode setting command for the drive 501 may be provided, and the system controller 503 receiving the mode setting command may rewrite the mode setting register.
- the mode in which the transfer rate priority processing is performed is called a transfer rate priority mode, and the opposite mode is called a transfer rate non-priority mode.
- the system controller 503 reads out the contents of the mode setting register 512 to determine which drive mode is set (step 1701). . If the transfer rate priority mode is set, transfer rate priority data recording processing (case 1701) is performed. If the transfer rate non-priority mode is set, transfer rate non-priority data recording is performed. Processing (case 1702) is performed.
- step 1442 In order to incorporate the method of (2) into the flow of FIG. 14 or FIG. 15, it is advisable to replace step 1442 with step 1701. The same effects as those described above can be obtained.
- the processing mode of the optical disk drive 501 can be easily switched to either the transfer rate priority or the non-priority by simply setting the mode. Therefore, the application that handles AV data 510 and the application that handles computer data 511 can be clearly separated, and this is an effective method when both are not mixed.
- the application program A 508 shown in FIG. 13 is a program that handles only the AV data 510
- the application program B 509 is a computer program that uses only computer data. It is also assumed that the above two applications cannot be executed simultaneously.
- the 1/0 driver 506 first issues a command for setting the optical disk drive 501 to the transfer rate priority mode. Thereafter, when recording the AV data 501 on the optical disk 101, the optical disk drive 501 always operates in the mode in which the transfer rate is prioritized.
- the iZo driver 506 first issues a command for setting the optical disc drive 501 to the transfer rate non-priority mode. Thereafter, when the computer data 511 is recorded on the optical disk 101, the optical disk drive 501 always operates in the transfer rate non-priority mode. It should be noted that the present invention is not limited to the above-described embodiments, but is defined only by the contents shown in the scope of the patent request. Industrial applicability
- the timing of detecting the address mark, the recording start timing of the data, or the data reproduction start timing is determined. As a result, accurate recording or reproduction can be performed even in a sector where the address information has an error, and the reliability of the device can be improved.
- the optical disk recording device or the optical disk reproducing device shown in the embodiment of the present invention it is determined whether or not the power of recording or reproducing data in a predetermined sector is an error-free level or address information in the sector. Can be performed on condition that the address mark is obtained, or that address information without error is obtained in at least a certain sector up to a predetermined sector before the sector and that an address mark is detected in the sector.
- the sector synchronization timing correction in the sector data is recorded or reproduced only in the sector where accurate timing can be generated, and the reliability of the device can be improved.
- the transfer rate is excellent.
- the transfer data is non-priority data that cannot tolerate a power error, which is the preceding data, and the data recording process with the transfer rate priority is performed only on the data with the transfer rate priority. It can respond to the required performance of the equipment finely.
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- Engineering & Computer Science (AREA)
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- Optical Recording Or Reproduction (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/493,013 USRE40240E1 (en) | 1999-07-29 | 2000-07-26 | Information recording/reproducing device using optical disk and method therefor and information recording system and information recording method |
US09/806,329 US6975570B1 (en) | 1999-07-29 | 2000-07-26 | Information recording/reproducing device using optical disk and method therefor and information recording system and information recording method |
EP00949887A EP1320096B1 (en) | 1999-07-29 | 2000-07-26 | Information recording/reproducing device and method using optical disk |
DE60035437T DE60035437T2 (de) | 1999-07-29 | 2000-07-26 | Informationsaufzeichnungs-/-wiedergabegerät und -verfahren, das eine optische platte verwendet |
AU63138/00A AU6313800A (en) | 1999-07-29 | 2000-07-26 | Information recording/reproducing device using optical disk and method therefor and information recording system and information recording method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11/215129 | 1999-07-29 | ||
JP21512999 | 1999-07-29 |
Publications (1)
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WO2001009890A1 true WO2001009890A1 (fr) | 2001-02-08 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP2000/004960 WO2001009890A1 (fr) | 1999-07-29 | 2000-07-26 | Dispositif de reproduction/enregistrement d'informations utilisant un disque optique et procede correspondant; systeme et procede d'enregistrement d'informations |
Country Status (7)
Country | Link |
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US (2) | USRE40240E1 (ja) |
EP (1) | EP1320096B1 (ja) |
KR (1) | KR100453579B1 (ja) |
CN (2) | CN1198279C (ja) |
AU (1) | AU6313800A (ja) |
DE (1) | DE60035437T2 (ja) |
WO (1) | WO2001009890A1 (ja) |
Cited By (1)
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US7898932B2 (en) | 2005-07-19 | 2011-03-01 | Panasonic Corporation | Optical disc recording device and optical disc recording system |
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US7249384B1 (en) * | 2000-08-16 | 2007-07-24 | Matsushita Electric Industrial Co., Ltd. | Copy-resistant read-only digital optical disc and adaptable player |
JP2004253099A (ja) * | 2003-02-21 | 2004-09-09 | Toshiba Corp | シンクフレーム構造、情報記憶媒体、情報記録方法、情報再生方法、および情報再生装置 |
US7248557B2 (en) * | 2003-10-30 | 2007-07-24 | Plasmon Lms, Inc. | Robust header configuration and method for reading sector identifiers contained therein |
KR20050062025A (ko) * | 2003-12-19 | 2005-06-23 | 삼성전자주식회사 | Ip 패킷의 다중 필드 에러에 대한 icmp 패킷 생성시스템 및 방법 |
US20060072908A1 (en) * | 2004-10-01 | 2006-04-06 | Tsung-Ming Ho | On-the-fly CRC parity generation and scrambling in DVD storage devices |
JP2006201467A (ja) * | 2005-01-20 | 2006-08-03 | Fujitsu Ltd | ホログラム記録再生装置、その記録方法、再生方法およびホログラム記録媒体 |
US20060250898A1 (en) * | 2005-04-25 | 2006-11-09 | Mediatek Incorporation | Disc position determination methods and related devices |
JP5337258B2 (ja) * | 2010-01-22 | 2013-11-06 | 株式会社東芝 | 無線送受信システム、方法、およびmri装置 |
US9256279B2 (en) * | 2011-06-29 | 2016-02-09 | Rambus Inc. | Multi-element memory device with power control for individual elements |
US8705192B1 (en) * | 2012-10-12 | 2014-04-22 | Lsi Corporation | Enhanced quality-sorting scheduler |
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- 2000-07-26 CN CNB008015694A patent/CN1198279C/zh not_active Expired - Lifetime
- 2000-07-26 WO PCT/JP2000/004960 patent/WO2001009890A1/ja active IP Right Grant
- 2000-07-26 AU AU63138/00A patent/AU6313800A/en not_active Abandoned
- 2000-07-26 KR KR10-2001-7003963A patent/KR100453579B1/ko active IP Right Grant
- 2000-07-26 CN CNA2004100633566A patent/CN1560866A/zh active Pending
- 2000-07-26 DE DE60035437T patent/DE60035437T2/de not_active Expired - Lifetime
- 2000-07-26 US US11/493,013 patent/USRE40240E1/en not_active Expired - Lifetime
- 2000-07-26 EP EP00949887A patent/EP1320096B1/en not_active Expired - Lifetime
- 2000-07-26 US US09/806,329 patent/US6975570B1/en not_active Ceased
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Also Published As
Publication number | Publication date |
---|---|
DE60035437D1 (de) | 2007-08-16 |
CN1560866A (zh) | 2005-01-05 |
EP1320096B1 (en) | 2007-07-04 |
CN1319231A (zh) | 2001-10-24 |
KR100453579B1 (ko) | 2004-10-22 |
EP1320096A1 (en) | 2003-06-18 |
KR20010085858A (ko) | 2001-09-07 |
EP1320096A4 (en) | 2003-06-18 |
CN1198279C (zh) | 2005-04-20 |
AU6313800A (en) | 2001-02-19 |
DE60035437T2 (de) | 2008-03-13 |
USRE40240E1 (en) | 2008-04-15 |
US6975570B1 (en) | 2005-12-13 |
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