WO2000054450A1 - Emetteur/recepteur - Google Patents
Emetteur/recepteur Download PDFInfo
- Publication number
- WO2000054450A1 WO2000054450A1 PCT/JP2000/001419 JP0001419W WO0054450A1 WO 2000054450 A1 WO2000054450 A1 WO 2000054450A1 JP 0001419 W JP0001419 W JP 0001419W WO 0054450 A1 WO0054450 A1 WO 0054450A1
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- WIPO (PCT)
- Prior art keywords
- control information
- error
- arq control
- transmission
- arq
- Prior art date
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- 230000005540 biological transmission Effects 0.000 claims description 126
- 238000000034 method Methods 0.000 claims description 50
- 238000004891 communication Methods 0.000 claims description 23
- 238000010586 diagram Methods 0.000 description 89
- 238000012935 Averaging Methods 0.000 description 13
- 238000006243 chemical reaction Methods 0.000 description 11
- 230000002542 deteriorative effect Effects 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000000284 extract Substances 0.000 description 1
- 101150016402 fsn-1 gene Proteins 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1867—Arrangements specially adapted for the transmitter end
- H04L1/1887—Scheduling and prioritising arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/1607—Details of the supervisory signal
- H04L1/1614—Details of the supervisory signal using bitmaps
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W28/00—Network traffic management; Network resource management
- H04W28/02—Traffic management, e.g. flow control or congestion control
- H04W28/04—Error control
Definitions
- the present invention relates to a transmission / reception apparatus, and more particularly to a transmission / reception apparatus that performs error control in data transmission by performing an automatic retransmission request (ARQ) in mobile communication and an error control method thereof.
- ARQ automatic retransmission request
- the ARQ method in which the receiving side requests the transmitting side to perform retransmission in arbitrary data units includes the Stop And Wait ARQ (SW—ARQ) method, Go Back N ARQ (GBN — ARQ) method and Selective Repeat
- the ARQ (SR-ARQ) method is well known.
- the GBN-ARQ method which retransmits all transmitted packets or cells that are later in time than the indicated sequence number (hereinafter referred to as “SN”), has been specified.
- a PRI ME-ARQ scheme combining the SR-ARQ scheme that retransmits only the bucket or cell of the SN and the PRI ME-ARQ scheme has been proposed.
- the receiving side sends back the SN corresponding to the unreceived packet or cell for a predetermined number of times as ARQ control information to the transmitting side, and the transmitting side returns the received ARQ
- the packet or cell corresponding to the indicated SN is retransmitted based on the control information.
- the transmitting side retransmits all transmitted packets or cells after the most temporally backward SN among the SNs instructed to be retransmitted.
- FIG. 1 shows the schematic configuration of a transmitter / receiver that performs error control of the PRIME-ARQ method.
- FIG. 2 is a schematic diagram showing an example of a sequence of the PRIME-ARQ scheme. Here, it is assumed that ARQ is performed for each packet.
- the configuration of the transmitting / receiving apparatus is shown separately for the transmitting side and the receiving side. Also, in view of the features of the present invention, only the configuration related to retransmission control is shown.
- the transmission side includes a transmission buffer unit 1 for adding and storing an SN to a transmission data packet, a modulation unit 2 for adding a CRC to a transmission data bucket and performing a modulation process, and a transmission signal after the modulation process.
- a DZA converter 3 that performs D / A conversion processing on the received signal, a transmission RF unit 4 that transmits a transmission signal after D / A conversion from an antenna (not shown), and a reception RF unit 5 that receives a radio signal from an antenna (not shown)
- AZD converter 6 that performs AZD conversion of the received signal
- demodulation processing section 7 that performs demodulation processing and CRC check on the received signal after AZD conversion, and extracts ARQ control information, and ARQ control in the received signal.
- a retransmission control unit 8 for instructing the transmission buffer unit 1 to retransmit the SN requested to be retransmitted based on the information.
- the receiving station includes a receiving RF unit 9 for receiving a radio signal from an antenna (not shown), an A / D converter 10 for AZD converting the received signal, a demodulation process and a CRC for the received signal after the A / D conversion.
- a demodulation processing unit 11 that performs a check; and an SN determination unit 12 that performs a check of an SN added to a data packet with respect to the received signal after the demodulation process to determine whether an SN is missing and to remove SN information.
- a reception buffer unit 13 for storing a data packet of the received signal after the removal of the SN information, a retransmission control information generation unit 14 for generating ARQ control information from the determination result in the SN determination unit 12,
- a modulation section 15 that adds a CRC to the ARQ control information that has been subjected to modulation and performs modulation processing
- a DZA converter 16 that performs DZA conversion on the modulated transmission signal
- an antenna not shown
- the input transmission packet has the SN And is stored in the transmission buffer unit 1.
- the stored transmission packet is output by the transmission buffer unit 1 based on the retransmission SN specified by the retransmission control unit 8.
- the data packet output from the transmission buffer unit 1 is transmitted from an antenna (not shown) via the modulation unit 2, the DZA converter 3, and the transmission RF unit 4.
- the signal received by the receiving RF unit 5 is input to the retransmission control unit 8 via the AZD converter 6 and the demodulation processing unit 7, and the SN requested to be retransmitted is instructed to the transmission buffer unit 1.
- the signal received by the reception RF unit 9 is input to the SN determination unit 12 via the AZD converter 10 and the demodulation processing unit 11, and is added to each data packet of the received signal by the SN determination unit 12. Missing of the data bucket is determined based on the SN. The missing SN is output to the retransmission control information generation unit 14 as a determination result.
- Missing data packets in the received signal can be detected by the retransmission control information generator 14
- the generated ARQ control information is transmitted from a not-shown antenna by the transmission RF unit 17 via the modulation unit 15 and the DZA converter 16. Further, the data packet determined to be receivable by the SN determination unit 12 has its SN removed, and is input to the reception buffer unit 13 and stored.
- the receiving side Baketsuto of already-received is ignored t
- transmission efficiency is improved as compared with the conventional three schemes.
- An object of the present invention is to provide a transmission / reception device that reduces an error rate without deteriorating transmission efficiency.
- the ARQ control information is not composed of only a sequence number, but one sequence number in which an error first occurs, and a sequence number after this sequence number. And bit information indicating whether or not there is a retransmission request for.
- FIG. 1 is a block diagram showing a schematic configuration of a transmission / reception device that performs error control of a PRIME-ARQ scheme
- FIG. 2 is a schematic diagram showing an example of a sequence of the PRIME-ARQ scheme
- FIG. 3 is a block diagram showing a schematic configuration of a transmission / reception device according to Embodiment 1 of the present invention
- FIG. 4 is a schematic diagram showing an example of a sequence according to Embodiment 1 of the present invention
- FIG. 5 is a schematic diagram showing an example of a configuration of ARQ control information according to Embodiment 1 of the present invention
- FIG. 6 is a block diagram showing a schematic configuration of a transmitting and receiving apparatus according to Embodiment 2 of the present invention.
- FIG. 7 is a schematic diagram showing an example of a sequence according to Embodiment 2 of the present invention
- FIG. 8 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 2 of the present invention
- FIG. 9 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 2 of the present invention.
- FIG. 10 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 2 of the present invention.
- FIG. 11 is a schematic diagram illustrating an example of a sequence according to Embodiment 3 of the present invention
- FIG. 12 is a schematic diagram illustrating a configuration example of ARQ control information according to Embodiment 3 of the present invention
- FIG. 13 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 3 of the present invention.
- FIG. 14 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 3 of the present invention.
- FIG. 15 is a schematic diagram illustrating an example of a sequence according to Embodiment 4 of the present invention
- FIG. 16 is a schematic diagram illustrating an example of a configuration of ARQ control information according to Embodiment 4 of the present invention
- FIG. 17 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 4 of the present invention.
- FIG. 18 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 4 of the present invention.
- FIG. 19 is a schematic diagram showing an example of a sequence according to Embodiment 5 of the present invention:
- FIG. 20 is a schematic diagram showing an example of a configuration of ARQ control information according to Embodiment 5 of the present invention;
- FIG. 21 is a schematic diagram showing an example of a sequence according to Embodiment 5 of the present invention
- FIG. 22 is a schematic diagram showing an example of a configuration of ARQ control information according to Embodiment 5 of the present invention
- FIG. 23 is a schematic diagram showing an example of a sequence according to Embodiment 6 of the present invention:
- FIG. 24 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 6 of the present invention;
- FIG. 25 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 6 of the present invention.
- FIG. 26 is a schematic diagram illustrating an example of a sequence according to Embodiment 7 of the present invention
- FIG. 27 is a schematic diagram illustrating an example of a configuration of a communication frame according to Embodiment 7 of the present invention
- FIG. 28 is a schematic diagram showing a communication state of a data bucket according to Embodiment 8 of the present invention.
- FIG. 29 is a schematic diagram showing a communication state of a data bucket according to Embodiment 8 of the present invention.
- FIG. 30 is a schematic diagram showing a communication state of a data bucket according to Embodiment 8 of the present invention.
- FIG. 31 is a schematic diagram showing an example of a sequence according to Embodiment 9 of the present invention:
- FIG. 32 is a block diagram showing a schematic configuration of a transmitting / receiving device according to Embodiment 10 of the present invention;
- FIG. 33 is a schematic diagram showing an example of a sequence according to Embodiment 10 of the present invention
- FIG. 34 is a schematic diagram showing an example of a sequence according to Embodiment 10 of the present invention
- FIG. 35B is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 10 of the present invention.
- FIG. 36 is a block diagram showing a schematic configuration of a transmitting / receiving apparatus according to Embodiment 11 of the present invention.
- FIG. 37 is a block diagram illustrating a schematic configuration of a demodulation processing unit and a retransmission control parameter determining unit of the transmitting and receiving apparatus according to Embodiment 11 of the present invention
- FIG. 38 is a diagram illustrating a demodulation processing unit and a retransmission unit of a transmission / reception apparatus according to Embodiment 12 of the present invention. Block diagram showing a schematic configuration of a control parameter determining unit;
- FIG. 39 is a block diagram showing a schematic configuration of a demodulation processing unit and a retransmission control parameter determination unit of the transmitting and receiving apparatus according to Embodiment 13 of the present invention.
- FIG. 40 is a block diagram showing a schematic configuration of an inter-slot averaging unit of the transmitting and receiving apparatus according to Embodiment 7 of the present invention.
- FIG. 41 is a block diagram showing a schematic configuration of an inter-slot averaging unit of the transmitting and receiving apparatus according to Embodiment 14 of the present invention.
- FIG. 42 is a block diagram showing a schematic configuration of an inter-slot averaging section of the transmitting and receiving apparatus according to Embodiment 15 of the present invention.
- FIG. 43 is a block diagram showing a schematic configuration of the inter-slot averaging section of the transmitting and receiving apparatus according to Embodiment 16 of the present invention.
- FIG. 3 is a block diagram illustrating a schematic configuration of the transmission / reception device according to Embodiment 1 of the present invention.
- FIG. 4 is a schematic diagram illustrating an example of a sequence according to Embodiment 1 of the present invention.
- FIG. 5 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 1 of the present invention.
- the transmitting side includes a transmission buffer unit 101 for adding and storing an SN to a transmission data bucket, a modulation unit 102 for adding a CRC to a transmission data packet and performing a modulation process, and a modulation process.
- a DZA converter 103 that performs DZA conversion processing on the transmitted signal after transmission and a transmission that transmits the transmission signal after DZA conversion from an antenna (not shown).
- the receiving station includes a receiving RF unit 110 for receiving a radio signal from an antenna (not shown), an AZD converter 111 for AZD converting the received signal, a demodulation process and a CRC for the AZD-converted received signal.
- a reception buffer unit 114 that stores a data bucket of the reception signal after the SN information is removed, and a bitmap generation unit 1 15 that generates ARQ control information in a bitmap format from the determination result in the SN determination unit 113
- a modulation section 116 that adds a CRC to the generated ARQ control information and performs modulation processing, a DZA converter 117 that performs DZA conversion on the transmission signal after the modulation processing, and a transmission signal after the DZA conversion Transmit RF section for transmitting from antenna not shown 1 1 8 and.
- the input transmission packet is provided with the SN and stored in the transmission buffer unit 101.
- the stored transmission bucket is output by transmission buffer section 101 based on the retransmission SN instructed by retransmission control section 109.
- the data bucket output from the transmission buffer unit 101 is transmitted from an antenna (not shown) via the modulation unit 102, the DZA converter 103, and the transmission RF unit 104.
- the signal received by reception RF section 105 is input to bitmap processing section 108 via AZD converter 106 and demodulation processing section 107, and the SN requested to be retransmitted is extracted from the ARQ control information.
- the extracted SN requested to be retransmitted is instructed by retransmission control section 109 to transmission buffer section 101.
- the signal received by the reception RF unit 110 is input to the SN determination unit 113 via the AZD converter 111 and the demodulation processing unit 112, and the data of the received signal is transmitted by the SN determination unit 113. Missing of the data bucket is determined based on the SN assigned to the bucket.
- the missing SN is output to the bitmap generator 115 as a determination result.
- the missing data packet in the received signal is converted by the bitmap generator 115 into bitmap ARQ control information and output.
- the generated ARQ control information is transmitted as a transmission signal from the transmission RF unit 118 via the modulation unit 116 and the DZA converter 117.
- the data packet determined to be receivable by the SN determination unit 113 has its SN removed, input to the reception buffer 114, and stored.
- FIG. 5 shows the bit configuration of ARQ control information.
- the ARQ control information includes an SN in which an error is first detected, and information in a bitmap format indicating whether or not there is a request for retransmission of a predetermined number of data buckets after the first SN.
- the number of bits constituting this bit group 301 is not limited to 4 bits, and can be set to any value.
- the present invention is more effective as the number of SNs indicated by the ARQ control information increases.
- the ARQ retransmission control information Retransmission control without lowering transmission efficiency, because it consists of a single SN that requests retransmission and a bitmap that indicates whether retransmission is performed for the SN following this SN without using a configuration consisting of multiple SN groups.
- the amount of information can be increased and the error rate can be improved.
- bit group representing SN is not limited to 4 bits, but can be any number of bits.
- the transmitting and receiving apparatus and the error control method according to the present embodiment have the same configurations as those of the first embodiment, except that a slot number (position information) indicating a position in a frame is used instead of SN. .
- the value used for SN is repeated at a fixed period, it is used up to a relatively large value in consideration of retransmission. Usually, an appropriate value is used depending on the transmission system.
- the transmission protocol of the HDLC X.25 packet exchange uses 3 bits (modulo 8, sequence numbers 0 to 7) or 7 bits (modulo 128, sequence numbers 0 to 127),
- a 24-bit (modulo 24: sequence number 0 to 224-1) value is used
- TCP Transmission Control Protocol
- 32 bits are used.
- the values of sequence numbers 0 to 2 32-1) are used.
- the position information in the frame that is, the slot Numbers will be used.
- FIG. 6 is a block diagram illustrating a schematic configuration of a transmission / reception device according to Embodiment 2 of the present invention.
- FIG. 7 is a schematic diagram illustrating an example of a sequence according to Embodiment 2 of the present invention.
- FIGS. 8 to 10 are schematic diagrams each showing a configuration example of ARQ control information according to Embodiment 2 of the present invention.
- the ARQ control information according to the present embodiment has a bit configuration as shown in FIG. 6, and a bit group 6001 located at the head is an FSN (Slot Number in Frame), that is, Indicates the slot number indicating the position. Bits 602 to 605 indicate the presence or absence of an error in the slot after the slot number represented by the bit group 601.
- FSN Slot Number in Frame
- bit 6 indicating the presence or absence of an error in the third to sixth data packets in the frame.
- 0 2 to bit 605 indicate 0, 1, 1, 0, in order.
- the intra-frame transmission timing control section 401 obtains synchronization of a frame and a slot from the output of the demodulation processing section 107, controls the retransmission control section 109, and controls the frame / bitmap processing section 4.
- 02 decodes the ARQ control information according to the present embodiment as shown in FIG. 8 to know the bucket to be retransmitted, and the frame timing generation section 4003 outputs the frame from the output of the demodulation processing section 112. Then, the synchronization of the slot and the slot is obtained and output to the modulation section 116.
- the determination unit 404 selects a packet to be requested to be retransmitted from the received signal, and transmits the packet to the frame 'bitmap generation unit 405 described later.
- the frame pit map generation unit 405 generates ARQ control information according to the present embodiment as shown in FIG. 8 based on the determination result of the determination unit 404.
- the FSN it is not necessary to add an SN to a packet or a cell to be transmitted, so that the transmission amount of data itself can be reduced, and the number of bits used for ARQ control information can be reduced. Transmission efficiency is improved.
- the octal 0 control information can be a bit configuration consisting of only SN.
- bit group 70 1 indicates that the position in the frame has an error in the second bucket
- bit group 702 indicates an error in the third packet
- bit group 703 indicates 6 in the same manner. The errors in the third packet are indicated respectively.
- the ARQ control information in the frame is transmitted.
- a bit configuration consisting of only bits indicating the presence or absence of an error from the first slot may be used.
- bit 801 indicates that the first packet in the position in the frame is a normal reception
- bit 802 indicates that an error has occurred in the second packet in the position in the frame
- bit 803 indicates that the third packet is erroneous
- bit 804 indicates that the fourth packet is normally received
- bit 805 indicates that the fifth packet is normally received
- bit 806 indicates that the sixth packet is incorrect
- bit 80 7 indicates normal reception, respectively.
- the amount of data required to transmit the same ARQ control information can be reduced, thereby improving transmission efficiency. Can be done.
- the frame refers to a transmission frame in the TDMA system, a multi-transmission frame in the TDMA system, a plurality of data packets, a continuous data bucket, and the like.
- bit group representing the FSN is not limited to 4 bits, but can be any number of bits. (Embodiment 3)
- the transmitting and receiving apparatus and the error control method according to the present embodiment have the same configuration as in the second embodiment, except that a frame relative number is added to the ARQ control information as a frame number indicating a frame position. is there.
- a frame relative number PFN (Previous Frame Number) is applied to the ARQ control information using the FSN so that it can be determined how many frames earlier the information is about the frame.
- FIG. 11 is a schematic diagram illustrating an example of a sequence according to Embodiment 3 of the present invention.
- FIGS. 12 to 14 are each a configuration example of ARQ control information according to Embodiment 3 of the present invention.
- FIG. The block diagram of the transmitting / receiving apparatus according to the present embodiment is the same as the block diagram according to Embodiment 2 shown in FIG.
- the numerical value increases, it indicates information relating to the previous frame in time.
- the transmitting side can determine how many frames before the frame is the ARQ control information related to the frame.
- the ARQ control information can be configured in a bit configuration consisting of only PFN and FSN as shown in FIG.
- bit group 1 101 indicates that the information is for the immediately preceding frame
- bit group 1 102 indicates that the position in the frame has an error in the second bucket
- bit group 1103 indicates an error in the third packet
- bit group 1104 indicates an error in the sixth packet.
- the ARQ control information may be configured in a bit configuration including only the PFN and a bit indicating the presence or absence of an error from the first slot in the frame.
- bit group 1201 indicates information about the immediately preceding frame
- bit 1202 indicates that the first packet in the position in the frame is normal reception
- bit 1203 indicates information in the frame.
- Bit 1204 is the third packet in error
- bit 1205 is the fourth bucket normally received
- bit 1206 is the fifth
- Bit 1207 indicates that the sixth packet was erroneous
- bit 1208 indicates that the packet was normally received.
- the frame refers to a transmission frame in the TDMA system, a multi-transmission frame in the TDMA system, a plurality of data packets, a continuous data bucket, and the like.
- bit group representing the FSN and the bit group representing the PFN are not limited to four bits, and may be any number of bits.
- the transmitting and receiving apparatus and the error control method according to the present embodiment have the same configuration as in Embodiment 3, except that a frame absolute number is used instead of a frame relative number as a frame number indicating a frame position. is there.
- the identification number used for obtaining frame synchronization is used as a frame absolute number; FRN (Frame Number) instead of PFN.
- the frame identification number is usually represented by, for example, 16 values from 0 to 15, and if the possible numerical values are limited to 16 values, the group of bits representing the number consists of 4 bits. Configuration is enough.
- FIG. 15 is a schematic diagram illustrating an example of a sequence according to Embodiment 4 of the present invention.
- FIGS. 16 to 18 are each a configuration example of ARQ control information according to Embodiment 4 of the present invention.
- FIG. This implementation The block diagram of the transmitting and receiving apparatus according to this embodiment is the same as the block diagram according to Embodiment 2 shown in FIG.
- bit group 140 1 is 8 and the frame whose identification number is 8
- Bit group 1402 indicates that an error has occurred in the second packet in the frame, as in the case already described, and bits 1403 to 1406 indicate that F S
- the transmitting side can easily determine the number of previous frames of the ARQ control information even if an error occurs in a plurality of ARQ control information. it can.
- the bits representing FRN are:
- bit group representing PFN A smaller number of bits is required as compared with the bit group representing PFN.
- the ARQ control information may have a bit configuration consisting of only FRN and FSN.
- bit group 1501 indicates that information is associated with the frame whose identification number is 8
- bit group 1502 indicates that an error has occurred in the packet whose position in the frame is second
- bit group 1 503 indicates an error in the third packet
- bit group 1 504 indicates an error in the sixth packet.
- bit group 1601 indicates that the information is for the frame whose identification number is 8, and bit 1602 indicates that the first bucket whose position in the frame is normal reception.
- Bit 163 indicates that an error has occurred in the second packet in the frame, bit 164 indicates that the third packet has an error, and bit 166 indicates 4 in the same manner.
- the 1st packet indicates normal reception, bit 1606 indicates the 5th bucket is normal reception, bit 1607 indicates the 6th bucket is erroneous, and bit 1608 indicates normal reception. .
- the receiving side when transmitting a bucket in which an error has occurred in position information in a frame using FSN as ARQ control information, the receiving side includes the absolute frame number in the ARQ control information.
- the transmitting side can easily determine which frame the ARQ control information is related to, and perform appropriate retransmission.
- the frame refers to a transmission frame in the TDMA system, a multi-transmission frame in the TDMA system, a plurality of data packets, a continuous data bucket, and the like.
- bit group representing FSN and the bit group representing FRN are not limited to four bits, and may be any number of bits.
- the transmitting and receiving apparatus and the error control method according to the present embodiment have the same configuration as that of the first embodiment, except that lower bits of a bit group representing SN in binary are omitted, and the number of bits used for ARQ control information is reduced. Is to reduce.
- FIGS. 19 and 21 are schematic diagrams showing an example of a sequence according to the fifth embodiment of the present invention, respectively.
- FIGS. 20 and 22 are diagrams respectively showing the embodiments of the present invention.
- FIG. 13 is a schematic diagram showing a configuration example of ARQ control information according to 5.
- FIG. Note that the block diagram of the transmitting / receiving apparatus according to the present embodiment is the actual one shown in FIG. Since this is the same as the block diagram according to Embodiment 2, the description is omitted here.
- Fig. 19 shows a case where an error occurs in the data packets # 2, # 4, # 5 and # 8 in the first frame in the figure.
- ⁇ SN (Omitted Sequence Number) is a value that represents SN in binary number and the value when the lower bits are omitted in decimal number.
- the omission is the first bit which is the least significant bit.
- the ARQ control information may have a bit configuration consisting of only the OSN as shown in FIG.
- OSN in place of SN in ARQ control information
- the amount of data required to transmit the same ARQ control information can be reduced, thereby improving transmission efficiency. be able to.
- OSNs are more effective in situations where errors are continuous because they can send consecutive SNs at once.
- the present invention is not limited to the above case, and two or more lower bits may be omitted.
- the frame refers to a transmission frame in the TDMA system, a multi-transmission frame in the TDMA system, a plurality of data packets, a continuous data bucket, and the like.
- bit group representing ⁇ SN is not limited to 4 bits, and can be any number of bits.
- FIG. 23 is a schematic diagram showing an example of a sequence according to Embodiment 6 of the present invention.
- FIGS. 24 and 25 are each a configuration of ARQ control information according to Embodiment 6 of the present invention. It is a schematic diagram which shows an example.
- the block diagram of the transmitting and receiving apparatus according to the present embodiment is the same as the block diagram according to Embodiment 2 shown in FIG.
- the predetermined number of lower bits is omitted when SN is represented by a binary number
- the number of lower bits to be omitted is determined during communication. By making it adaptively variable, the transmission efficiency is further improved.
- FIG. 23 shows a case where an error occurs in data packets # 2, # 4, and # 5 in the first frame in the figure.
- OMB mittedBits
- OMB is a value indicating how many low-order bits of the SN expressed in binary are omitted.
- the number of bits used for ARQ control information can be reduced, thereby improving transmission efficiency.
- the ARQ control information can be configured in a bit configuration consisting of only ⁇ SN, as in FIG. 25
- a bit group 2301 indicates that the lower-order omitted bit number is 1
- the OSN is used instead of the SN, and the number of bits to be omitted can be adaptively changed during communication. Since the omitted bit number is transmitted to the transmitting side by using, the transmission efficiency can be further improved. In particular, the greater the number of bits to be omitted, the more consecutive SNs can be sent at once, which is more effective in situations where errors continue.
- the frame refers to a transmission frame in the TDMA system, a multi-transmission frame in the TDMA system, a plurality of data packets, a continuous data bucket, and the like.
- bit group representing the OSN and the bit group representing $ MB are not limited to 4 bits, but may be any number of bits.
- the transmitting and receiving apparatus and the error control method according to the present embodiment have the same configuration as that of the second embodiment, except that ARQ control information is transmitted on a common channel when communicating with a plurality of communication partner stations. .
- FIG. 26 is a schematic diagram illustrating an example of a sequence according to Embodiment 7 of the present invention.
- FIG. 27 is a schematic diagram illustrating an example of a configuration of a communication frame according to Embodiment 7 of the present invention. It is.
- the block diagram of the transmitting / receiving apparatus according to the present embodiment is the same as the block diagram according to Embodiment 2 shown in FIG.
- the receiving side is a base station and the transmitting side is a plurality of communication terminals (TE 1 to 3).
- error control performed for each channel is performed using a common channel, so that each communication terminal receives common ARQ control information from the base station.
- the amount of data transmitted and received is reduced, and the transmission efficiency is improved.
- the bucket # 1 from TE 3 which is the third bucket in the first frame the bucket # 2 from TE 1 which is the fourth bucket, and 7 Assume that an error has been detected for the second bucket, bucket # 2 from TE2, and.
- Each communication terminal receives this ARQ control information and retransmits the bucket located at the position in the specified frame.
- FIG. 27 shows an example of a slot configuration in one frame.
- a common channel 2501 is arranged at the beginning of one frame, and slots 2502 and 2505 are TE1 and slot25. 0 3, 250 8 and 250 9 show the cases used for TE 2, and slots 250 4, 250 6 and 250 7 used for TE 3.
- the base station on the receiving side is Since there is no need to transmit ARQ control information, transmission efficiency can be improved.
- ARQ control information adopts the bit configuration shown in FIG. 9, in this embodiment, the ARQ control information broadcast by the receiving side from the common channel is the same as that of the previously described embodiment.
- the configuration of the ARQ control information in any of the modes may be used.
- the transmitting and receiving apparatus and the error control method according to the present embodiment have the same configuration as in the first embodiment, except that the same SN is added within a predetermined data unit.
- the data unit at the time of data processing does not always match the data unit at the time of transmission / reception.
- packets actually transmitted / received are data units at the time of transmission / reception, and usually a plurality of packets are collected. This is the first night unit for the first effective night process. Therefore, if an error occurs even in one packet in the data unit during data processing, the data processing cannot be performed normally, and the buckets that constitute the data processing unit during the data processing are normally received. Is also discarded.
- the SN assigned to each packet is assigned to each data unit in higher-level data processing.
- FIGS. 28 to 30 are schematic diagrams showing communication states of data packets according to Embodiment 8 of the present invention.
- the block diagram of the transmitting and receiving apparatus according to the present embodiment is the same as the block diagram according to Embodiment 2 shown in FIG.
- FIG. 29 shows a case in which the same SN is assigned to each slot.
- Each slot is data of an individual communication station, and if even one packet is missing, data transmission / reception is not normal for that communication station. Therefore, the same SN is given, and if at least one has an error, all are retransmitted.
- an SN is assigned to each data unit at the time of data processing, and If an error occurs even in one bucket, if a retransmission request is made for one SN, it is possible to instruct retransmission for all packets in the data unit at the time of processing, thereby improving transmission efficiency. Can be.
- the transmitting and receiving apparatus and the error control method according to the present embodiment have the same configuration as that of the first embodiment, except that ARQ control information using a plurality of bitmap formats is continuously transmitted.
- two consecutive pieces of ARQ control information using the bitmap format as shown in FIG. 5 are transmitted after shortening the length of the bit string.
- FIG. 31 is an example of a sequence in the present embodiment, and shows a case where an error has occurred in data packets # 2, # 4, # 5, # 7, and # 8 in the first frame in the figure. .
- the number of bits of the bit sequence in the bit configuration of the ARQ control information using the bitmap format is reduced, and transmission is performed a plurality of times.
- the ARQ control information in the present embodiment may use the configuration of the ARQ control information in any of the above-described embodiments other than the above configuration. Also, if the bit configuration can cope with discrete errors, it is not always necessary to continuously transmit a plurality of ARQ control information.
- FIG. 32 is a block diagram illustrating a schematic configuration of a transmitting / receiving apparatus according to Embodiment 10 of the present invention.
- FIGS. 33 and 34 are schematic diagrams illustrating an example of a sequence according to Embodiment 10 of the present invention, respectively.
- FIG. 35 is a schematic diagram showing a configuration example of ARQ control information according to Embodiment 10 of the present invention.
- the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description is omitted.
- the bit configuration shown in Fig. 35A is the configuration of the ARQ control information (bit group 3302 and bit group 3303) in the normal PRIME-ARQ scheme, with one bit (bit 3301) indicating the identification flag added.
- the bit configuration shown in Fig. 35B is the configuration of ARQ control information using the bitmap format (bit group 3305 and bits 3306 to 3309) with 1 bit (bit 3304) indicating an identification flag added. is there.
- retransmission control information determination section 3003 determines whether the SN error is continuous or discrete from the output of SN determination section 113 and transmits the error to retransmission control information switching section 3005. .
- Retransmission control information generating section 3004 generates ARQ control information of the normal PRIME-ARQ scheme based on the output of SN determining section 113.
- the retransmission control information switching unit 3005, based on the output of the retransmission control information determination unit 3003, is the normal PRIME-ARQ ARQ control information generated by the retransmission control information generation unit 3004, or a bitmap generation unit. Generated by 1 1 5 ARQ control information using the bitmap format that is output, or one of them is selectively output.
- the configuration of ARQ control information is adaptively switched according to an error occurrence state in a frame, so that transmission efficiency can be improved.
- the identification flag is not limited to one bit. By making the identification flag consist of two or more bits, it is also possible to switch between two or more configurations.
- the same configuration is adopted, but the number of bits or bit groups to configure may be increased or decreased, for example, by increasing or decreasing the number of bits in a bitmap format.
- the transmitting / receiving apparatus has the same configuration as that of Embodiment 10, except that the channel quality is estimated using the demodulation signal determination error, and is used for ARQ control information according to the channel quality. It changes the number of bits.
- retransmission control parameter determination section 3401 estimates the channel quality of the received signal from the output of demodulation processing section, and bit map generation section 115 according to the estimated channel quality. It controls the information generation unit 3004 and the retransmission control information switching unit 3005, and is used for normal PRIME-ARQ ARQ control information and ARQ control information using a bitmap format according to the channel quality. Increase or decrease the number of bits or bit groups.
- demodulation section 3501 demodulates the received signal
- determination section 3502 determines a signal point.
- the subtractor 3503 subtracts the input signal and the output signal of the determiner 3502 to calculate a decision error
- the subtractor 3504 uses the output of the subtractor 3503
- a certain determination error and a threshold value are subtracted, and the determination unit 3505 makes a magnitude determination.
- the number of bits or the number of bits used for ARQ control information is appropriately changed according to the channel quality, so that the transmission efficiency is improved while the error rate is kept low. Can be.
- the transmission / reception apparatus has the same configuration as that of embodiment 11, except that determination errors are averaged before use.
- FIG. 38 is a block diagram showing a schematic configuration of the demodulation processing unit and the retransmission control parameter determining unit of the transmitting and receiving apparatus according to Embodiment 12 of the present invention.
- Embodiment 1 The same components as those in 1 are denoted by the same reference numerals, and detailed description is omitted.
- the averaging unit 3601 averages the decision error output from the subtractor 3503.
- the determination error is averaged before use, so that the detection accuracy of the channel quality can be improved.
- the transmitting / receiving apparatus has the same configuration as that of Embodiment 12, except that the determination error is averaged between slots before use.
- FIG. 39 is a block diagram showing a schematic configuration of a demodulation processing section and a retransmission control parameter determination section of the transmitting and receiving apparatus according to Embodiment 13 of the present invention.
- FIG. 40 shows an embodiment of the present invention.
- FIG. 8 is a block diagram showing a schematic configuration of an inter-slot averaging unit of the transmitting / receiving apparatus according to 7. It is to be noted that the same components as those in Embodiment 12 are denoted by the same reference numerals, and detailed description thereof will be omitted.
- the switch 380 1 switches the output destination for each slot, and the memory 380 2 temporarily stores the averaged judgment error of each slot.
- 0 3 performs averaging processing on the averaged determination error of each slot.
- the transmission / reception apparatus has the same configuration as that of Embodiment 13, except that the channel estimation value of the previous frame and the channel estimation value of the current frame are weighted and averaged.
- the channel estimation value of the previous frame and the channel estimation value of the current frame are weighted and averaged, so that the accuracy of the channel quality estimation can be improved.
- the transmission / reception apparatus has the same configuration as that of Embodiment 14, except that the value of a coefficient used for weighted averaging is variable.
- FIG. 42 is a block diagram showing a schematic configuration of the inter-slot averaging section of the transmitting and receiving apparatus according to Embodiment 15 of the present invention.
- the same components as those in Embodiment 14 are denoted by the same reference numerals, and detailed description thereof will be omitted.
- the transmitting / receiving apparatus has a configuration similar to that of Embodiment 14, and realizes a weighted average by bit shift.
- FIG. 43 shows an outline of an inter-slot averaging section of the transmitting / receiving apparatus according to Embodiment 16 of the present invention. It is a block diagram which shows schematic structure. The same components as those in Embodiment 14 are denoted by the same reference numerals, and detailed description thereof will be omitted.
- the 2-bit shifter 4101 shifts the channel estimation value of the current frame by 2 bits to 0.25 times.
- the 2-bit shifters 4102 and 1103 shift the channel estimation value of the previous frame, which is the output of the memory 3902, by 2 bits and 1 bit, respectively, and shift by 0 bits. 25 times, 0.5 times.
- the adder 4104 adds the outputs of the 2-bit shifter 4102 and the 1-bit shifter 4103 to generate 0.75 times the channel estimation value one frame before.
- the adder 390 4 adds the output of the 2-bit shifter 4101 to the output of the adder 4104 and outputs the result to the subtractor 3504.
- the weighted average processing can be realized by the bit shift, so that the calculation amount can be reduced.
- Embodiments 1 to 16 the CRC check is described as an example of an error check method, but any method may be used as long as an error can be determined.
- Embodiments 1 to 16 above can be implemented in any combination as appropriate. In a form related to transmission control, it is irrelevant whether a numerical value represented by a bit is an SN or a frame number.
- the transmission / reception apparatus of the present invention transmits ARQ control information including: firstly, one frame in which an error has occurred, bit information indicating whether or not there is a retransmission request for position information after the position of the position information in the frame; Receive and retransmit the bucket corresponding to the position indicated by the ARQ control information and all the transmitted buckets corresponding to the numbers subsequent to the most recent position among the positions indicated by the ARQ control information. It adopts the configuration to do.
- the transmitting / receiving apparatus of the present invention employs a configuration in the above configuration, in which the ARQ control information includes a frame number indicating a position of the frame.
- the receiving side when transmitting a packet in which an error has occurred in the position information within a frame in the ARQ control information, the receiving side uses the frame relative number for the ARQ control information. Even if an error occurs in the control information, it is possible to easily determine how many previous frames the ARQ control information is for, and perform appropriate retransmission.
- the transmission / reception apparatus of the present invention employs, in the above configuration, a configuration in which a predetermined lower bit of a sequence number is deleted. According to this configuration, the transmission of the same ARQ control information requires a smaller amount of data, so that transmission efficiency can be improved.
- the transmitting / receiving apparatus of the present invention employs, in the above configuration, a configuration in which the number of lower bits to be deleted is adaptively changed. According to this configuration, the number of bits to be omitted can be adaptively changed during communication, and the number of bits to be omitted is transmitted to the transmission side, so that transmission efficiency can be further improved.
- the transmitting / receiving apparatus of the present invention employs a configuration in which ARQ control information is transmitted on a common channel in the above configuration. According to this configuration, it is not necessary to transmit ARQ control information for each communication partner station, so that transmission efficiency can be improved.
- the transmitting / receiving apparatus of the present invention employs a configuration in which the sequence number is set to be the same within a predetermined data unit. According to this configuration, instead of assigning an SN to each bucket, which is a data unit at the time of transmission and reception, an SN is assigned to each data unit at the time of data processing, and even if one bucket is included in the data unit at the time of processing, error resistance is provided. In this case, if a retransmission request is made for one SN, retransmission instructions can be issued for all buckets in the data unit at the time of the processing, so that transmission efficiency can be improved.
- the transmitting / receiving apparatus of the present invention employs, in the above configuration, a configuration in which a plurality of ARQ control information are continuously transmitted. According to this configuration, the number of pits in the ARQ control information can be reduced, and especially when errors occur discretely, transmission efficiency can be improved.
- the transmitting / receiving apparatus of the present invention employs, in the above configuration, a configuration in which the configuration of ARQ control information is changed according to an error occurrence state or channel quality. According to this configuration, it is possible to adaptively select an optimal configuration according to an error occurrence situation or channel quality, and thus it is possible to improve transmission efficiency.
- the transmission / reception apparatus of the present invention employs, in the above configuration, a configuration in which the number of bits configuring the ARQ control information is changed according to an error occurrence state or channel quality. According to this configuration, the optimum number of bits can be adaptively selected according to the error occurrence situation or the channel quality, so that the transmission efficiency can be improved.
- the error control method of the present invention receives ARQ control information consisting of: a sequence number in which an error has occurred first, bit information indicating the presence or absence of a retransmission request for a sequence number subsequent to this sequence number, and The packet corresponding to the sequence number indicated by the ARQ control information and all the transmitted buckets corresponding to the sequence numbers following the most recent sequence number among the sequence numbers indicated by the ARQ control information are retransmitted. I did it.
- This one According to the method the error rate can be reduced without deteriorating the transmission efficiency.
- This description is based on Japanese Patent Application No. 11-1100732, filed on March 10, 1999, and Japanese Patent Application No. 11-1-0, filed on March 18, 1999. Based on 7 4 6 32 All of these details are included here. Industrial applicability
- the present invention can be applied to a communication terminal device and a base station device in a digital wireless communication system. As a result, wireless communication can be performed with a reduced error rate without deteriorating the transmission efficiency.
Description
Claims
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/674,729 US6909718B1 (en) | 1999-03-10 | 2000-03-09 | Transmission-reception apparatus and method for performing error control |
KR1020007012532A KR20010043472A (ko) | 1999-03-10 | 2000-03-09 | 송수신 장치 및 오류 제어 방법 |
AU29394/00A AU2939400A (en) | 1999-03-10 | 2000-03-09 | Transmitter/receiver |
CA 2331643 CA2331643A1 (en) | 1999-03-10 | 2000-03-09 | Transmitter/receiver |
EP20000907959 EP1077553A1 (en) | 1999-03-10 | 2000-03-09 | Transmitter/receiver |
US12/102,786 US7801146B2 (en) | 1999-03-10 | 2008-04-14 | Transmission-reception apparatus |
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10703299 | 1999-03-10 | ||
JP11/107032 | 1999-03-10 | ||
JP11/74632 | 1999-03-18 | ||
JP07463299A JP4015773B2 (ja) | 1999-03-10 | 1999-03-18 | 送受信装置 |
Related Child Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/674,729 A-371-Of-International US6909718B1 (en) | 1999-03-10 | 2000-03-09 | Transmission-reception apparatus and method for performing error control |
US11/128,317 Continuation US20050204252A1 (en) | 1999-03-10 | 2005-05-13 | Reception apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2000054450A1 true WO2000054450A1 (fr) | 2000-09-14 |
Family
ID=26415800
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2000/001419 WO2000054450A1 (fr) | 1999-03-10 | 2000-03-09 | Emetteur/recepteur |
Country Status (8)
Country | Link |
---|---|
US (3) | US6909718B1 (ja) |
EP (1) | EP1077553A1 (ja) |
JP (1) | JP4015773B2 (ja) |
KR (1) | KR20010043472A (ja) |
CN (1) | CN1296686A (ja) |
AU (1) | AU2939400A (ja) |
CA (1) | CA2331643A1 (ja) |
WO (1) | WO2000054450A1 (ja) |
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- 2000-03-09 WO PCT/JP2000/001419 patent/WO2000054450A1/ja not_active Application Discontinuation
- 2000-03-09 EP EP20000907959 patent/EP1077553A1/en not_active Withdrawn
- 2000-03-09 CN CN00800302A patent/CN1296686A/zh active Pending
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Also Published As
Publication number | Publication date |
---|---|
KR20010043472A (ko) | 2001-05-25 |
JP4015773B2 (ja) | 2007-11-28 |
US6909718B1 (en) | 2005-06-21 |
CA2331643A1 (en) | 2000-09-14 |
US20050204252A1 (en) | 2005-09-15 |
CN1296686A (zh) | 2001-05-23 |
EP1077553A1 (en) | 2001-02-21 |
US7801146B2 (en) | 2010-09-21 |
AU2939400A (en) | 2000-09-28 |
US20080198855A1 (en) | 2008-08-21 |
JP2000324161A (ja) | 2000-11-24 |
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