WO2000026948A1 - Plaquette a semi-conducteur et dispositif de cristallisation en phase vapeur - Google Patents

Plaquette a semi-conducteur et dispositif de cristallisation en phase vapeur Download PDF

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Publication number
WO2000026948A1
WO2000026948A1 PCT/JP1999/005968 JP9905968W WO0026948A1 WO 2000026948 A1 WO2000026948 A1 WO 2000026948A1 JP 9905968 W JP9905968 W JP 9905968W WO 0026948 A1 WO0026948 A1 WO 0026948A1
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Prior art keywords
single crystal
semiconductor
gas
crystal substrate
dopant gas
Prior art date
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PCT/JP1999/005968
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English (en)
Japanese (ja)
Inventor
Hiroki Ose
Original Assignee
Shin-Etsu Handotai Co., Ltd.
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Publication date
Application filed by Shin-Etsu Handotai Co., Ltd. filed Critical Shin-Etsu Handotai Co., Ltd.
Priority to JP2000580238A priority Critical patent/JP3888059B2/ja
Priority to US09/582,415 priority patent/US6475627B1/en
Priority to KR1020007007149A priority patent/KR100692989B1/ko
Priority to DE69943104T priority patent/DE69943104D1/de
Priority to EP99952798A priority patent/EP1043763B1/fr
Publication of WO2000026948A1 publication Critical patent/WO2000026948A1/fr

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45563—Gas nozzles
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45561—Gas plumbing upstream of the reaction chamber
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45563—Gas nozzles
    • C23C16/45574—Nozzles for more than one gas
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/14—Feed and outlet means for the gases; Modifying the flow of the reactive gases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12528—Semiconductor component
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/21—Circular sheet or circular blank
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31—Surface property or characteristic of web, sheet or block

Definitions

  • the present invention relates to a semiconductor wafer and a vapor phase growth apparatus, and more particularly to a semiconductor wafer in which a semiconductor thin film having a uniform resistivity distribution is formed on a main surface of a large-diameter silicon single crystal substrate, and a vapor phase used for manufacturing the same. It relates to a growth device. Background art
  • the use of semiconductor wafers in which a silicon single crystal thin film is formed on the main surface of a silicon single crystal substrate has increased, and the resistivity of the silicon single crystal thin film has increased. Is required to be uniform.
  • the uniformity of the resistivity means that the resistivity is made uniform in the plane of the silicon single crystal thin film.
  • a semiconductor wafer is required to have a large diameter.
  • a horizontal single-wafer-type vapor-phase growth apparatus is mainly used as an apparatus for growing a silicon single crystal thin film on the main surface of a silicon single crystal substrate.
  • FIG. 5 is a cross-sectional view schematically showing this conventional horizontal single-wafer-type vapor-phase growth apparatus
  • FIG. 6 is a vertical cross-sectional view thereof.
  • a silicon single crystal is placed at a central bottom in a transparent quartz glass reaction vessel 10 which is horizontally installed.
  • a susceptor 14 for mounting the substrate 12 horizontally is installed, and is connected to a rotating device (not shown) via a rotating shaft 16.
  • a gas inlet 18 is provided at one longitudinal end of the reaction vessel 10.
  • An exhaust port 20 is provided at the other end. For this reason, the flow of the gas introduced from the gas inlet 18 into the reaction vessel 1 and discharged from the exhaust port 20 to the outside is generally placed on the susceptor 14 along the longitudinal direction of the reaction vessel 10. It passes over the main surface of the placed silicon single crystal substrate 12.
  • the gas inlet 18 of the reaction vessel 10 is composed of six inlets 18a, 18b, "', 18f arranged in the width direction of the reaction vessel 10.
  • the two inner inlets hereinafter simply referred to as “inner inlets” 18a, 18 b
  • Two outer inlets hereinafter simply referred to as “outer inlets”
  • 18 e, 18 f, and two inlets between the inner and outer sides hereinafter simply “intermediate inlets”) 18 c and 18 d are imaginary in the longitudinal direction of the reaction vessel 10 and are arranged symmetrically with respect to a central axis passing through the center of the main surface of the silicon single crystal substrate 12 on the susceptor 14.
  • the inner introduction ports 18 a and 18 b are directed to the vicinity of the center of the main surface of the silicon single crystal substrate 12, and the outer inlets 18 e and 18 f are directed to the vicinity of the outer edge of the main surface of the silicon single crystal substrate 12.
  • the inlets 18c and 18d face an intermediate portion between the center and the outer edge of the main surface of the silicon single crystal substrate 12.
  • the common gas pipe 22 branches into three, and each of them passes through an MFC (Mass Flow Controller) 24, 26, 28 as a gas flow controller, and H 2 (Carrier gas) as a carrier gas.
  • MFC Mass Flow Controller
  • H 2 Carrier gas
  • a hydrogen source gas (not shown), a semiconductor source gas gas source (not shown), and a dopant gas source (not shown) are connected to each other.
  • an infrared radiation lamp 30 is arranged as a heating source for heating the silicon single crystal substrate 12 placed on the susceptor 14. By energizing the irradiation lamp 30, the main surface of the silicon single crystal substrate 12 is raised to a predetermined temperature. Further, a cooling means (not shown) for cooling the infrared radiation lamp 30 and the outer wall of the reaction vessel 10 is provided, so that a so-called cold wall type vapor phase growth apparatus is obtained. I have. In this cold-wall type gas phase growth apparatus, since the outer wall surface of the reaction vessel 10 is forcibly cooled by the refrigerant, deposits containing silicon as a main component are deposited on the inner wall surface of the reaction vessel 10. Can be prevented.
  • a silicon single crystal substrate 12 is placed horizontally on a susceptor 14 in a reaction vessel 10. Subsequently, MFC 2 4 from the H 2 gas gas source, common gas pipe 2 2, and 6 Tsunoshirube inlet 1 8 a, 1 8 b,, H 2 gas into the reaction vessel 1 in 0 through 1 8 f To replace the atmosphere in the reaction vessel 10 with hydrogen.
  • the susceptor 14 is rotated clockwise by the rotating device as shown by arrows in FIGS. 5 and 6 while the silicon single crystal substrate 12 is placed horizontally via the rotating shaft 16. Let it. Then, the silicon single crystal substrate 12 on the susceptor 14 is heated by the infrared radiation lamp 30 with no force, and the temperature on the main surface thereof is raised to a predetermined temperature.
  • MFCs 26 and 28, common gas pipes 22 and six inlets 18a, 18b, , A semiconductor source gas and a dopant gas are supplied into the reaction vessel 10.
  • the flow rates of the H 2 gas, the semiconductor source gas, and the dopant gas as the carrier gas are individually and precisely controlled by the MFCs 24, 26, and 28, respectively, and these gases are then mixed.
  • the raw material gas concentration and dopant hardly diffuse in the width direction from each of the six inlets 18a, 18b, ..., 18f arranged in the width direction of the reaction vessel 10. Process gas with the same gas concentration in reaction vessel 10 Will be introduced.
  • the process gas introduced into the reaction vessel 10 flows above the main surface of the silicon single crystal substrate 12 horizontally mounted on the susceptor 14 rotating about the rotation axis 16, Pass substantially parallel to and in one direction. At that time, a chemical reaction occurs, and a silicon single crystal thin film 32 is vapor-phase grown on the main surface of the silicon single crystal substrate 12.
  • the silicon single-crystal thin film 32 on the main surface of the silicon single-crystal substrate 12 using the conventional horizontal single-wafer-type vapor-phase growth apparatus shown in FIG. 5 and FIG.
  • the silicon single crystal substrate 12 has a diameter of 200 mm or less
  • the resistivity distribution in the diameter direction of the silicon single crystal thin film 32 formed on the main surface of the silicon single crystal substrate 12 is It was almost uniform.
  • the silicon single crystal substrate 12 has a relatively low dopant concentration of about 10 15 atoms / cm 3 , and the silicon single crystal substrate 12 has a diameter larger than 200 mm, for example, a diameter of 3 In the case of a large diameter of 100 mm, it has been found that there is a problem that slip dislocation is easily generated in the peripheral portion of the silicon single crystal thin film 32. Then, when an integrated circuit is formed in a region where the slip dislocation is generated, there arises a problem that a current leaks. The following are thought to be the causes of this slip dislocation.
  • the outer wall surface of the reaction vessel 10 is forcibly cooled by the refrigerant.
  • the temperature at the peripheral portion of the silicon single crystal substrate 12 tends to be lower than the temperature at the central portion. This tendency is remarkable in the case of a large diameter of 30 O mm, and when the temperature difference between the peripheral portion and the central portion of the silicon single crystal substrate 12 becomes so large that slip dislocation occurs. Conceivable.
  • the output for heating the peripheral portion of the silicon single crystal substrate 12 is made higher than the central portion, and the peripheral portion and the central portion are heated. If the temperature difference of the silicon single crystal thin film 32 is reduced, the resistivity of the peripheral portion of the silicon single crystal thin film 32 becomes a value deviated from the resistivity of the central portion. A problem arises in that the resistivity distribution becomes uneven.
  • the flow rate of the dopant gas supplied on the main surface of the silicon single crystal substrate 12 must be adjusted in the width direction of the reaction vessel 10. If you change it and adjust it.
  • the present invention has been made in view of the above problem, and has a uniform resistivity and a slip on a main surface of a large-diameter semiconductor single crystal substrate having a diameter of 30 O mm or more, which has a relatively low dopant concentration.
  • the above object is achieved by the following semiconductor wafer and a method of manufacturing the same according to the present invention. That is, the semiconductor ⁇ E one tooth according to the present invention, the following diameter 30 Omm than 400 mm, the dopant concentration of 4 X 10 13 at omsZcm 3 or 3 X 10 18 atoms Z cm 3 main below the semiconductor single crystal substrate A semiconductor thin film having a resistivity distribution in the diameter direction of ⁇ 3% or less is formed on the surface.
  • the semiconductor wafer according to the present invention is a large-diameter semiconductor single crystal substrate having a diameter of 300 mm or more and 400 mm or less, and a dopant concentration of 4 ⁇ 10 13 at oms / cm 3 or more and 3 ⁇ 10 10
  • the resistivity distribution in the diameter direction is ⁇ 3% or less on the main surface without substantially generating slip dislocations.
  • the formation of a semiconductor thin film achieves both the large diameter and the uniform resistivity required for recent semiconductor wafers, thus increasing the yield of semiconductor chips and improving the yield.
  • the semiconductor single crystal substrate has a p-type conductivity and a resistivity of 0.03 ⁇ ⁇ cm or more and 300 ⁇ ⁇ cm or less. Also in this range, when it is considered that a semiconductor device is actually manufactured using a semiconductor wafer, it is particularly desirable that the resistivity be 1 ⁇ ⁇ cm or more and 20 ⁇ ⁇ cm or less. In that case, it is preferable to use boron as a dopant added to the semiconductor single crystal substrate from a practical viewpoint such as ease of handling and control in using the boron.
  • the diameter of the semiconductor single crystal substrate is 300 mm.
  • the diameter of the semiconductor single crystal substrate is 300 mm.
  • 4 X 1 0 13 atoms / cm 3 or more 3 X 1 0 18 at om s / cm 3 or less of the main surface on the resistivity distribution in the diameter direction of the low concentration semiconductor single crystal substrate is uniform below 3% Sat The effect is fully exhibited.
  • the semiconductor single crystal substrate is a silicon single crystal substrate
  • the semiconductor thin film is a silicon single crystal thin film. It is preferred that That is, by achieving both a large diameter and a uniform resistivity in a silicon single crystal wafer, which is the mainstream of the current semiconductor wafers, a wide variety of uses are expected in the manufacture of semiconductor devices.
  • a vapor phase growth apparatus includes a reaction vessel, and a plurality of gas inlets arranged in a width direction of the reaction vessel, and a main surface of a semiconductor single crystal substrate rotating in the reaction vessel.
  • a vapor source for supplying a semiconductor raw material gas in a substantially parallel and unidirectional manner from a plurality of gas inlets and vapor-phase growing a semiconductor thin film on a main surface of a semiconductor single crystal substrate comprising: It has a main dopant gas pipe for supplying a dopant gas to all of the gas inlet ports, and a sub-dopant gas pipe for supplying a dopant gas to a specific one of the plurality of gas inlet ports.
  • the main dopant gas pipe for supplying the dopant gas to all of the plurality of gas inlets and the sub-dopant for supplying the dopant gas to the specific gas inlet are provided.
  • a dopant gas is supplied from all gas inlets to the main surface of the semiconductor single crystal substrate in the reaction vessel through the main dopant gas pipe, and the main Realizing the overall resistivity of the semiconductor thin film to be vapor-phase-grown on the surface near a predetermined target value, and using a specific gas inlet through a sub-doped gas pipe to obtain the main resistance of the semiconductor single crystal substrate in the reaction vessel.
  • the resistivity distribution in the diameter direction of the semiconductor thin film formed on the surface can be reduced to 3% or less of soil.
  • the dopant gas through the main dopant gas pipe and the sub-dopant gas pipe After the supply conditions of the semiconductor thin film are adjusted so that the resistivity distribution in the diameter direction of the semiconductor thin film is uniformed to, for example, ⁇ 3% or less, the target resistivity of the semiconductor thin film is changed to increase or decrease. Even if it becomes necessary to maintain the ratio of the dopant gas supplied via the main drain gas pipe and the sub-main dopant gas pipe, the supply amount of hydrogen gas for diluting the dopant gas is maintained.
  • the target resistivity can be changed while maintaining the uniformity of the resistivity distribution. For this reason, it is possible to easily and promptly respond to a change in the target resistivity of the semiconductor thin film, thereby achieving an improvement in productivity.
  • the plurality of gas inlets are disposed inside the reaction vessel in the width direction and outside the reaction vessel in the width direction.
  • a secondary dopant gas pipe One or two of these inner inlets, outer inlets, and intermediate inlets.
  • the plurality of gas inlets include three types of gas inlets: the inner inlet, the outer inlet, and the intermediate inlet, and the secondary dopant gas pipe supplies the dopant gas.
  • the specific gas inlet to be supplied is one or two of these three types of inner inlet, outer inlet, and intermediate inlet
  • the dopant is supplied through the secondary dopant gas pipe. Gas is supplied only to the inner inlet, only to the outer inlet, only to the intermediate inlet, or alternatively to the inner and intermediate inlets, or to the intermediate and outer inlets It can be supplied to the inlet.
  • the dopant gas supplied to the gas inlet through the main dopant gas pipe that is, the inner inlet, the outer inlet, and the intermediate inlet is imagined in the width direction of the reaction vessel.
  • the central axis passing through the center of the main surface of the semiconductor single crystal substrate Near the center of the main surface of the semiconductor single crystal substrate from the semiconductor inlet, from the outer gas inlet near the outer edge of the semiconductor single crystal substrate, and from the intermediate gas inlet to the center of the main surface of the semiconductor single crystal substrate.
  • the dopant gas supplied entirely from the gas inlets of all three types to the main surface of the semiconductor single crystal substrate via the main dopant gas pipe, and one or two of the three types via the auxiliary dopant gas pipe The resistance of the semiconductor thin film formed on the main surface of the semiconductor single crystal substrate is combined with the dopant gas locally supplied to the main surface of the semiconductor single crystal substrate in the reaction vessel from the specific type of gas inlet. The rate is equalized.
  • a case is described in which a plurality of gas inlets arranged in the width direction of the reaction vessel are composed of three types of gas inlets: an inner inlet, an outer inlet, and an intermediate inlet.
  • an inner inlet an inner inlet
  • an outer inlet an outer inlet
  • an intermediate inlet a gas inlet
  • any one of these three or more gas inlets can be selected as the specific gas inlet for supplying the dopant gas through the secondary dopant gas pipe, or two or more gas inlets can be selected. You can use any combination of mouths.
  • a dopant gas control device for controlling supply of a dopant gas is provided in each of the main dopant gas pipe and the sub-dopant gas pipe.
  • the dopant gas control device is provided in each of the main dopant gas pipe and the sub-dopant gas pipe, a plurality of gases are provided through the main dopant gas pipe.
  • a plurality of gases are provided through the main dopant gas pipe.
  • Half from all gas inlets of inlet The dopant gas supplied to the entire main surface of the conductor single crystal substrate and the dopant gas additionally supplied locally to the main surface of the semiconductor single crystal substrate from a specific gas inlet through a sub-dopant gas pipe are separately provided.
  • the resistivity distribution of the semiconductor thin film can be adjusted with high precision, and even when the semiconductor thin film is formed on the main surface of a large-diameter semiconductor single crystal substrate, the semiconductor The resistivity distribution in the diameter direction of the thin film becomes more uniform.
  • the auxiliary dopant gas pipe is composed of two types of dopant gas pipes
  • a dopant gas control device is installed in each of the two types of dopant gas pipes.
  • the vapor phase growth apparatus is a cold wall type vapor phase growth apparatus.
  • the outer wall surface of the reaction vessel is forcibly cooled by the refrigerant, the deposition of deposits generated during the vapor phase growth on the inner wall surface of the reaction vessel is prevented, and a higher quality semiconductor thin film is formed. Is done. BRIEF DESCRIPTION OF THE FIGURES
  • FIG. 1 is a cross-sectional view schematically showing a horizontal single-wafer-type vapor-phase growth apparatus used in a method for manufacturing a semiconductor wafer according to an embodiment of the present invention.
  • FIG. 2 is a graph showing the temperature of a semiconductor wafer manufactured using the vapor phase growth apparatus shown in FIG. 1.
  • FIG. 3 is a diagram showing the resistance in the diameter direction of the semiconductor wafer manufactured using the vapor growth apparatus shown in FIG. It is a graph which shows a rate distribution.
  • FIG. 4 is a graph showing a resistivity distribution in a diameter direction of a semiconductor wafer manufactured using a conventional vapor phase growth apparatus.
  • FIG. 2 is a cross-sectional view schematically showing the device.
  • FIG. 6 is a longitudinal sectional view schematically showing a horizontal single-wafer-type vapor-phase growth apparatus used in a conventional semiconductor wafer manufacturing method.
  • FIG. 1 is a cross-sectional view schematically showing a horizontal single-wafer-type vapor-phase growth apparatus used in a method for manufacturing a semiconductor wafer according to one embodiment of the present invention.
  • a vertical cross-sectional view schematically showing a horizontal single-wafer-type vapor-phase growth apparatus used for manufacturing the semiconductor wafer according to the present embodiment is basically the same as FIG.
  • the above-mentioned FIG. 6 is diverted, and illustration thereof is omitted.
  • the same elements as those of the conventional horizontal single-wafer type vapor phase growth apparatus shown in FIGS. 5 and 6 are denoted by the same reference numerals, and description thereof will be omitted or simplified.
  • a transparent stone placed horizontally is used in the horizontal single-wafer-type vapor-phase growth apparatus used in the method for manufacturing a semiconductor wafer according to the present embodiment.
  • a susceptor 14 on which a silicon single crystal substrate 12 is placed horizontally is installed at the center bottom of a reaction vessel 10 made of British glass, and connected to a rotating device (not shown) via a rotating shaft 16.
  • a gas introduction port 18 is provided at one end in the longitudinal direction of the reaction vessel 10, and an exhaust port 20 is provided at the other end. For this reason, the flow of the gas introduced into the reaction vessel 10 from the gas inlet port 18 and discharged to the outside from the exhaust port 20 is generally placed on the susceptor 14 along the longitudinal direction of the reaction vessel 10. It passes over the main surface of the placed silicon single crystal substrate 12.
  • the gas inlet 18 of the reaction vessel 10 is composed of six inlets 18a, 18b, 18f arranged in the width direction of the reaction vessel 10. I have. And these Of the six inlets 18a, 18b, ..., 18f, the inner inlet 18a, 18b, the outer inlet 18e, 18f, and the intermediate inlet 1
  • the reference numerals 8c and 18d are provided symmetrically with respect to a central axis passing through the center of the main surface of the silicon single crystal substrate 12 on the susceptor 14 and imaginary in the longitudinal direction of the reaction vessel 10.
  • the inner introduction ports 18 a and 18 b are directed to the vicinity of the center of the main surface of the silicon single crystal substrate 12, and the outer inlets 18 e and 18 f are directed to the vicinity of the outer edge of the main surface of the silicon single crystal substrate 12.
  • the inlets 18c and 18d face an intermediate portion between the center and the outer edge of the main surface of the silicon single crystal substrate 12.
  • the six inlets 18a, 18!),..., 18f are all connected to a common gas pipe 22a.
  • the common gas pipe 2 2 a is branched into three, through the MF C 24, 26, 2 8 a as their respective gas flow controller, a gas source of the H 2 gas as a carrier gas (Not shown), a semiconductor source gas source (not shown), and a dopant gas source (not shown).
  • a gas source of the H 2 gas as a carrier gas
  • a semiconductor source gas source not shown
  • a dopant gas source not shown.
  • the inner inlets 18a and 18b are both connected to the first auxiliary dopant gas pipe 22b.
  • the first sub-dopant gas pipe 22 b is connected to a dopant gas source (not shown) via an MFC 28 b as a dopant gas flow controller.
  • the intermediate introduction ports 18c and 18d are both connected to the second auxiliary dopant gas pipe 22c.
  • the second sub-dopant gas pipe 22 c is connected to a gas source of the dopant gas through the MFC 28 c as a dopant gas flow controller. (Not shown).
  • the semiconductor as a raw material gas for example, S i C l 4 (tetrachlorosilane) gas, S i H 2 C 1 2 ( dichlorosilane) gas, S i HC 1:! (Trichlorosilane) gas, or S i H, (monosilane) silicon-based gas such gas is used as a dopant gas, for example, B, etc. 2 H 6 (diborane) gas or PH 3 (phosphine) gas is used.
  • heating is performed by heating the silicon single crystal substrate 12 horizontally mounted on the susceptor 14 to raise the main surface of the silicon single crystal substrate 12 to a predetermined temperature.
  • an infrared radiation lamp 30 is arranged as a source.
  • a cooling means (not shown) for cooling the infrared radiation lamp 30 and the outer wall of the reaction vessel 10 is provided, and a cold wall type vapor phase growth apparatus is obtained.
  • a large-diameter silicon single crystal substrate 1 2 having a relatively low dopant concentration and a diameter of 30 Omm or more was used.
  • a method for forming a silicon single crystal thin film having a uniform resistivity and substantially no slip dislocation on the main surface of the present invention will be described.
  • a large diameter of not less than 30 Omm and not more than 400 mm and a dopant concentration of 4 X 10 i: s at 0111 5 (: A low-concentration silicon single crystal substrate 12 of 111 3 or more and 3 10 18 atoms / cm : i or less is horizontally placed, where the dopant concentration is 4 X 10 I3 at oms Zcm 3
  • the dopant concentration is higher than 3 ⁇ 10 18 atoms Zcm 3
  • an auto-drop phenomenon occurs.
  • the silicon single crystal thin film formed on the main surface of the silicon single crystal substrate 12 cannot be ignored, and the resistivity distribution in the diameter direction is ⁇ 3% or less. It becomes difficult to do.
  • the dopant concentration is 4 X 10 1 atoms / c ⁇ !
  • the range of 3 to 3 ⁇ 10 18 at omsZcm 3 is approximately equivalent to the range of 0.03 ⁇ ⁇ cm to 300 ⁇ ⁇ cm in terms of resistivity.
  • H gas was introduced into the reaction vessel 10 from the gas source of H 2 gas through the MFC 24, the common gas pipe 22a, and the six inlets 18a, 18b, "', 18f. 2 gas is supplied to replace the atmosphere in the reaction vessel 10 with hydrogen, and the susceptor 14 is placed on a rotating device via the rotating shaft 16 while the silicon single crystal substrate 12 is placed horizontally. Rotate clockwise as shown by the arrows in Fig. 1 and Fig. 6. Then, the infrared radiation lamp 30 moves the silicon single crystal substrate 12 on the susceptor 14 according to a predetermined temperature cycle. The main surface is heated to a predetermined set temperature.
  • the heating output distribution from the infrared radiation lamp 30 is adjusted in advance. That is, in the cold-wall type vapor phase epitaxy apparatus, since the outer wall of the reaction vessel 10 is forcibly cooled by the coolant, the influence of the influence on the outer wall of the silicon single crystal substrate 12 close to the wall is The heat of the department is easily taken away. For this reason, the peripheral portion of the silicon single crystal substrate 12 is heated more strongly than its central portion, so that the temperature difference between the peripheral portion and the central portion is suppressed from increasing, and The temperature distribution is adjusted in advance so that the slip dislocation does not occur in the silicon single crystal thin film formed in step (1).
  • the resistivity of the peripheral portion of the silicon single crystal thin film is larger than that of the central portion. It should be noted that, in the case of n-type, conversely, the resistivity of the peripheral portion of the silicon single crystal thin film tends to be higher than that of the central portion.
  • the semiconductor material gas is supplied from the gas source to the MFC 26, the common gas pipe 22a, and the six inlets 18a, 18b,.
  • the MFCs 28a, 28b, 28c, the common gas pipe 22a, the first sub-dopant gas pipe 22b, and the second sub-dopant gas pipe 22c, respectively, are provided from the dopant gas gas source.
  • the dopant gas is supplied into the reaction vessel 10 through the six inlets 18a, 18b, ..., 18f.
  • the dopant gas supplied from the six inlets 18a, 18b, -'-, and 18f via the common gas pipe 22a functioning as the main dopant gas pipe is reacted. Feed into container 10. Further, the dopant gas supplied through the first auxiliary dopant gas pipe 22b is additionally supplied into the reaction vessel 10 from the inner introduction ports 18a and 18b. Further, the dopant gas supplied from the intermediate inlets 18c and 18d through the second auxiliary dopant gas pipe 22c is additionally supplied into the reaction vessel 10.
  • the basic reference value of the resistivity of the silicon single crystal thin film to be vapor-phase grown on the main surface of the silicon single crystal substrate 12 is based on the common gas pipe 22a functioning as the main dopant gas pipe.
  • This is mainly realized by adjusting the concentration of the dopant gas supplied from the six inlets 18a, 18b, "", and 18f through the first inlet port.
  • the concentration of the dopant gas additionally supplied from the inner inlets 18a, 18b and the intermediate inlets 18c, 18d as specific gas inlets via the second auxiliary dopant gas pipe 22c, respectively.
  • the flow rates of the H 2 gas and the semiconductor raw material gas as the carrier gas are individually and precisely controlled by the MFC 24 and the MFC 26, respectively.
  • the flow rate of the dopant gas supplied through the common gas pipe 22a functioning as the main dopant gas pipe is precisely controlled by the MFC 28a, and similarly, the first auxiliary dopant gas pipe 22b and the second
  • the flow rates of the dopant gas additionally supplied through the secondary dopant gas pipe 22c are individually and precisely controlled by the MFC 28b and the MFC 28c, respectively.
  • the dopant gases whose flow rates were precisely controlled by the MFCs 28a, 28b, and 28c were then mixed, and the six inlet ports 1 arranged in the width direction of the reaction vessel 10 were formed. 8a, 18b, "', and 18f are introduced into the reaction vessel 10 with almost no diffusion in the width direction.
  • the process gas introduced into the reaction vessel 10 is composed of a silicon single crystal substrate 12 mounted on a susceptor 14 rotating about a rotation axis 16. Passes above the main surface of the main surface substantially parallel to the main surface and in one direction.
  • FIG. 2 is a graph showing a temperature cycle when a semiconductor wafer is manufactured using the vapor phase growth apparatus shown in FIG. 1
  • FIG. 3 is a graph showing a temperature cycle manufactured using the vapor phase growth apparatus shown in FIG. 4 is a graph showing a resistivity distribution in a diameter direction of a semiconductor wafer.
  • the silicon single crystal substrate 12 placed on the susceptor 14 in the reaction vessel 10 has a diameter of 300 mm ⁇ 0.2 mm, and B (boron) is of such a degree that it is not necessary to consider the effect of the auto-doping phenomenon.
  • Resistivity added at a relatively low concentration 1 ⁇ ⁇ 0 111 or more and 200 'cm or less (Converted to a dopant concentration, 6 X 10 "at omsZcm 3 or more 2 X 10 16 At omsZcm 3 or less) is used.
  • H 2 gas is supplied from the six inlets 18a, 18b, "', and 18f to the reaction vessel. Then, the inside of the reaction vessel 10 is brought into an H 2 atmosphere by using the susceptor 14, and the susceptor 14 is rotated clockwise, for example, while the silicon single crystal substrate 12 is placed horizontally by a rotating device. .
  • an infrared radiation lamp 30 as a heating source is energized to heat the silicon single crystal substrate 12 on the susceptor 14, and as shown in the temperature cycle of FIG.
  • the temperature on the surface is increased to 110 ° C (temperature increasing step).
  • the substrate is kept at the temperature of 110 ° C. for a certain period of time, and a heat treatment for removing a natural oxide film formed on the main surface of the silicon single crystal substrate 12 is performed (heat treatment step).
  • conditions of a heating distribution such that no slip dislocation occurs in the silicon single crystal thin film formed on the main surface of the silicon single crystal substrate 12 are determined in advance, and heat treatment is performed according to the conditions.
  • a heating output of about 60% is provided near the peripheral portion of the silicon single crystal substrate 12, and a heating output of about 40% is provided near the central portion.
  • the six inlets 18a, 18b, "', 18f A process gas composed of H 2 gas as a carrier gas, a semiconductor raw material gas, and a dopant gas is supplied into the reaction vessel 10 through the reactor.
  • the H 2 gas as a carrier gas is precisely controlled by the MFC 24, and is uniformly distributed from all the inlets 18a, 18b, ..., 18f at a flow rate of 70 liters / min. Supply into reaction vessel 10.
  • a mixed gas obtained by bubbling with hydrogen S i HC 1 3 such as, for example, liquid as the semiconductor material gas, precisely control the gas supplied from this common semiconductor material gas source by MF C 26 , 22 liters and a flow rate of Z min.
  • a common dopant gas source for example, hydrogen-diluted B 2 H 6 gas is used, and six inlets 18 a, 18 are provided through a common gas pipe 22 a functioning as a main dopant gas pipe.
  • the dopant gas supplied via the common gas pipe 22 a functioning as the main dopant gas pipe, and the first sub-dopant gas pipe 22 b and the second sub-dopant gas pipe 22 c are respectively It is controlled individually and precisely by MFC 28a, 28b, 28c.
  • a chemical reaction is caused by the process gas supplied into the reaction vessel 10, and the resistivity is 13 ⁇ ⁇ cm and the resistivity distribution is ⁇ 3% or less on the main surface of the silicon single crystal substrate 12.
  • a p-type silicon single crystal thin film 32 is vapor-phase grown to a thickness of 4 ⁇ (vapor phase growth step).
  • the inside of the reaction vessel 10 is sufficiently purged with the second gas (purge step). Then, the energization of the infrared radiation lamp 30 as a heating source is stopped, and the semiconductor wafer having the silicon single crystal thin film 32 formed on the main surface of the silicon single crystal substrate 12 is heated to 650 ° C. Cool (cooling step). Thereafter, the semiconductor wafer is taken out of the reaction vessel 10.
  • the resistivity was measured using an SCP (Surface Charge Profiler) device of QC Solutions, located in Woburn, Mass., USA.
  • SCP Surface Charge Profiler
  • SPV Surface Photo Voltage
  • the sample wafer is heat-treated at about 300 ° C. for a short time to make the charge amount of the native oxide film formed on the surface constant, and then G a N (gallium nitride) is formed on the sample wafer surface.
  • G a N gallium nitride
  • Light at a wavelength of 450 nm from an LED (Light Emitting Diode) is applied at about 4 OHz.
  • FIG. 4 is a graph showing a resistivity distribution in a diameter direction of a semiconductor wafer manufactured using the conventional vapor phase growth apparatus shown in FIG.
  • a B 2 H 6 gas diluted with hydrogen was used as a dopant gas, and 160 cm from each of all the inlets 18 a, 18 b, 18 ′, 18 f.
  • the size, resistivity, and carrier gas of the silicon single crystal substrate 12 used are the same except that they are supplied uniformly into the reaction vessel 10 at a flow rate of 3 Z, and are vapor-phase grown at a temperature of 110 ° C.
  • semiconductor raw material gas, flow rate, temperature rise process, heat treatment process, vapor phase growth process, and purge The conditions of the process, the temperature cycle leading to the cooling process, and the conditions for measuring the resistivity of the silicon single crystal thin film 32 are all the same as those in the above embodiment.
  • the resistivity of the silicon single crystal thin film 32 formed on the main surface of the silicon single crystal substrate 12 using the conventional vapor phase growth apparatus was measured at intervals of 1 Omm in the diameter direction. The results shown in the graph of FIG. 4 were obtained.
  • the vicinity of the outer edge of the silicon single crystal thin film 32 in the comparative example was heated more strongly than the vicinity of the center, so that the polon supplied as the p-type dopant was taken into the silicon single crystal thin film 32.
  • the first sub dopant gas pipe 22 b and the dopant corresponding to the decrease in the resistivity near the outer edge are used. Since the additional supply was performed near the center through the second auxiliary dopant gas pipe 22c, a decrease in the resistivity near the outer edge of the silicon single crystal thin film 32 was not observed.
  • the average resistivity of all the measurement points of the silicon single crystal thin film 32 was 12.97 Q'cm, and the resistance was set to the target value. A value very close to the rate of 13 ⁇ ⁇ cm was obtained.
  • the resistivity distribution of the silicon single crystal thin film 32 is expressed by the following equation.
  • the average resistivity at all the measurement points of the silicon single crystal thin film 32 is 11.62 ⁇ ⁇ cm.
  • the maximum resistivity of the silicon single crystal thin film 32 is 12.02 ⁇ cm and the minimum resistivity is 10.77 ⁇ cm, the resistivity distribution is ⁇ 5.48%, and It exceeded 3%.
  • the resistivity distribution is 10.8%.
  • the silicon single crystal thin film 32 is vapor-phase-grown on the main surface of the semi-silicon single crystal substrate 12 having a large diameter of 300111111 ⁇ 0.2 mm. Even in this case, it has been confirmed that the uniformity of the resistivity distribution in the diameter direction of the silicon single crystal thin film 32 can be sufficiently improved as compared with the conventional case.
  • the present inventors have found that the resistivity distribution of the silicon single crystal thin film 32 shows that the semiconductor raw material gas supplied to the reaction vessel 10 It was clarified that some fluctuations occurred depending on the dopant gas concentration and the reaction temperature.
  • the method for manufacturing a semiconductor wafer according to the above embodiment is applied, when the silicon single crystal thin film 32 is vapor-phase grown on the main surface of the low-concentration doped silicon single crystal substrate 12 having a diameter of 300 mm, It is easily possible to suppress the resistivity distribution of the silicon single crystal thin film 32 to ⁇ 3% or less (according to equation (1)) or 6% or less (according to equation (2)).
  • the resistivity of the silicon single crystal thin film 32 vapor-phase grown on the main surface of the silicon single crystal substrate 12 The distribution is ⁇ 3% or less (when using the formula (1)) or 6% or less (the formula (2) ). Furthermore, even in the case of a silicon single crystal substrate 12 having a diameter exceeding 40 O mm, a silicon single crystal substrate 12 of this size is manufactured with sufficiently high quality and stable at the present stage. Although it is difficult to do so, it is possible to improve the uniformity of the resistivity distribution in the diameter direction of the silicon single crystal thin film 32 grown on the silicon single crystal substrate 12 main surface by vapor phase growth.
  • the case where the p-type silicon single crystal thin film 32 is grown on the main surface of the silicon single crystal substrate 12 by vapor phase growth is described.
  • There is a tendency to be relatively high near the center so that the inner inlets 18a, 18b and 18b are provided through the first sub-dopant gas pipe 22b and the second sub-dopant gas pipe 22c.
  • the configuration is such that dopant gas is additionally supplied into the reaction vessel 10 from the intermediate inlets 18c and 18d.
  • the resistivity of the silicon single crystal thin film 32 tends to be relatively high in the vicinity of the peripheral portion.
  • the outer inlets 18e, 18f or the outer inlets 18e, 18f and the intermediate inlets 18c, 18d allow additional supply of dopant gas into the reaction vessel 10. Is preferable.
  • the resistivity of the silicon single crystal thin film 32 may locally increase depending on the vapor growth conditions.
  • the specific gas inlet corresponding to the region, that is, the inner inlet It is preferable that a dopant gas is additionally supplied to one or two kinds of inlets selected from the mouth, the outer inlet, and the intermediate inlet through a secondary dopant gas pipe.
  • the inner inlets 18a, 18b and the intermediate inlet 18c, via the first sub-dopant gas pipe 22b and the second sub-dopant gas pipe 22c are additionally supplied into the reaction vessel 10 from 18 d, it is also possible to supply H. gas instead of the dopant gas.
  • the dopant gas supplied from all the inlets 18a, 18b, "', and 18f via the common gas pipe 22a functioning as the main dopant gas pipe is locally supplied. it is possible to dilute.
  • the resistivity distribution of the silicon single crystal thin film 32 can be made uniform as in the case of the above embodiment.
  • the resistivity distribution in the diameter direction on the main surface is ⁇ 3% or less without substantially generating slip dislocations.
  • the formation of the semiconductor thin film achieves both the large diameter and the uniform resistivity that are required of recent semiconductor wafers, thus increasing the yield of semiconductor chips and improving the yield. Can greatly contribute.
  • the main dopant gas pipe for supplying the dopant gas to all of the plurality of gas inlets and the sub-dopant gas for supplying the dopant gas to a specific gas inlet are provided.
  • the dopant gas is supplied from all the gas inlets to the main surface of the semiconductor single crystal substrate in the reaction vessel via the main dopant gas piping, and the main surface of the semiconductor single crystal substrate is supplied.
  • the overall resistivity of the semiconductor thin film to be vapor-grown on it can be achieved near a predetermined target value, and the semiconductor single crystal in the reaction vessel can be supplied from a specific gas inlet via a sub-dope gas pipe.
  • the resistivity distribution of the semiconductor thin film can be adjusted. Therefore, even when a semiconductor thin film is formed on the main surface of a large-diameter semiconductor single crystal substrate, uniformity of the resistivity of the semiconductor thin film can be achieved.
  • the semiconductor thin film After adjusting the supply conditions of the dopant gas through the main dopant gas pipe and the sub-dopant gas pipe so that the resistivity distribution in the diameter direction of the semiconductor thin film is uniformed to, for example, ⁇ 3% or less, the semiconductor thin film Even if it becomes necessary to change the target resistivity of the dopant gas, the dopant gas is diluted while maintaining the ratio of the dopant gas supplied through the main dopant gas pipe and the secondary dopant gas pipe. By controlling the amount of hydrogen gas supplied, the target resistivity can be changed while maintaining the uniformity of the resistivity distribution, so that the target resistivity of the semiconductor thin film can be changed. It is possible to respond easily and quickly, and to improve productivity.
  • the plurality of gas inlets include three types of gas inlets: an inner inlet, an outer inlet, and an intermediate inlet. Since the specific gas inlet for supplying the dopant gas is one or two of the three types, the resistivity of the semiconductor thin film that is vapor-grown on the main surface of the semiconductor single crystal substrate is reduced. A specific gas inlet corresponding to the region where the height is locally high, that is, one or two selected inlets among the inner inlet, the outer inlet, and the intermediate inlet ⁇ Via the IJ dopant gas pipe Since the dopant gas can be additionally supplied, the resistivity of the semiconductor thin film formed on the main surface of the semiconductor single crystal substrate can be made uniform.
  • the main dopant gas pipe And a dopant gas control device that controls the supply of dopant gas to each of the secondary dopant gas pipes allows the entire main surface of the semiconductor single crystal substrate to reach from all gas inlets through the main dopant gas pipe. Since the supplied dopant gas and the dopant gas locally additionally supplied to the main surface of the semiconductor single crystal substrate from a specific gas inlet through a sub-dopant gas pipe are separately controlled, the semiconductor thin film It is possible to adjust the resistivity distribution with high precision, and even when a semiconductor thin film is formed on the main surface of a large-diameter semiconductor single crystal substrate, the resistivity distribution in the diameter direction of the semiconductor thin film can be further improved. It can be uniform.

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Abstract

L'invention concerne une plaquette à semi-conducteur qui comprend un substrat semi-conducteur monocristallin, ayant une concentration en dopant relativement faible et un diamètre égal ou supérieur à 300 mm; et une couche mince semi-conductrice formée sur une surface majeure du substrat, ayant une résistivité uniforme et ne présentant sensiblement pas de dislocation par glissement. Elle concerne également un dispositif de cristallisation en phase vapeur permettant de produire ladite plaquette. Les gaz dopants amenés par un tuyau de gaz commun (22a), tenant lieu de tuyau de gaz dopant principal, sont introduits dans une cuve à réaction (10) par six orifices d'entrée (18a, 18b... 18f) disposés longitudinalement à l'intérieur de ladite cuve. Les gaz dopants amenés par un premier et un second tuyau auxiliaire (22b, 22c) sont aussi amenés dans la cuve à réaction (10) par les orifices d'entrée internes (18a, 18b) et les orifices d'entrée moyens (18c, 18d), qui tiennent lieu d'orifices d'entrée spécifiques.
PCT/JP1999/005968 1998-10-29 1999-10-28 Plaquette a semi-conducteur et dispositif de cristallisation en phase vapeur WO2000026948A1 (fr)

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JP2000580238A JP3888059B2 (ja) 1998-10-29 1999-10-28 気相成長装置
US09/582,415 US6475627B1 (en) 1998-10-29 1999-10-28 Semiconductor wafer and vapor growth apparatus
KR1020007007149A KR100692989B1 (ko) 1998-10-29 1999-10-28 반도체 웨이퍼 및 기상성장 장치
DE69943104T DE69943104D1 (de) 1998-10-29 1999-10-28 Vorrichtung zur gasphasenabscheidung für halbleiterscheiben mit dotiergas-zufuhreinrichtung
EP99952798A EP1043763B1 (fr) 1998-10-29 1999-10-28 Dispositif de croissance en phase vapeur pour plaquettes semiconductrices avec systeme d'alimentation en gaz dopant

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JP10326034A JP2000138168A (ja) 1998-10-29 1998-10-29 半導体ウェーハ及び気相成長装置

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US6814811B2 (en) 2004-11-09
US6475627B1 (en) 2002-11-05
JP3888059B2 (ja) 2007-02-28
EP1043763A4 (fr) 2006-08-02
EP1043763B1 (fr) 2011-01-05
JP2000138168A (ja) 2000-05-16
DE69943104D1 (de) 2011-02-17
KR20010033633A (ko) 2001-04-25
EP1043763A1 (fr) 2000-10-11

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