WO1999007095A1 - Demodulateur de multiplexage par division en frequences en quadrature - Google Patents

Demodulateur de multiplexage par division en frequences en quadrature Download PDF

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Publication number
WO1999007095A1
WO1999007095A1 PCT/JP1998/003391 JP9803391W WO9907095A1 WO 1999007095 A1 WO1999007095 A1 WO 1999007095A1 JP 9803391 W JP9803391 W JP 9803391W WO 9907095 A1 WO9907095 A1 WO 9907095A1
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WIPO (PCT)
Prior art keywords
signal
output
phase
circuit
symbol
Prior art date
Application number
PCT/JP1998/003391
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English (en)
Japanese (ja)
Inventor
Kenichiro Hayashi
Tomohiro Kimura
Sadashi Kageyama
Yasuo Harada
Akira Kisoda
Shigeru Soga
Seiji Sakashita
Original Assignee
Advanced Digital Television Broadcasting Laboratory
Matsushita Electric Industrial Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP01989298A external-priority patent/JP3238120B2/ja
Application filed by Advanced Digital Television Broadcasting Laboratory, Matsushita Electric Industrial Co., Ltd. filed Critical Advanced Digital Television Broadcasting Laboratory
Publication of WO1999007095A1 publication Critical patent/WO1999007095A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/02—Channels characterised by the type of signal
    • H04L5/06—Channels characterised by the type of signal the signals being represented by different frequencies

Definitions

  • the present invention relates to an orthogonal frequency division multiplexing signal demodulation device used for digital transmission and digital communication by an orthogonal frequency division multiplexing transmission method, and in particular, to a frequency synchronization technology of a reproduction carrier used for demodulation on a receiving side,
  • the present invention also relates to a technique for removing the effect of phase fluctuation common to all subcarriers due to tuner phase noise and the like.
  • OFDM Orthogonal Frequency Division Multiplex
  • This OFDM transmission system is a system in which a large number of subcarriers orthogonal to each other are modulated by digital data to be transmitted, and the modulated waves are multiplexed and transmitted.
  • the number of subcarriers used increases from several hundred to several thousand, the symbol period of each modulated wave becomes extremely long, so that it is not affected by multipath interference. It has the following characteristics.
  • Figure 1 shows a block diagram of the basic configuration of the OFDM transmission system.
  • FIG. 1 thick arrows indicate complex signals, and thin arrows indicate real signals.
  • the signal to be transmitted is a data signal input to the OFDM signal modulator 11, and is mapped on a complex plane by the mapping circuit 11 1 according to the modulation method of each subcarrier.
  • the IFFT circuit 112 is supplied.
  • the transmitted symbol for one symbol is subjected to IFF processing and converted to the time domain to generate an effective symbol period signal.
  • the effective symbol period signal is generated for each symbol.
  • the baseband OFDM signal is generated by adding the rear part of the signal as a guard period signal before the effective symbol period signal, thereby generating a baseband OFDM signal.
  • the signal is supplied to the quadrature modulation circuit 113.
  • the orthogonal modulation circuit 113 orthogonally modulates the carrier with a baseband OFDM signal, thereby converting the baseband OFDM signal into an intermediate frequency (IF) band.
  • the OFDM signal in the IF band is frequency-converted by an upconverter 114 into a signal in a radio frequency (hereinafter, RF (Radio Frequency)) band, and output to a transmission path 12.
  • RF Radio Frequency
  • the OFDM signal input to the OFDM demodulator 13 from the transmission line 12 on the receiving side is frequency-converted from the RF band to the IF band by the tuner 131, and then the orthogonal demodulation circuit 13
  • This quadrature demodulation circuit 1 3 2 The F-band signal is demodulated into a baseband OFDM signal by quadrature demodulation. The demodulated output is supplied to a Fourier transform (FFT) circuit 133. You. this ? The circuit 133 extracts the effective symbol period signal from the base node OFDM signal, performs FFT processing, and converts the signal into the frequency domain. The output is supplied to the detector circuit 134. This detection circuit 134 detects each subcarrier according to the modulation method, and then restores the data signal by demapping.
  • FFT Fourier transform
  • AFC Automatic Frequency Control
  • the frequency error within the subcarrier interval is determined by the fact that the guard period signal in the OFDM signal is a copy at the end of the effective symbol period signal. Calculated using correlation.
  • the frequency error in subcarrier interval units is calculated using a reference symbol for frequency synchronization inserted at a predetermined period on the transmission side.
  • FIG. 2 is a schematic diagram showing an example of the configuration of a frequency synchronization reference symbol.
  • the horizontal axis represents frequency and the vertical axis represents amplitude.
  • the solid line in the figure indicates that there is a subcarrier at that frequency, and the dashed line indicates that there is no subcarrier at that frequency.
  • the presence or absence of a subcarrier is made to correspond to a predetermined pseudo-random (hereinafter, PN (Pseudo Noise)) sequence.
  • PN pseudo-random
  • FIG. 3 is a block diagram showing a configuration of a conventional OFDM signal demodulator.
  • the thick arrow represents a complex signal
  • the thin arrow represents a real signal.
  • general control signals such as mouthpieces necessary for the operation of each component are omitted so as not to complicate the description.
  • the tuner 21 frequency-converts the OFDM signal input from the transmission line from the RF band to the IF band, the output is supplied to the quadrature demodulation circuit 22.
  • This quadrature demodulation circuit 22 demodulates the OFDM signal in the IF band to the base node OFDM signal using a fixed carrier generated therein, and the demodulated output is a carrier.
  • the frequency (fc) correction circuit is supplied to the first input terminal of the circuit 23.
  • the carrier frequency correction circuit 23 includes a wideband carrier frequency error signal of the subcarrier interval unit supplied to the second input terminal and the subcarrier frequency signal supplied to the third input terminal. A correction carrier generated based on the narrowband carrier frequency error signal and within the interval is applied to the first input terminal.
  • the carrier frequency error is corrected by multiplying the supplied base node OFDM signal, and the output is sent to the narrowband carrier frequency error calculation circuit 24 and the FFT circuit 25. Supplied.
  • the narrow-band carrier frequency error calculation circuit 24 uses the correlation between the guard period signal in the baseband OFDM signal and the rear part of the effective symbol period signal to calculate the frequency error within the subcarrier interval.
  • the output is supplied to the third input terminal of the carrier frequency correction circuit 23.
  • the FFT circuit 25 performs an FFT process on the effective symbol period signal in the base-node OFDM signal and converts the signal into the frequency domain. The output is supplied to the power calculation circuit 41 and the detection circuit 31. Is done.
  • the power calculation circuit 41 calculates the power of the signal corresponding to each subcarrier output from the FFT circuit 25, and the calculation result is supplied to the correlation calculation circuit 42.
  • the correlation calculating circuit 42 calculates the correlation value between the output of the power calculating circuit 41 and the PN sequence corresponding to the presence or absence of the subcarrier of the frequency synchronization reference symbol shown in FIG.
  • the correlation value is supplied to the wideband carrier frequency error calculation circuit 28.
  • This wideband carrier frequency error calculation circuit 28 calculates the frequency error in the unit of the subcarrier interval from the peak position of the correlation value, and the output is the second error of the carrier frequency correction circuit 23. Is supplied to the input terminal of.
  • the detection circuit 31 recovers the data signal by detecting each subcarrier according to the modulation method and then demapping. Disclosure of the invention
  • the frequency of each subcarrier interval is determined by using a reference symbol for frequency synchronization inserted at a predetermined period (for example, a frame) on the transmission side. Due to the calculation of the error, the pull-in time of the frequency synchronization is relatively long.
  • the time constant of the loop filter provided inside the narrow band carrier frequency error calculation circuit 24 in FIG. must be set to about several hundred symbol periods. Therefore, it is not possible to follow fast fluctuations such as tuner phase noise. (Not limited to this example, general AFC circuits cannot follow fast fluctuations such as tuner phase noise.) It cannot follow). For this reason, the residual frequency error causes interference between subcarriers (hereinafter, ICI (Inter Carrier Interference)) and phase variation common to all subcarriers (hereinafter, CPE (Common Phase Error)). This may cause the error rate to deteriorate.
  • ICI Inter Carrier Interference
  • CPE Common Phase Error
  • the present invention solves the above-mentioned problem, further shortens the pull-in time of frequency synchronization, and eliminates the influence of CPE due to tuner phase noise and the like. It is intended to provide a signal demodulation device.
  • an OFDM transmission system is configured as follows.
  • the first pilot arranged at the same frequency for each symbol An orthogonal frequency division multiplexed signal including a frequency domain signal, the Fourier transforming means for converting the orthogonal frequency division multiplexed signal into a frequency axis signal by performing a Fourier transform on the orthogonal frequency division multiplexed signal; By performing an inter-symbol differential detection of the output of the Fourier transforming means, a differential detection means for calculating a variation between symbols, the first pilot signal arrangement information, and the difference By detecting a peak position of an output of the correlation calculating means and a correlation calculating means for calculating a correlation with an output of the dynamic detecting means, a carrier frequency error in subcarrier interval units can be reduced.
  • An apparatus for demodulating an orthogonal frequency division multiplexed signal including a first pilot signal arranged at the same frequency for each symbol, and performing a Fourier transform on the orthogonal frequency division multiplexed signal. Therefore, a Fourier transforming means for converting to a frequency axis signal, and a differential detecting means for calculating a variation between symbols by performing an inter-symbol differential detection of an output of the Fourier transforming means. And averaging, within a symbol, the phase of the output of the differential detection means corresponding to the first packet signal, thereby estimating a phase variation common to all subcarriers. Phase averaging means; and a phase variation correction means for calculating a correction vector for each symbol from an output of the phase averaging means, and correcting a phase variation common to all subcarriers based on the correction vector. Composed with That.
  • a device for demodulating an orthogonal frequency division multiplexed signal including the orthogonal signal comprising: performing a Fourier transform on the orthogonal frequency division multiplexed signal to convert the orthogonal frequency division multiplexed signal into a frequency axis signal; By performing inter-symbol differential detection on the output of the one-line conversion means, a differential detection means for calculating inter-symbol fluctuations, the first pilot signal arrangement information, and the difference By detecting a correlation between the output of the dynamic detection means and a peak position of the output of the correlation calculation means, the carrier frequency error in subcarrier interval units can be reduced.
  • a wideband carrier frequency error calculating means for estimating; a wideband carrier frequency correcting means for correcting a carrier frequency based on an output of the wideband carrier frequency error calculating means;
  • a phase averaging means for estimating a phase variation common to all subcarriers by averaging the phase of the output of the differential detection means corresponding to the pilot signal within a symbol;
  • a phase variation correction means for calculating a correction vector for each symbol from the output of the phase averaging means and for correcting a phase variation common to all the subcarriers based on the correction vector. It is.
  • the correlation calculating means includes: information of arrangement of the first pilot signal (binary signal); and an output of the differential detection means (binary signal). It is configured to calculate the magnitude of the correlation with the complex vector signal).
  • the correlation calculating means may include the arrangement information (binary signal) of the first pilot signal and the output of the differential detection means. Signal averaged in symbol direction (Complex number signal) and the magnitude of the correlation.
  • the correlation calculating means may include the arrangement information (binary signal) of the first pilot signal and the output of the differential detection means. It is configured to calculate the correlation with the signal size (real number signal) averaged in the symbol direction.
  • the correlation calculating means may include the arrangement information (binary signal) of the first pilot signal and the output of the differential detection means. The magnitude of the signal averaged in the symbol direction is compared with a predetermined threshold value to calculate the correlation with the binarized signal (binary signal).
  • the correlation calculation means controls the threshold value according to the magnitude of the received signal.
  • the wideband carrier frequency correction means is configured to output a local oscillation of a tuner based on an output of the wideband carrier frequency error calculating means. The frequency is controlled.
  • the wideband carrier frequency correction means may include a local oscillation frequency of a quadrature demodulation means based on an output of the wideband carrier frequency error calculation means. Is controlled.
  • the wideband carrier frequency correction means generates a correction carrier based on an output of the wideband carrier frequency error calculation means.
  • the correction carrier is multiplied by the input signal of the Fourier transform means.
  • the wideband carrier frequency correction means outputs the output of the Fourier transform means based on the output of the wideband carrier frequency error calculation means. The signal is shifted in the frequency direction, and the phase rotation between symbols generated depending on the guard period length is corrected.
  • the wideband carrier frequency correction means outputs the output signal of the Fourier transform means based on the output of the wideband carrier frequency error calculation means. Is shifted in the frequency direction.
  • phase fluctuation correction means is incorporated in the detection means, and the detection means, based on the output of the correction vector calculation means, outputs all the sub-capacitors. At the same time that the phase fluctuation common to the rear is corrected, the detection is performed according to the primary modulation method of each subcarrier.
  • a second pilot signal distributed and periodically arranged in a subcarrier symbol area is provided.
  • a configuration is adopted in which each subcarrier is synchronously detected by using the second pilot signal.
  • the device is a device for demodulating an orthogonal frequency division multiplexed signal that is transmitted by performing differential modulation between symbols in a data signal, and wherein the detection means includes the correction base.
  • Vector calculation Based on the output of the means, the phase fluctuation common to all the subcarriers is corrected, and at the same time, each subcarrier is configured to perform differential detection between symbols.
  • the phase averaging means calculates an output complex vector of the differential detection means corresponding to the first pilot signal. Then, by averaging within a symbol and calculating the phase, a phase variation common to all subcarriers is estimated.
  • the correlation calculating means includes the phase averaging means, and the arrangement information based on the binary signal of the first pilot signal and the differential information are provided.
  • the correlation with the complex vector signal output from the detection means is calculated and supplied to the wideband carrier frequency error calculation means, and the phase angle of the vector obtained by the correlation operation is calculated.
  • a phase fluctuation common to all subcarriers is estimated from the above and supplied to the phase fluctuation correcting means.
  • the first pilot signal is a set of subcarriers arranged at the same frequency for each symbol.
  • the configuration includes a signal modulated with the same phase for each symbol.
  • the first pilot signal is arranged at the same frequency for each symbol.
  • a set of subcarriers includes a signal obtained by performing m-phase PSK modulation (m is a natural number)
  • the output of the differential detection means is raised to the mth power, and the power is supplied to the correlation calculation means.
  • the configuration is provided with. (21) (2), (3), (14)
  • the first pilot signal is arranged at the same frequency for each symbol.
  • a set of subcarriers includes a signal obtained by performing m-phase PSK modulation (m is a natural number)
  • the output of the differential detection means is raised to the m-th power, and the power means is supplied to the phase averaging means.
  • the first pilot signal is arranged at the same frequency as each symbol.
  • the set of subcarriers includes a signal obtained by performing m-phase PSK modulation (where m is a natural number)
  • the output of the differential detection means is further divided into m complex signals by phase.
  • the output complex vector of the differential detection means is rotated by an integral multiple of 2 ⁇ Zm according to the determination result. After the rotation, the phase is always included in the same area, and then a vector rotation means for supplying the phase averaging means is provided.
  • FIG. 1 is a block diagram showing an example of the principle configuration of the OFDM transmission system.
  • FIG. 2 is a schematic diagram showing a configuration example of a reference symbol for frequency synchronization related to a conventional OFDM signal demodulator.
  • FIG. 3 is a block diagram showing a configuration example of a conventional OFDM signal demodulation device.
  • FIG. 4 is a schematic diagram showing a pilot signal arrangement example according to the present invention.
  • FIG. 5 is a block diagram showing a configuration of the OFDM signal demodulation device according to the first embodiment of the present invention.
  • FIG. 6 is a block diagram showing an example of the internal configuration of the differential detection circuit in FIG.
  • FIG. 7 is a block diagram showing a first internal configuration example of the correlation calculation circuit in FIG.
  • FIG. 8 is a block diagram showing a second internal configuration example of the correlation calculation circuit in FIG.
  • FIG. 9 is a block diagram showing an example of the internal configuration of the inter-symbol filter circuit in FIG.
  • FIG. 10 is a block diagram showing a third internal configuration example of the correlation calculation circuit in FIG.
  • FIG. 11 is a block diagram showing a fourth internal configuration example of the correlation calculation circuit in FIG.
  • FIG. 12 is a block diagram showing an example of the internal configuration of the phase fluctuation correction circuit in FIG.
  • FIG. 13 is a block diagram showing a configuration of an OFDM signal demodulation device according to the second embodiment of the present invention.
  • FIG. 14 is a block diagram illustrating a configuration of an OFDM signal demodulation device according to the third embodiment of the present invention.
  • FIG. 15 is a block diagram showing a configuration of an OFDM signal demodulation device according to the fourth embodiment of the present invention.
  • FIG. 16 shows an OFDM signal according to the fifth embodiment of the present invention.
  • FIG. 3 is a block diagram illustrating a configuration of a signal demodulation device.
  • FIG. 17 is a block diagram showing a first internal configuration example of the detection circuit in FIG.
  • FIG. 18 is a block diagram showing a second internal configuration example of the detection circuit in FIG.
  • FIG. 19 is a block diagram showing a configuration of an OFDM signal demodulation device according to the sixth embodiment of the present invention.
  • FIG. 20 is a block diagram showing an example of the internal configuration of the correlation calculation circuit in FIG.
  • FIG. 21 is a block diagram showing a configuration of an OFDM signal demodulation device according to the seventh embodiment of the present invention.
  • FIG. 22 is a block diagram showing a configuration of an OFDM signal demodulation device according to the eighth embodiment of the present invention.
  • BEST MODE FOR CARRYING OUT THE INVENTION As an OFDM transmission method according to the present invention, DVB—T (Digital Video), which is a terrestrial digital terrestrial broadcasting system in Europe, is used. Broadcasting-Terrestrial) standard 2k mode (the number of subcarriers used for transmission is 1705) is used as an example, and the embodiment of the present invention is described with reference to FIGS. 4 to 22. Will be explained.
  • the skew (dispersion) noise is obtained by using a predetermined subcarrier.
  • Illots hereafter, SP (Scattered Pilots)
  • continuous (continuous) pilots hereafter,
  • Fig. 4 is a schematic diagram showing the pilot signal arrangement of the DVB-T standard.
  • k on the horizontal axis represents the index of the subcarrier
  • n on the vertical axis represents the index of the symphonore.
  • a black circle indicates a subcarrier for transmitting a pilot signal
  • a white circle indicates a subcarrier for transmitting other data.
  • mod represents a remainder operation
  • p is any non-negative integer
  • k p 3 (n mod 4) + 12 p ⁇ (1) Also, continuous.
  • TPS Transmission Parameter Signaling
  • the rear carries the same information bits.
  • TPS is (3) a differential two-phase PSK intersymbol Remind as in formula (Phase Shift Keying) modulated You.
  • FIG. 5 is a block diagram showing a configuration of the OFDM signal demodulation device according to the first embodiment of the present invention.
  • the same parts as those in FIG. 3 are denoted by the same reference numerals.
  • the bold arrow represents a complex signal
  • the thin arrow represents a real signal.
  • general control signals such as clocks necessary for the operation of each component are omitted so as not to complicate the description.
  • a tuner 21 frequency-converts an OFDM signal input from a transmission line from an RF band to an IF band, and its output is supplied to a quadrature demodulation circuit 22.
  • This quadrature demodulation circuit 22 demodulates an OFDM signal in the IF band into a baseband OFDM signal using a fixed carrier generated therein, and the demodulated output is a carrier. This is supplied to the first input terminal of the rear frequency (fc) correction circuit 23.
  • the carrier frequency correction circuit 23 is configured to output a wideband carrier frequency error signal in units of subcarrier intervals supplied to the second input terminal and a subcarrier interval supplied to the third input terminal.
  • a correction carrier is generated based on the narrow band carrier frequency error signal of the first band and the correction carrier is multiplied by the baseband OFDM signal supplied to the first input terminal.
  • the carrier frequency error is corrected, and the output is supplied to a narrowband carrier frequency error calculating circuit 24 and an FFT circuit 25.
  • the narrowband carrier frequency error calculation circuit 24 uses the correlation between the guard period signal in the baseband OFDM signal and the rear part of the effective symbol period signal to calculate the frequency within the subcarrier interval.
  • the output is supplied to the third input terminal of the carrier frequency correction circuit 23 for calculating the error. Also, ? ?
  • the circuit 25 converts the effective symbol period signal in the base node OFDM signal to FF
  • the output is supplied to the differential detection circuit 26 and the first input terminal of the phase fluctuation correction circuit 30 because the signal is subjected to T processing and converted to the frequency domain.
  • the differential detection circuit 26 calculates the inter-symbol phase variation by performing inter-symbol differential detection of the signal output from the FFT circuit 25 and corresponding to each subcarrier.
  • the calculation result is supplied to a correlation calculation circuit 27 and a phase averaging circuit 29.
  • the correlation calculation circuit 27 calculates a correlation value between the output of the differential detection circuit 26 and the arrangement information of the subcarrier for transmitting the CP, and the correlation value is used as a wideband carrier frequency error calculation circuit. Supplied to 2 8.
  • This wideband carrier frequency error calculation circuit 28 calculates the frequency error in subcarrier interval units from the peak position of the correlation value, and the output is the output of the carrier frequency correction circuit 23. 2 input.
  • the phase averaging circuit 29 estimates the CPE by averaging the phase of the output of the differential detection circuit 26 corresponding to the CP within the symbol, and the output is output from the phase variation correction circuit 3. 0 is supplied to the second input.
  • This phase fluctuation correction circuit 30 is generated based on the output of the phase averaging circuit 29 supplied to the second input terminal.
  • the CPE is corrected by multiplying the output of the FFT circuit 25 supplied to the first input terminal by the correction vector to be applied, and the output is supplied to the detection circuit 31.
  • the detection circuit 31 recovers the data signal by detecting each subcarrier according to the modulation method and then demapping.
  • the differential detection circuit 26 is specifically configured as shown in FIG. 6, and the output of the FFT circuit 25 is supplied to a one symbol period delay circuit 26 1 and a complex multiplier 26 3. It has become.
  • the one symbol period delay circuit 26 1 delays the output of the FFT circuit 25 by one symbol period, and the delay output is supplied to the conjugate circuit 26 2.
  • the conjugate circuit 262 calculates the complex conjugate by inverting the sign of the imaginary part of the output of the one-symbol period delay circuit 261, and the calculation result is supplied to the complex multiplier 263. It is.
  • the complex multiplier 26 3 multiplies the output of the FFT circuit 25 by the output of the shared circuit 26 2, and calculates the result of the multiplication as the output of the differential detection circuit 26. 2 7 and the phase averaging circuit 29.
  • FIG. 7 shows a first configuration example of the correlation calculation circuit 27 in FIG.
  • the differential detection output from the differential detection circuit 26 is supplied to the shift register 2701.
  • This shift register 2701 has a plurality of tap outputs corresponding to the arrangement of the subcarriers for transmitting the CP, and the tap outputs are supplied to the input terminal of the summing circuit 2702. You.
  • the summation circuit 2702 calculates the sum of the tap outputs of the shift register 2701. It is supplied to the force calculation circuit 270.
  • Numeral 3 is for calculating the power of the output of the summing circuit 270 2, and the calculation result is supplied to the wideband carrier frequency error calculating circuit 28 as the output of the correlation calculating circuit 27.
  • the output of correlation calculating circuit 27 has a peak value. Show. Therefore, the wideband carrier frequency error calculation circuit 28 detects the peak value of the output of the correlation calculation circuit 27 and obtains a deviation from a predetermined timing, thereby obtaining a subcarrier. It is possible to estimate the carrier frequency error per unit of distance.
  • FIG. 8 shows a second configuration example of the correlation calculation circuit 27 in FIG. 8, the same parts as those in FIG. 7 are denoted by the same reference numerals, and different parts will be described here.
  • the differential detection output from the differential detection circuit 26 is supplied to a symbol interrogator circuit 704.
  • the inter-symbol filter circuit 2704 averages the output of the differential detection circuit 26 in the symbol direction, and the output is supplied to a shift register 2701.
  • the configuration and operation of this shift register 2701 and thereafter are the same as those shown in FIG.
  • the inter-symbol filter circuit 2704 in FIG. 8 is specifically configured as shown in FIG. 9, and the output of the differential detection circuit 26 is supplied to a subtractor 27041. It has become.
  • This subtractor 27 04 1 outputs one symbol period from the output of the differential detection circuit 26.
  • the output of the delay circuit 27044 is reduced, and the output is supplied to the coefficient 27042.
  • This coefficient multiplier 2 7 0 4 2 multiplies the output of the subtracter 2 7 0 4 1 by a coefficient a (0 ⁇ ⁇ ⁇ 1), and the operation result is the adder 2 7 0 4 3 Supplied to
  • This adder 27043 adds the output of the coefficient unit 27042 and the output of the one-symbol period delay circuit 27044, so that the result of the operation is The output of the filter circuit 270 is supplied to the shift register 270 1.
  • the one-symbol period delay circuit 27044 delays the output of the adder 27043 by one symbol period.
  • the intersymbol filter circuit 2704 configured as shown in FIG. 9 operates as an infinite impulse response (IIR) filter, and operates as a differential filter.
  • IIR infinite impulse response
  • the complex vectors corresponding to each subcarrier output from the detection circuit 26 are averaged in the symbol direction.
  • the signal obtained by performing the inter-symbol differential detection on the subcarrier transmitting the CP is a DC signal having the same amplitude and the same phase for each symbol, ignoring the CPE component. Most of them pass through the inter-symbol filter circuit 2704 because they can be considered.
  • Signals obtained by differentially detecting the other subcarriers between symbols are signals having randomness in amplitude and phase for each symbol, and thus are blocked by the intersymbol filter circuit 2704. Also, since the noise component is a random signal for each symbol, it is blocked by the intersymbol filter circuit 274.
  • the correlation calculation circuit 27 shown in FIG. By adding the filter circuit 2704, the floor of the output of the correlation calculation circuit 27 is suppressed, and the error estimation error in the wideband carrier frequency error calculation circuit 28 is reduced. It can be reduced.
  • FIG. 10 shows a third configuration example of the correlation calculation circuit 27 in FIG.
  • the same parts as those in FIGS. 7 and 8 are denoted by the same reference numerals, and different parts will be described here.
  • the output of the differential detection circuit 26 is averaged in the symbol direction by the inter-symbol filter circuit 270 4, and then directly sent to the power calculation circuit 270 3. It is being supplied. That is, the power calculation circuit 270 3 in this case calculates the output power of the inter-symbol filter circuit 270 4. The result of the calculation is supplied to the shift register 275.
  • This shift register 2705 has a plurality of tap outputs corresponding to the arrangement of the subcarriers for transmitting the CP, and the tap outputs are input to the summation circuit 2706. Supplied to the end.
  • This summation circuit 27006 calculates the sum of the tap outputs of the shift register 275, and the calculation result is output as the output of the correlation calculation circuit 27 by a wideband carrier. (A) It is supplied to the frequency error calculation circuit 28.
  • the shift register 2705 holds a real number signal, and the summation circuit 2706 also calculates the sum of the real number signal. Therefore, the shift register 2770 in FIGS. 7 and 8 is used. The size can be reduced as compared with 1 and the summing circuit 2 702.
  • FIG. 11 shows a fourth configuration example of the correlation calculation circuit 27 in FIG.
  • the same parts as in FIG. The same reference numerals are given and the description is omitted.
  • the comparison circuit 277 in FIG. 11 compares the output of the power calculation circuit 270 with the threshold set by the threshold setting circuit 270 to determine the subcarrier that transmits the CP. If the output of the power calculation circuit 270 is larger, "1" is output.If the output of the threshold setting circuit 270 is larger, "0" is output. Is output.
  • the output of the comparison circuit 277 is supplied to a shift register 270.
  • This shift register 2709 has a plurality of tap outputs corresponding to the arrangement of subcarriers for transmitting the CP, and those tap outputs are input to the summing circuit 2710. Supplied to the end.
  • This summation circuit 2710 calculates the sum of the tap outputs of the shift register 2709, and the calculation result is used as the output of the correlation calculation circuit 27 as a wideband carrier. A Supplied to the frequency error calculation circuit 28.
  • the shift register 2709 holds the binary signal, and the summing circuit 2710 also calculates the sum of the binary signal. Compared to the register 2701 and the summing circuit 2702, the size can be greatly reduced. In addition, if the threshold value output from the threshold value setting circuit 27078 is controlled by the magnitude of the received signal, it is possible to prevent erroneous determination due to fluctuations in the output level of the power calculation circuit 2703. And can be.
  • FIG. 12 shows a configuration example of the phase fluctuation correction circuit 30 in FIG.
  • the output of the phase averaging circuit 29 is supplied to the adder 301, and the phase fluctuation is corrected.
  • the adder 301 holds the signal for one symbol period.
  • a cumulative adder is configured together with the register 302, and the output of the phase averaging circuit 29 is cumulatively added for each symbol, thereby calculating the cumulative value of the inter-symbol phase fluctuation from the start of the operation.
  • the calculation result (the output of the adder 301) is supplied to a correction vector calculation circuit (e-1) 303.
  • the correction vector calculation circuit 303 calculates a complex vector having an amplitude of 1 with a phase angle of -1 times the output of the adder 301, and the calculation result is calculated by the multiplier 3 Supplied to 04.
  • the multiplier 304 multiplies the output of the correction vector calculation circuit 303 by the output of the FFT circuit 25. With this operation, the CPE can be corrected.
  • the carrier frequency error in subcarrier interval units is calculated from the arrangement information of the subcarriers for transmitting the CP included in each symbol.
  • the frequency synchronization pull-in time can be reduced as compared with the conventional example.
  • phase fluctuation between symbols is calculated and corrected using CP for each symbol, it is possible to remove the influence of CPE due to the phase noise of tuner 21 and the like.
  • FIG. 13 is a block diagram illustrating a configuration of an OFDM signal demodulation device according to the second embodiment of the present invention.
  • the same parts as those in FIG. 5 are denoted by the same reference numerals.
  • the bold arrow represents a complex signal
  • the thin arrow represents a real signal
  • general control signals such as clocks required for the operation of each component. Is omitted so as not to complicate the explanation. I do.
  • the OFDM signal demodulation device shown in FIG. 13 is such that a carrier frequency error is corrected in a tuner 32 instead of the carrier frequency correction circuit 23 in FIG.
  • the tuner 32 receives the wideband carrier frequency error signal of the subcarrier interval unit supplied to the second input terminal and the subcarrier interval within the subcarrier interval supplied to the third input terminal.
  • the local oscillation frequency is controlled based on the narrowband carrier frequency error signal and the frequency of the OFDM signal supplied to the first input terminal is converted from the RF band to the IF band.
  • the output is a quadrature demodulation circuit. Supplied to 2 2.
  • Other configurations and operations are the same as those in FIG.
  • FIG. 14 is a block diagram illustrating a configuration of an OFDM signal demodulation device according to the third embodiment of the present invention.
  • the same parts as those in FIG. 5 are denoted by the same reference numerals.
  • the bold arrow represents a complex signal
  • the thin arrow represents a real signal
  • general control signals such as clocks required for the operation of each component. Is omitted so as not to complicate the explanation.
  • the OFDM signal demodulation device shown in FIG. 14 is such that a carrier frequency error is corrected by a quadrature demodulation circuit 33 instead of the carrier frequency correction circuit 23 in FIG. is there.
  • the quadrature demodulation circuit 33 includes a wideband carrier frequency error signal in subcarrier interval units supplied to the second input terminal and a narrow band within the subcarrier interval supplied to the third input terminal.
  • Bandwidth carrier The local oscillation frequency is controlled based on the wave number error signal and the OFDM signal in the IF band supplied to the first input terminal is demodulated into a baseband OFDM signal, and the demodulated output is a narrowband carrier. It is supplied to the frequency error calculation circuit 24 and the FFT circuit 25.
  • Other configurations and operations are the same as those in FIG.
  • FIG. 15 is a block diagram illustrating a configuration of an OFDM signal demodulation device according to the fourth embodiment of the present invention.
  • the same parts as those in FIG. 5 are denoted by the same reference numerals.
  • the bold arrow represents a complex number signal
  • the thin arrow represents a real number signal
  • general control signals such as ports necessary for the operation of each component. Is omitted so as not to complicate the explanation.
  • a carrier frequency (fc) correction circuit 34 corrects a narrow-band carrier frequency error within a subcarrier interval, and a shift circuit 35 generates a subcarrier. It is designed to correct wideband carrier frequency errors in units of rear intervals.
  • the carrier frequency correction circuit 34 generates a correction carrier based on a narrow-band carrier frequency error signal within a subcarrier interval supplied to the second input terminal, and generates the correction carrier. Is multiplied by the baseband OFDM signal supplied to the first input terminal to correct the carrier frequency error, and the output is a narrowband carrier frequency error calculation circuit 24. And supplied to the FFT circuit 25.
  • the shift circuit 35 is provided with a wideband carrier in units of a subcarrier interval supplied to the second input terminal.
  • the output of the FFT circuit 25 is shifted in the frequency direction based on the rear frequency error signal, and the output is supplied to the differential detection circuit 26 and the first input terminal of the phase variation correction circuit.
  • the carrier frequency error in the subcarrier interval unit is a frequency error having an effective symbol period length and an integer period, but since the OFDM signal has a guard period, the carrier frequency error is in the frequency domain.
  • phase rotation is generated for each symbol depending on the guard period length. Therefore, as in the configuration in FIG. 15, when wideband carrier frequency error is corrected by shift in the frequency domain, means for correcting this phase rotation is required.
  • this phase rotation is common to all subcarriers, when a circuit for removing the CPE is provided as shown in FIG. 15, the phase fluctuation correction circuit 30 performs its own operation. Dynamically corrected.
  • FIG. 16 is a block diagram illustrating a configuration of an OFDM signal demodulator according to the fifth embodiment of the present invention.
  • the same parts as those in FIG. 5 are denoted by the same reference numerals.
  • the bold arrow represents a complex signal
  • the thin arrow represents a real signal
  • general control signals such as clocks required for the operation of each component. Is omitted so as not to complicate the explanation.
  • the OFDM signal demodulator shown in FIG. 16 uses a CPE in a detection circuit 36 instead of the phase fluctuation correction circuit 30 in FIG. Is corrected.
  • the detection circuit 36 generates a correction vector based on the output of the phase averaging circuit 29 supplied to the second input terminal, and generates the correction vector according to the modulation method of each subcarrier. Multiply the detected vector. Then, using the detection vector, the output of the FFT circuit 25 is detected, the CPE is corrected, and the data signal is restored by demapping.
  • Other configurations and operations are the same as those in FIG.
  • FIG. 17 shows an example of a configuration of the detection circuit 36 in FIG. 16 corresponding to a modulation method on the assumption of synchronous detection using an SP signal.
  • the output of the circuit 25 is supplied to a first input terminal of the complex divider 3604 and a first input terminal of the complex divider 3606. No ,.
  • the slot generation circuit 3603 generates the SP in synchronization with the output of the FFT circuit 25, and its output is supplied to the second input terminal of the complex divider 3654.
  • This complex divider 3604 converts SP included in the output of the FFT circuit 25 supplied to the first input terminal into a pilot generation circuit 36 supplied to the second input terminal.
  • the transmission path characteristics acting on the SP are calculated by dividing by the regular SP output from 03.
  • the output is supplied to the output of the memory 366 and selectively to the first input terminal of the complex multiplier 362 by the switch (SW) 365.
  • the output of the phase averaging circuit 29 is the correction vector calculation circuit.
  • the correction vector calculation circuit 3601 uses the output of the phase averaging circuit 29 as the phase angle, and the amplitude is Since the complex vector which is 1 is calculated, the calculation result is supplied to the second input terminal of the complex multiplier 3602. Sweep rate pitch 3 6 0 5, complex divider 3 6 0 4 outputs are complex divider if correspond to SP (1 single subkey Ya Li A to wear eye to the 4 1 symbols in the symbol) Select the output of 366, otherwise select the output of memory 366 and output it in other cases (similarly, 3 out of 4 symbols).
  • the complex multiplier 3602 is the output or the memory 36 of the complex divider 3604 selectively supplied by the switch 365 from the first input terminal.
  • the result of the calculation is supplied to the filter circuit 3607 by multiplying the output of the correction vector calculation circuit 36 and the output of the correction vector calculation circuit 3601 supplied to the second input terminal. Is also supplied to the memory 366.
  • This memory 3606 holds the output of the complex multiplier 3602 for 4 symbol periods (until the next SP is transmitted in the subcarrier of interest).
  • the filter circuit 3607 interpolates the output of the complex multiplier 3602 in the frequency (subcarrier) direction, and corrects the transmission path characteristics (CPE corrected) acting on all subcarriers. ), The output of which is supplied to the second input of the complex divider 3608.
  • This complex divider 36608 divides the output of the FFT circuit 25 supplied to the first input terminal by the output of the filter circuit 3607 supplied to the second input terminal. What do you do? Ding circuit 2 5 The output is synchronously detected.
  • the output is supplied to a demapping circuit 3609.
  • the demapping circuit 3609 restores the data signal by demapping the output of the complex divider 3658 according to the modulation method.
  • FIG. 18 shows a configuration example of the detection circuit 36 in FIG. 16 corresponding to a modulation method based on differential detection.
  • the output of the FFT circuit 25 is supplied to the one-symbol period delay circuit 3610 and the first input terminal of the complex divider 3611. .
  • the one-symbol period delay circuit 3610 delays the output of the FFT circuit 25 by one symbol period, and the output is supplied to the first input terminal of the complex multiplier 3602 .
  • the output of the phase averaging circuit 29 is supplied to a correction vector calculation circuit (ej ⁇ ) 3601.
  • the correction vector calculation circuit 3601 uses the output of the phase averaging circuit 29 as a phase angle and calculates a complex vector having an amplitude of 1, and the calculation result is a complex multiplier 36 0 2 is supplied to the second input.
  • the complex multiplier 3602 is provided with a one-symbol period delay circuit 3601 supplied to the first input terminal and a correction vector calculation circuit 36 supplied to the second input terminal. 0
  • the output of 1 is multiplied by to perform CPE correction on the signal one symbol period earlier, and the operation result is supplied to the second input terminal of the complex divider 3611. You.
  • the complex divider 3611 divides the output of the FFT circuit 25 supplied to the first input terminal by the output of the complex multiplier 3652 supplied to the second input terminal. According to? Ding circuit 2 5 The output is differentially detected, and the output is supplied to the demapping circuit 3612. This demapping circuit 3612 restores the data signal by demapping the output of the complex divider 3611 according to the modulation method.
  • a part of the processing of the phase fluctuation correction circuit 30 and the detection circuit 31 in the first embodiment can be shared, so that the circuit scale can be reduced. Can be done.
  • FIG. 19 is a block diagram illustrating a configuration of an OFDM signal demodulation device according to the sixth embodiment of the present invention.
  • the same parts as those in FIG. 5 are denoted by the same reference numerals.
  • the bold arrows represent complex signals
  • the thin arrows represent real signals
  • general control signals such as clocks necessary for the operation of each component are shown in FIG. Omit it to avoid complicating the explanation.
  • the processing of the correlation calculation circuit 27 and the phase averaging circuit 29 in FIG. 5 is performed by the correlation circuit 37 together.
  • FIG. 20 shows an example of the configuration of the correlation circuit 37 in FIG. 19.
  • the output of the differential detection circuit 26 is supplied to a shift register 371.
  • This shift register 3771 has a plurality of tap outputs corresponding to the arrangement of the subcarriers for transmitting the CP, and the tap outputs are connected to the input terminal of the summing circuit 3772. Supplied.
  • This summing circuit 372 calculates the sum of the tap outputs of the shift register 371, and the calculation result is calculated by the power calculating circuit 373 and the phase calculation.
  • the power calculation circuit 373 calculates the power of the output of the summation circuit 372, and the calculation result is sent to the wideband carrier frequency error calculation circuit 288 as the first output of the correlation calculation circuit 377. Supplied.
  • the phase calculation circuit 37 4 calculates the phase of the output of the summation circuit 37 2, and the calculation result is used as the second output of the correlation calculation circuit 37 2 Is supplied to the input terminal of.
  • a subcarrier for transmitting the CP is output to the tap output of the shift register 371, so that the output of the summing circuit 3772 outputs the CP.
  • the variation between symbols of the subcarrier to be transmitted is averaged within the symbol.
  • a part of the processing of the correlation calculation circuit 27 and the processing of the phase averaging circuit 29 in the first embodiment can be shared, so that the circuit scale can be reduced. Can be done.
  • FIG. 21 is a block diagram illustrating a configuration of an OFDM signal demodulation device according to the seventh embodiment of the present invention.
  • the same parts as those in FIG. 5 are denoted by the same reference numerals.
  • the bold arrows represent complex signals
  • the thin arrows represent real signals
  • general control signals such as quads necessary for the operation of each component are represented by arrows. Omit it to avoid complicating the explanation.
  • the OFDM signal demodulator shown in Fig. 21 uses a keypad using TPS. It performs carrier frequency synchronization and CPE elimination, and is configured such that a power circuit 38 and a coefficient unit 39 are added to the first embodiment.
  • the exponentiation circuit 38 calculates the square of the complex vector corresponding to each subcarrier output from the differential detection circuit 26, and the calculation result is calculated by the correlation calculation circuit 2. 7 and phase averaging circuit
  • the correlation calculation circuit 27 calculates a correlation value between the output of the exponentiation circuit 38 and at least one arrangement information of the subcarrier transmitting the CP and the subcarrier transmitting the TPS. Therefore, the correlation value is supplied to the wideband carrier frequency error calculation circuit 28.
  • the phase averaging circuit 29 estimates the CPE by averaging the phase of the output of the exponentiation circuit 38 corresponding to at least one of the CP and the TPS in the symbol.
  • the output is supplied to a coefficient unit 39.
  • the coefficient unit 39 corrects by halving the phase fluctuation between symbols doubled by the exponentiation circuit 38.
  • the exponentiation circuit 38 when the TPS is m-phase PSK modulated (m is a natural number), the exponentiation circuit 38 generates a complex vector corresponding to each subcarrier output by the differential detection circuit 26.
  • the coefficient unit 39 multiplies the output of the phase averaging circuit 29 by lZm.
  • FIG. 22 is a block diagram showing a configuration of an OFDM signal demodulation device according to the eighth embodiment of the present invention.
  • the same parts as those in FIG. 5 are denoted by the same reference numerals.
  • the bold arrow represents a complex signal
  • the thin arrow represents a real signal
  • general control signals such as clocks required for the operation of each component. Is omitted so as not to complicate the explanation.
  • the OFDM signal demodulation device shown in FIG. 22 performs carrier frequency synchronization and CPE removal using TPS.
  • a power circuit 38 and a vector This is the result of adding a tor rotation circuit 40 and.
  • the exponentiation circuit 38 calculates the square of the complex vector corresponding to each subcarrier output from the differential detection circuit 26, and the calculation result is a correlation calculation circuit 27 Supplied to This squaring operation eliminates the 180 degree uncertainty of the phase variation due to the differential two-phase PSK modulation between the TPS symbols.
  • the correlation calculation circuit 27 calculates a correlation value between the output of the exponentiation circuit 38 and at least one of the arrangement information of the subcarrier transmitting the CP and the subcarrier transmitting the TPS.
  • the correlation value is calculated by the wideband carrier frequency error calculation circuit 2. Supplied to 8.
  • the vector rotation circuit 40 determines which region of the complex plane region divided by the imaginary axis contains the output of the differential detection circuit 26, and responds to the determination result.
  • the TPS is the differential between the symbols. This eliminates the 180 degree uncertainty of the phase fluctuation caused by the two-phase PS ⁇ modulation, and the output is supplied to the phase averaging circuit 29.
  • the phase averaging circuit 29 averages the phase of the output of the vector rotation circuit 40 corresponding to at least one of C C and TPS in the symbol, thereby obtaining C ⁇ and TPS.
  • the output thereof is supplied to the second input terminal of the phase fluctuation correction circuit 30 for estimating ⁇ .
  • the vector rotation circuit 40 divides the output of the differential detection circuit 26 into m pieces by phase. In this case, it is determined which region is included in the complex plane region, and according to the result of the determination, the output complex vector of the differential detection circuit 26 is rotated by an integral multiple of 2 ⁇ . Therefore, the phase after rotation is always included in the same region.
  • the carrier frequency error and the inter-symbol phase variation in subcarrier interval units using TPS in addition to C ⁇ Is calculated and corrected the error due to the influence of noise can be reduced compared to the first embodiment.
  • the calculation of the power inside the correlation calculation circuits 27 and 37 is based on the calculation of the magnitude of the signal such as the amplitude and the sum of the amplitudes of the real part and the imaginary part. Good.
  • the phase averaging circuit 29 is configured to output the complex output of the differential detection circuit 26 or the vector rotation circuit 40 corresponding to at least one of CP and TPS.
  • the configuration may be such that the CPE is approximated by averaging the vectors within the symbols and calculating the phase.
  • the wideband carrier frequency error calculation circuit 28 determines the synchronization state of the carrier frequency based on the output of the correlation calculation circuit 27, and when the synchronization state exists, Shall stop the output of the carrier frequency error signal in the subcarrier interval unit, and if the synchronization judgment is provided with a protection function for the front and rear sides, the effects of noise and fading etc. This can prevent erroneous operation due to the error.
  • the 2k mode of the DVB-T standard has been described as an example.
  • subcarriers arranged at the same frequency for each symbol are used. It is sufficient if the transmission method is such as to transmit a signal obtained by modulating a set of relays with the same phase for each symbol.
  • the signals are arranged at the same frequency for each symbol. It goes without saying that any transmission method that transmits a signal obtained by subjecting a set of subcarriers to m-phase PSK modulation (m is a natural number) may be used.
  • the OFDM signal demodulation device calculates a frequency error in subcarrier interval units using pilot signals arranged at the same frequency for each symbol. As a result, the frequency synchronization pull-in time can be reduced as compared with the conventional example.
  • an OFDM signal demodulation apparatus capable of further shortening the frequency synchronization pull-in time and removing the influence of CPE due to tuner phase noise and the like. Can be provided.

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

L'invention porte sur un démodulateur multiplexage par division de fréquences en quadrature comportant: un circuit (26) effectuant une détection différentielle par rapport à des symboles sur les signaux de sortie d'un circuit TFR (25); un circuit calculant les valeurs corrélatives entre les signaux de sortie de la détection différentielle et les informations d'attribution de sous-porteuses pour le signal pilote; un circuit (28) calculant l'erreur de la fréquence de la porteuse à large bande pour chacun des intervalles des sous-porteuses à partir des pics des valeurs corrélées; un circuit (23) corrigeant la fréquence de la porteuse à l'aide des erreurs de fréquence; un circuit (29) effectuant le moyennage des phases des signaux de sortie de détection différentielle correspondant aux sous porteuses pour le signal pilote; et un circuit (30) corrigeant les variations de phases communes à toutes les sous-porteuses. On peut ainsi obtenir une synchronisation des fréquences porteuses présentant un temps court d'extraction, et également éliminer la variation de phase commune à toutes les sous-porteuses et due au bruit de phase, etc. d'un tuner.
PCT/JP1998/003391 1997-07-31 1998-07-30 Demodulateur de multiplexage par division en frequences en quadrature WO1999007095A1 (fr)

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JP20663997 1997-07-31
JP9/206639 1997-07-31
JP9/213449 1997-08-07
JP21344997 1997-08-07
JP01989298A JP3238120B2 (ja) 1997-01-31 1998-01-30 直交周波数分割多重信号復調装置
JP10/19892 1998-01-30

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CN102694572A (zh) * 2011-03-25 2012-09-26 株式会社东芝 频率误差检测装置
CN101471727B (zh) * 2007-12-29 2013-04-10 京信通信系统（中国）有限公司 基于实信号的数字化自动频率检测方法
CN104965301A (zh) * 2015-07-23 2015-10-07 重庆奥特光学仪器有限责任公司 一种光学显微镜用复式串联led混合照明器

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RU2338325C1 (ru) * 2004-09-18 2008-11-10 Самсунг Электроникс Ко., Лтд. Устройство и способ для синхронизации частоты в системе ofdm
KR100738350B1 (ko) * 2004-12-21 2007-07-12 한국전자통신연구원 Ｏｆｄｍ 통신시스템에서 위상잡음 보상을 위한 등화기 및그 방법
JP2006352746A (ja) * 2005-06-20 2006-12-28 Fujitsu Ltd 直交周波数分割多重伝送用受信機
WO2008151468A1 (fr) * 2007-06-15 2008-12-18 Thomson Licensing Récepteur de signaux numériques et procécé de réception de signaux numériques
CN101478524B (zh) * 2009-01-22 2011-06-15 清华大学 一种多天线正交频分复用系统接收端相位噪声的校正方法
US9154356B2 (en) * 2012-05-25 2015-10-06 Qualcomm Incorporated Low noise amplifiers for carrier aggregation
JP5984583B2 (ja) * 2012-08-28 2016-09-06 三菱電機株式会社 周波数誤差検出装置、周波数誤差検出方法及び受信装置
CN113132039B (zh) * 2021-06-16 2021-09-03 成都德芯数字科技股份有限公司 一种rds与fm导频信号载波及相位同步方法

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CN101471727B (zh) * 2007-12-29 2013-04-10 京信通信系统（中国）有限公司 基于实信号的数字化自动频率检测方法
CN102694572A (zh) * 2011-03-25 2012-09-26 株式会社东芝 频率误差检测装置
CN102694572B (zh) * 2011-03-25 2014-07-09 株式会社东芝 频率误差检测装置
CN104965301A (zh) * 2015-07-23 2015-10-07 重庆奥特光学仪器有限责任公司 一种光学显微镜用复式串联led混合照明器
CN104965301B (zh) * 2015-07-23 2017-11-21 重庆奥特光学仪器有限责任公司 一种光学显微镜用复式串联led混合照明器

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KR20000068674A (ko) 2000-11-25

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