Classifications

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  • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
  • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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  • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
  • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
  • H01L21/565—Moulds
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  • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
  • H01L23/495—Lead-frames or other flat leads
  • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
  • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
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  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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Definitions

• the present invention relates to a resin- sealed semiconductor device, particularly to a semiconductor device in which external terminals are formed in an area of a surface of a semiconductor element on which electrodes are formed and method of manufacturing the same.
• This art includes two types one of which is referred to as the bare chip mounting. This is a method for forming a structure in which a semiconductor element is directly joined to a printed circuit board by bumps and sealed by resin.
• the other is a method for decreasing the size of a resin package in which a semiconductor element is sealed up to the plane size of the semiconductor element as possible.
• This method is generally referred to as a CSP (abbreviation of a chip size package or chip scale package) .
• Publication No. 6-224259 discloses a CSP structure in which a semiconductor element is mounted on a ceramic substrate provided with through-holes and external terminals are formed on the opposite side of the ceramic substrate to mount the substrate on a printed circuit board.
• WO 92/05582 Publication discloses a CSP structure in which a tape with external terminals is applied on the electrode formed plane of a semiconductor element through a flexible material and the external terminals are electrically connected with electrodes of the semiconductor element.
• Japanese Patent Unexamined Publication No. 6-302604 discloses a CSP structure in which a metallic wiring pattern is formed on the electrode formed plane of a semiconductor element and external terminals are formed on the pattern.
• Japanese Patent Unexamined Publication No. 6-132453 discloses a CSP structure in which leads bonded to an electrode forming surface of a semiconductor element are connected with electrodes and a part of the leads are exposed from the surface of a package to mount the element on a printed circuit board.
• Japanese Patent Unexamined Publication No. 6-268101 discloses a semiconductor device in which recesses for housing external terminals are formed on a surface of a package.
• the semiconductor devices disclosed in Japanese Patent Unexamined Publication No. 6-224259, WO 92/05582 Publication, and Japanese Patent Unexamined Publication No. 6-132453 have a problem that a semiconductor device is warped because the electrode formed plane of a semiconductor element is covered with resin but the plane opposite to the electrode formed plane is exposed from a package and thereby, an uneven temperature distribution occurs in the inside of the device when a temperature change is applied.
• Japanese Patent Unexamined Publication No. 6-132453 has a problem that a defect (solder bridge defect) occurs in which leads arranged like a row are joined each other by solder when joining the leads with a printed circuit board by solder because a plurality of leads are arranged like a row on the surface of the package at short intervals. More ⁇ over, because electrodes on the package surface are surface-mounted same as a conventional lead is, the strain at a solder joint due to the difference between the linear heat expansion coefficient of a package and that of a substrate increases and thermal fatigue breakdown easily occurs.
• a defect soldder bridge defect
• a semiconductor device of the present invention comprises a semiconductor element having a plane with a plurality of electrodes formed on it, a plurality of internal leads electrically connected to said electrodes respectively, and an electrically insulating resin package for sealing said semiconductor element and said internal leads, in which said internal leads are substantially located in the range of said electrode formed plane, and said resin package has a plurality of external-terminal receiving recesses respectively reaching said internal leads in the range of said electrode formed plane.
• the external-terminal receiving recesses are formed by a resin plate having through-holes and integrally molded with said resin package.
• the resin plate can also have recesses and film members forming the bottom of the recesses and to be broken after integrally molded with the resin package.
• the external-terminal receiving recesses are tapered toward the internal leads.
• the internal leads are bonded to the electrode formed plane by an electrically insulating adhesive. It is possible to apply the electrically insulating adhesive only to a portion wherein the internal lead is electrically connected with the electrode and a portion where the internal lead is electrically connected with an external terminal. It is preferable that the adhesive has an elastic modulus of 10 to 6,000 MPa. Moreover, it is preferable that the adhesive has a thickness of 20 to lOO ⁇ m.
• the semiconductor device further comprises a plurality of external terminals arranged in the external-terminal receiving recesses and electrically connected to the internal leads.
• solder balls or conductive metals for the external terminals.
• solder ball it is preferable that the solder ball has a height approx. two times larger than the depth of the external-terminal receiving recess.
• the present invention moreover provides a method for manufacturing the above semiconductor device.
• An embodiment of the semiconductor device manufacturing method comprises the steps of preparing a semiconductor element having a plane with a plurality of electrodes formed on it, preparing a multiple-string lead frame in which a plurality of internal leads are connected by an external frame, bonding said internal leads of the lead frame onto said electrode formed plane by an electrically insulating adhesive and electrically connecting said internal leads to said electrodes respectively, preparing a mold comprising an upper and an lower mold for defining a cavity for forming a resin package of which upper mold has protrusions for forming external-terminal receiving recesses, holding and securing said lead frame by said upper and lower molds while bringing said protrusions into contact with said internal leads, injecting resin into said cavity to seal said semiconductor element and internal leads, and separating said external frame from said internal leads at the lateral of said resin package.
• An embodiment of the semiconductor device manufacturing method comprises the steps of preparing a semiconductor element having a plane with a plurality of electrodes formed on it, preparing a multiple-string lead frame in which a plurality of internal leads are connected by an external frame, preparing a resin plate having through-holes for forming external-terminal
• An embodiment of the semiconductor device manufacturing method comprises the steps of preparing a semiconductor element having a plane with a plurality of
• An embodiment of the semiconductor device manufacturing method comprises the steps of preparing a semiconductor element having a plane with a plurality of electrodes formed on it, preparing a resin tape having a plurality of first through-holes and a plurality of foil leads formed so as to cover the first through-holes, preparing a multiple-string resin frame in which resin plates having a plurality of second through-holes are connected to an external frame by a hanging member, bonding the foil leads of said resin tape with foil leads onto said electrode formed plane by an electrically insulating resin and thereafter bonding said resin plate onto said resin tape such that the second through-holes of said resin plate are aligned with the first through-holes of said resin tape or bonding said resin plate onto said resin tape such that the second through-holes of said resin plate are aligned with the first through-holes of said resin tape and thereafter bonding the foil leads of said resin tape with foil leads onto said electrode formed plane by an electrically insulating adhesive, electrically connect ⁇ ing said leads to said electrodes respectively, preparing a mold
• a semiconductor device of the present invention can be mass-produced because a multiple-string lead frame or a multiple-string resin plate is used and thereby, the conventional transfer molding method can be applied. Moreover, because a semiconductor element is completely sealed in a resin package, it is possible to obtain a semiconductor device with a high moisture resistance. Furthermore, because external terminals used to mount on a circuit board are received by recesses provided on a resin package, it is possible to prevent a solder bridge defect from occurring. Further ⁇ more, because an electrically insulating adhesive between an internal lead and the electrode formed plane of a semiconductor element absorbs thermal strain, it is possible to improve the durability against thermal breakdown.
• Figure 1 is a perspective view of a first embodiment of a CSP-type semiconductor device of the present invention, which is locally cut out for clarification purpose;
• Figure 2 is a sectional view of the first embodiment of a CSP-type semiconductor device of the present invention
• Figures 3a to 3f are sectional views showing a manufacturing method for the first embodiment
• Figure 4 is a perspective view of a multiple- string lead frame usable for the first embodiment
• Figure 5 is a sectional view showing a first modification of the first embodiment
• Figure 6 is a sectional view showing a second modification of the first embodiment
• Figure 7 is a perspective view of a third modification of the first embodiment, which is locally cut out for clarification purpose;
• Figure 8 is a sectional view of the third modification in Figure 7;
• Figure 9 is a perspective view of a fourth modification of the first embodiment, which is locally cut out for clarification purpose;
• Figure 10 is a sectional view of the fourth modification in Figure 9;
• Figure 11 is a perspective view of a fifth modification of the first embodiment, which is locally cut out for clarification purpose;
• Figure 12 is a sectional view of the fifth modification in Figure 11;
• Figure 13 is a sectional view of a sixth modification of the first embodiment
• Figure 14 is a sectional view of a seventh modification of the first embodiment
• Figure 15 is a sectional view of a second embodiment of a CSP-type semiconductor device of the present invention
• Figure 16 is a bottom view of the second embodiment of a CSP-type semiconductor device of the present invention, which is locally cut out for clarification purpose
• Figure 17 is a sectional view showing the second embodiment of a CSP-type semiconductor device of the present invention mounted on a circuit board;
• Figures 18a to 18g are sectional views showing a manufacturing method for the second embodiment
• Figures 19a to 19g are sectional views showing another manufacturing method for the second embodiment
• Figure 20 is a sectional view of the first modification of the second embodiment having the same purpose as the sixth modification of the first embodiment shown in Figure 13;
• Figure 21 is a sectional view of a second modification of the second embodiment
• Figure 22 is a sectional view of a third modification of the second embodiment
• Figure 23 is a sectional view of a fourth modification of the second embodiment
• Figure 24 is a sectional view of a fifth modification of the second embodiment
• Figure 25 is a sectional view of the fifth modification of the second embodiment shown in Figure 24, which is locally cut out for clarification purpose;
• Figure 26 is a bottom view of a sixth modification of the second embodiment, which is locally cut out for clarification purpose;
• Figure 27 is a sectional view of a seventh modification of the second embodiment
• Figure 28 is a bottom view of the sixth modification of the second embodiment shown in Figure 27, which is locally cut out for clarification purpose;
• Figure 29 is a sectional view of a eighth modification of the second embodiment, in which internal leads are made of an insulating film with foil leads;
• Figure 30 is a bottom view of the eighth modification of the second embodiment shown in Figure 29, which is locally cut out for clarification purpose;
• Figures 31a to 31g are sectional views showing a manufacturing method for the eighth modification of the second embodiment
• Figure 32 is a top view of a multiple-string resin plate used for the eighth modification of the second embodiment
• Figure 33 is a sectional view of a modified form of the eighth modification of the second embodiment.
• Figure 34 is a bottom view of the modified form of the eighth modification of the second embodiment shown in Figure 33;
• Figure 35 is a sectional view of another modified form of the eighth modification of the second embodiment;
• Figure 36 is a perspective view of a semiconductor devices mounting module on which CSP-type semiconductor devices of the present invention are mounted.
• Figure 37 is a side view of the semiconductor device mounting module shown in Figure 36.
• Electrodes 2 of a semiconductor element 1 are arranged like columns at the central portion of the circuit formed plane of the element.
• a plurality of metallic- plate internal leads 3 are bonded to the circuit formed plane la of the semiconductor element 1 by an electri ⁇ cally insulating adhesive 4 and the electrodes 2 of the semiconductor element 1 are electrically connected with the internal leads 3 by wires 5.
• these members are sealed with a resin package 11.
• the internal leads 3 are cut at the lateral of the package 11.
• Spherical external terminals 6 are connected to planes opposite to the bonded planes of the internal lead 3 and exposed to the outside of the resin package 11 through recesses 17 formed on the package 11.
• the external terminals 6 are connected to electrodes 13 of a printed circuit board 12 .
• solder As the material of the external terminal 6, it is possible to directly join the external terminal 6 with the internal lead 3 and the electrode 13 of the printed circuit board 12. It is practical that the internal lead 3 and the external terminal 6 are electrically connected each other one to one. It is preferable to use Pb/Sn-base eutectic solder (approx. 40% of Pb and approx. 60% of Sn) frequently used for mounting of surface-mounting semiconductor devices as the material of solder. In this case, it is preferable to previously apply surface treatment such as solder plating, nickeling, or tinning to the joint surface of the internal lead 3 with the external terminal 6 to improve the wettability of solder in order to raise the connecting strength.
• Pb/Sn-base eutectic solder approximately 40% of Pb and approx. 60% of Sn
• the external terminals 6 are located in a range of a plane of the semiconductor element 1, it is possible to provide a CSP-type semiconductor device by making the plane dimension of the semiconductor device approach the plane dimension of the semiconductor element 1. It is adequately possible by the present art to increase the thickness of the resin package 11 at the lateral of the semiconductor element 1 up to approx. 0.1 to 0.5 mm and moreover, increase the thickness of resin above the semiconductor element and under the internal lead up to approx. 0.15 to 0.2 mm. Therefore, it is possible to set the plane dimension of the package, that is, the plane dimension of the semiconductor device to a value obtained by adding 0.2 to 1.0 mm to the plane dimension of the semiconductor element 1.
• a TSOP is a thin semiconductor device with the highest density among the semiconductor devices practi ⁇ cally used at present. For example, when mounting a memory element by 8 mm by 15 mm on the TSOP, a mounting area of 12 mm by 18 mm is necessary at the outer periphery of leads. In the case of this embodiment, a mounting area of 9 mm by 16 mm is enough. Therefore, by using this embodiment, it is possible to decrease the mounting area to at least 2/3 or less. Thus, the semiconductor device of this embodiment is particularly effective to mount a memory element for which very high density mounting is requested but which does not have a large number of external terminals.
• the height of the external terminal 6 made of solder larger than the depth of the recess 17.
• the height is approx. two times larger than the depth of the recess 17. If the height exceeds a value two times larger than the depth of the recess 17, protrusion portion of the solder easily moves to right and left when it is fused, adjacent solder pieces contact each other, and solder bridge defects may frequently occur.
• a first-embodiment manufacturing method is described below by referring to Figures 3a to 3f.
• Figure 3a shows a sectional view of the semiconductor element 1 used for this embodiment.
• the electrodes 2 are formed in two rows at the center of a circuit formed plane la of the element.
• the internal leads 3 are bonded to the element 1 by the adhesive 4.
• every internal lead 3 is connected to an external frame 5 to form an integrated lead frame 14.
• the internal leads 3 are electrically connected with the electrodes 2 of the semiconductor element 1 by wires 5.
• an upper mold 16 having protrusions 30 and a lower mold 29 clamp the internal leads 3 with the protrusions 30 urged against the internal leads 3 and resin is injected into a cavity
• the lead frame 14 is the multiple-string type like a lead frame used for a normal resin-sealed semiconductor device. Therefore, it is possible to form a plurality of packages at the same time.
• the CSP-type semiconductor device of this embodiment can be fabricated by the manufacturing method same as that of a conventional resin-sealed semiconductor device, it is possible to raise the reliability and lower the manufacturing cost.
• the electrically insulating adhesive 4 is applied to the whole surface of the internal lead 3.
• a double-coated adhesive tape obtained by applying an adhesive to both sides of an electrically insulating tape instead of the adhesive it is also possible to divide the double-coated adhesive tape into pieces 4a and 4b and apply the pieces 4a and 4b only to a wire-bonding portion of the internal lead 3 and a portion to which the external terminal 6 is connected respectively.
• a double-coated adhesive tape easily absorbs water and moreover, it is easily peeled in a package, it is preferable to decrease the area of the tape from the viewpoint of reliability.
• the portions to which the pieces 4a and 4b of the double-coated adhesive tape are applied are pressed against the internal lead 3 for wire bonding and resin sealing. Therefore, it is always necessary to apply a double-coated adhesive tape to the portions.
• solder balls are used as external terminals.
• copper as the material of the external terminals 6
• the solder 32 and solder 33 can use the same material, it is preferable that the melting point of the solder 32 to be connected to the internal leads 3 is higher than that of the solder 33 to be connected to the electrodes 13 so that the solder 32 to be connected to the internal leads 3 is not melted when connecting the internal leads 3 to the electrodes 13 of the printed circuit board 12.
• an electrically insulating film 21 provided with foil leads 20 instead of the metallic- plate internal leads 3.
• the electrically insulating film 21 with foil leads can be the film used for a TCP (tape carrier package)-type semiconductor device. By using the electrically insulating film 21 with foil leads, it is possible to fine internal wiring and increase the degree of freedom of the position of the external terminals 6 and moreover, decrease the thickness of package.
• thermocompression bonding for connection with the electrodes 2 of the semiconductor element 1 by extending the foil leads 20.
• This joining method is the same as that used for a TCP-type semiconductor device.
• the internal lead 3 is joined with each electrode 2 by thermocompression bonding so as to cover the electrode 2.
• the internal leads 3 are cut at the lateral of the package 11.
• the external terminals 6 are joined to the backs of the electrode joining planes of the internal leads 3.
• the electrode 2 of the semiconductor element 1 is generally made of aluminum, it is impossible to join aluminum with solder. However, by using copper for the internal lead 3, it is possible to thermocompression-bond the internal lead 3 with aluminum and moreover join the internal lead 3 with solder. Therefore, it is possible to join both the electrode 2 and the external terminal 6 with the internal lead 3. Moreover, by gold-plating the joint surface of the internal lead 3 for the electrode 2 and solder-plating or tinning the joint surface of the internal lead 3 for an external terminal, it is possible to more securely join the internal lead 3.
• this semiconductor device can also be fabricated by using the multiple-string lead frame shown in Figure 4, it is possible to improve the reliability and reduce the manufacturing cost.
• the internal leads 3 are cut at the lateral of the package 11 in the case of the above ⁇ described semiconductor device, it is also possible to cut the internal leads 3 at a position where the internal leads 3 are slightly protruded from the package lateral as shown in Figure 13.
• it is also possible to inspect characteristics of the semiconductor device by applying probes 32a and 32b to protrusions 3' of the internal leads.
• probes are used for electrical contact with the protrusions 3' of the internal leads.
• a socket for holding the protrusion 3'.
• an external terminals are set when a semiconductor device is fabricated.
• Electrodes 2 of a semiconductor element 1 are arranged like a column at the center of a circuit formed plane la of the element 1.
• a plurality of internal leads 3 are bonded onto the electrode formed plane la of the semiconductor element 1 by an insulating adhesive 4 and are electri ⁇ cally connected to the electrodes 2 of the element 1 by wires 5.
• a resin plate 8 with through-holes 9 formed therein is bonded to a plane 3b at the side opposite to a plane 3a bonded with the electrode formed plane la of each lead 3 through an adhesive 7. These members are sealed by a resin package 11 so that a plane 8a on which openings of the through-holes 9 are present is exposed to the surface of the package 11.
• the through-holes 9 form recesses 17 for receiving external terminals 6.
• Each lead 3 is cut at the lateral of the package 11.
• a metallic external terminal 6 serving as electrical connection means between the semiconductor element and the outside is connected to the plane 3b of each lead 3 through the recess 17.
• the external terminal 6 of this embodiment is a solder ball.
• the semiconductor device shown in this embodiment forms the package 11 by sealing the semicon ⁇ ductor element 1, leads 3, adhesive 4, wires 5, and resin plate 8 with a sealing resin 10, a part of each lead 3 is exposed from the lateral Ila of the package 11.
• the external terminals 6 are located at the bottom lib of the package, formed in a range of the electrode formed plane la of the semiconductor element 1, and arranged in two columns along the longitudinal direction of the package 11. Moreover, a part of the external terminal 6 is spherically protruded beyond the package 11 so as to be connected with a circuit board for mounting a semiconductor device.
• solder e.g. Pb-Sn eutectic solder
• surface treatment such as solder plating, Ni (nickel) plating, or Sn (tin) plating to the joint surface of the lead 3 with the external terminal
• an insulating material such as polyimide resin, epoxy resin, or silicone resin.
• the adhesive 4 for bonding the lead 3 to the semiconductor element 1 used is a material with an elastic modulus of 10 to 6,000 MPa.
• the elastic modulus of the adhesive 4 in the above range, the shape of the adhesive is stabilized (no outflow of adhesive occurs) when bonding the lead 3 and a preferable adhesiveness is obtained.
• the thickness of the adhesive 4 to 20 to lOO ⁇ m for practical use, it is possible to improve the durability of the joint between an external terminal and a circuit board against fatigue breakdown due to repetition of temperature change after mounting a semiconductor device on the circuit board. This is because an adhesive layer absorbs and moderates a thermal strain produced at a solder joint portion due to the difference between the linear heat expansion coefficient of the semiconductor device and that of the circuit board.
• the resin plate 8 is made of an electrically insulating material which is not wettable by solder. Specifically, a film member made of polyimide resin, epoxy resin, silicone resin, bismaleimidotriazine or the like is used. Though the thickness of the resin plate 8 is set to a value in which a wire is not exposed from the surface of a package, a plate of which thickness is in a range of approx. 50 to 150 ⁇ m is used.
• a thin wire made of Au (gold), Ag (silver), Cu (copper), or Al (aluminum) with a diameter of 10 to 30 ⁇ m is used as the wires 5.
• the lead 3 is made of an Fe-Ni alloy (iron- nickel alloy or Fe-42Ni) or a Cu (copper) alloy and its thickness is set to approx. 0.1 to 0.2 mm.
• Epoxy resin to which, for example, a phenol- based curing agent, silicone rubber, and filler (fused quartz with the maximum grain diameter of approx. 7O ⁇ m) are added is used as the sealing resin 10.
• the semiconductor device shown in this embodiment is mounted on the circuit board 12 by making the side lib of the external terminal formed plane (bottom) of the package 11 face the circuit board 12 as shown in Figure 17.
• the semiconductor device is electrically connected with the circuit board 12 by arranging each external terminal 6 on its corresponding electrode 13 of the circuit board 12 and joining the external terminals 6 with the electrodes 13 of the circuit board.
• the external terminals 6 are made of solder, they are joined with the electrodes 13 of the circuit board 12 by fusing the external terminals 6 after mounting the device on the circuit board 12.
• the external terminals 6 are made of a material other than solder (e.g. Cu or Ni) they are joined by supplying solder to joint portions (by, for example, the printing method) and fusing the solder.
• it is preferable to improve the wettability of solder by, for example, using flux.
• the thickness 6a of the external terminal 6 represents the distance from the contact portion with the lead 3 to the front end of the external terminal 6 in the direction perpendicular to the electrode formed plane la of the semiconductor element 1. It is preferable to set the thickness 6a of the external terminal to a value approx. two times larger than the depth 17a of the recess. By setting the thickness 6a to the value, it is possible to increase the height of the external terminal 6 when the external terminal 6 is made of solder. Thereby, it is possible to moderate thermal strain produced at the solder joint portions between the external terminals and the circuit board by deformation of the external terminals themselves due to a temperature change after the semiconductor device is mounted on the circuit board and it is possible to increase the reliability of the solder joint portions.
• the semiconductor device of this embodiment it is possible to make the external size of a package approach the size of a semiconductor element because external terminals are located in the plane dimension (in the plane) of the electrode formed plane of the semiconductor element.
• the resin thickness 10a Figure 14
• the filler added in the resin 10 is smoothly injected into a mold at the time of resin sealing without clogging.
• the resin thickness 10a By setting the resin thickness 10a to 0.1 ⁇ 0.5 mm, the semiconductor element 1 does not move from a predeter- mined position in the mold at the time of resin sealing and the semiconductor element and the wires are not exposed from the package.
• the semiconductor device of this embodiment it is possible to improve the reliability of the moisture resistance or the like because the semiconductor element can be covered with resin similarly to the case of a conventional semi ⁇ conductor device. Furthermore, because the semicon ⁇ ductor element is almost uniformly covered with the sealing resin, it is possible to reduce the warpage of the semiconductor device. Furthermore, because external terminals are enclosed by a material to which solder is not wettable, it is difficult for a solder bridge defect to occur when mounting the semiconductor device on a circuit board.
• a manufacturing method for the semiconductor device of the second embodiment is described below by referring to Figures 18a to 18g.
• Figure 18a shows a sectional view of a semiconductor element 1 used for this embodiment.
• Electrodes 2 are formed at the center of the electrode formed plane la of the semiconductor element 1. Moreover, a not-illustrated protective film (passivation) for protecting the circuit of the semiconductor element 1 is formed on the electrode formed plane la of the semiconductor element 1 except at least the wire joint portions of the electrodes 2.
• passivation for protecting the circuit of the semiconductor element 1 is formed on the electrode formed plane la of the semiconductor element 1 except at least the wire joint portions of the electrodes 2.
• leads 3 are bonded to the electrode formed plane la of the semiconductor element 1 by an insulating adhesive 4.
• a resin plate 8 provided with through-holes 9 serving as recesses for receiving external terminals after forming a package is bonded to sides 3b opposite to the bonding planes of the leads 3 with the semiconductor element 1 by an adhesive 7.
• the leads 3 are connected to an external frame 15 to form a integrated lead frame 14 as shown in Figure 4.
• the thus formed semiconductor element 1 is set in a mold 16, 29 of the transfer-molding to seal them with resin.
• molding is performed while bringing a plane 8a of the resin plate 8 into contact with an inside surface 16a of an upper mold 16.
• the thickness of the resin plate 8 it is possible to prevent the resin from entering the through- holes 9 from the circumference of the plane 8a of the resin plate 8.
• the external frame 15 of the lead frame 14 is held by the upper mold 16 and lower mold 29 so that the semiconductor element 1 or the like is not moved due to the inflow pressure of the resin in the upper mold 16 and lower mold 29.
• the plane 8a of the resin plate 8 is exposed and the recesses 17 for housing external terminals are formed on the surface of the package 11 as shown in Figure 18e.
• the external terminals 6 are joined with the leads 3 by setting solder balls serving as the external terminals 6 in the recesses 17 and heating the balls.
• solder balls it is preferable to improve the wettability of solder by using flux or heating the solder balls in an inert gas or a reducing gas.
• the external frame 15 of the lead frame 14 is cut at the package lateral Ila to obtain the semiconductor device shown in Figures 14 and 15.
• the external terminals 6 are formed and thereafter, the internal leads 3 are cut at the package lateral. Unless any external terminal is necessary, however, it is possible to cut the internal leads 3 at the package lateral without forming the external terminals 6.
• the lead frame used for this embodiment shown in Figure 4 is the multiple-string type in which a plurality of same parts are connected each other and a plurality of packages can be formed by one-time molding.
• FIG 19a shows a sectional view of the semiconductor element 1 used for this embodiment. Electrodes 2 are formed at the center of the electrode formed plane la of the semiconductor element 1. Moreover, a not-illustrated protective film (passivation) for protecting the circuit of the semiconductor element 1 is formed on the electrode formed plane la of the semiconductor element 1 except at least the wire joint portions of the electrodes 2.
• a not-illustrated protective film (passivation) for protecting the circuit of the semiconductor element 1 is formed on the electrode formed plane la of the semiconductor element 1 except at least the wire joint portions of the electrodes 2.
• leads 3 are bonded to the electrode formed plane la of the semiconductor element 1 through an insulating adhesive 4.
• a resin plate 8 provided with recesses 18 serving as portions for receiving external terminals after forming a package is bonded to a plane 3b opposite to the bonding plane of the lead 3 with the semiconductor element 1 by the adhesive 7.
• the recesses 18 open at the bonding plane side of the resin plate 8 with the leads 3 and film members 19 are provided at the side opposite to the bonding plane side.
• the film members 19 are made of the same material as that of the resin plate 8.
• the leads 3 are connected to the external frame 15 as shown in Figure 4 to form the integrated lead frame 14. In the step of Figure 19b, it is possible to bond the lead frame 14 in which the adhesive 4 and resin plate 8 are bonded to the leads 3 onto the semiconductor element 1 or separately bond the adhesive 4, lead frame 14, and resin plate 8 onto the semiconductor element 1.
• the leads 3 and the electrodes 2 of the semiconductor element 1 are electrically connected each other by wires 5.
• the thus formed semiconductor element is set in the mold 16, 29 of transfer-molding to seal them with resin.
• molding is performed while pressing the plane 8a of the resin plate 8 at the film member side against the inside surface 16a of the upper mold 16.
• the film members 19 of the recesses 18 prevent resin from entering the recesses 18.
• the external frame 15 of the lead frame 14 is held by the upper mold 16 and lower mold 29 so that the semiconductor element 1 or the like is not moved due to the inflow pressure of resin in the upper mold 16 and lower mold 29.
• the film members 19 are broken by, for example, a needle-shaped member 28 to remove the members 19 and form recesses 17 for receiving external terminals on the surface of the package 11.
• the external terminals 6 are joined to the leads 3 by setting solder balls serving as the external terminals 6 in the recesses 17 and heating the balls.
• the external frame 15 of the lead frame 14 is cut at the package lateral Ila to obtain the semiconductor device shown in Figures 15 and 16.
• the external terminals 6 are formed and thereafter, the lead frame 14 is cut at the package lateral. However, unless any external terminal is necessary, it is possible to cut the lead frame 14 at the package lateral without forming the external terminals 6.
• the film member 19 It is possible to form the film member 19 with the material same as that of the resin plate 8 or a material different from that of the resin plate 8. Moreover, it is possible to remove the film member 19 after resin sealing by etching according to chemicals or fuse and remove the member 19 by forming it with a material having a melting point lower than that of the resin plate 8 or sealing resin 10.
• Figure 20 shows another modification of the second embodiment.
• a part of leads 3 are exposed to the outside from the lateral Ila of the package 11 to form protrusions 3c.
• the protrusions 3c of the leads can be used as terminals for inspecting operations of the semiconductor element 1. Even after the semiconductor device is mounted on a circuit board, the semiconductor device can be inspected by bringing an inspection probe into contact with the protrusions 3c.
• Figure 21 shows a second modification of the second embodiment. A part of the leads 3 are exposed to the outside from the lateral Ila of the package 11 and extended and joined with the circuit board 12 as radiating leads 3d by solder or the like.
• the radiating leads 3d are not only bonded with the circuit board 12 as shown in Figure 21 but also it is possible ⁇ 10 to form the leads 3 into a structure for radiating heat in the space around the semiconductor device by folding them in the direction opposite to the circuit board 12.
• the external terminals 6 are used to join a semiconductor device with an external object (e.g. circuit board) and form electrical connections. Therefore, it is enough that the external terminals 6 are supplied to the recesses 17 of the package 11 or joint portions of the circuit board to be connected to the external terminals when mounting the semiconductor device on the circuit board. Therefore, it is possible that a semiconductor device has not only the structure provided with the external terminals 6 like the second embodiment shown in Figures 15 and 16 but also a structure provided with no external terminal.
• Figure 23 shows a semiconductor device of the present invention provided with no external terminal.
• the recesses 17 for housing external terminals are formed on the surface of the package 11 and solder is supplied to the recesses 17 when mounting the semiconductor device on a circuit board to form the external terminals 6 for connecting the semiconductor device with the circuit board.
• the semiconductor device mounted on the circuit board shown in Figure 23 is the same as that shown in Figure 17.
• the second embodiment shown in Figures 15 and 16 shows the semiconductor device in which the electrodes 2 of the semiconductor element 1 are arranged like a column at the central portion of the electrode formed plane la.
• Figures 24 to 28 show a semiconductor device in which electrodes 2 are arranged around an electrode formed plane la.
• the electrodes 2 of the semiconductor element 1 are formed at the long-side ends of the semiconductor element 1 and joined with leads 3 extending to the central portion of the semiconductor element 1 from the long side of it by wires 5.
• the leads 3 are arranged at positions not covering the electrodes 2 arranged around the electrode formed plane la.
• the example shown in Figures 24 and 25 is the same as the second embodiment shown in Figures 15 and 16 except the forming place of the electrodes 2 and the joint places of the electrodes 2 and leads 3.
• Figure 26 shows a semiconductor device in which the electrodes 2 of a semiconductor element 1 are arranged around an electrode formed plane la.
• the electrodes 2 of the semiconductor element 1 are formed at the long-side ends of the semiconductor element 1 and joined with leads 3 extended up to the vicinity of the electrodes 2 to be connected from the short side of the semiconductor element 1 by wires 5.
• electrodes 2 are arranged on a periphery portion of an electrode formed plane la of the semiconductor element 1 and leads 3 are directly joined with the electrodes 2.
• Metallic external terminals 6 serving as electrical connection means between the semiconductor element and an external object are connected to planes 3b of the leads opposite to joint planes 3a with the electrodes 2.
• the external terminals 6 are coaxially located with the electrodes 2 of the semiconductor element 1 and their positions on the plane coincide with each other.
• a resin plate 8 having through-holes 9 is bonded to the surface 3b of the leads 3, openings of the through-holes 9 of the resin plate 8 are exposed to the surface of a package, and recesses 17 for receiving the external terminals 6 are formed on the surface of the package.
• solder e.g. Pb-Sn- based eutectic solder
• surface treatment such as solder plating, Ni (nickel) plating, or Sn (tin) plating to the joint portions of the leads 3 with the external terminals 6.
• the leads 3 used for this embodiment are made of a Cu (copper) alloy and their thickness ranges from approx. 0.05 to 0.2 mm.
• Electrodes 1 are generally made of Al (aluminum) and the electrodes
• the electrodes 2 can directly be joined with the leads 3 by using Cu for leads 24. Moreover, the electrodes 2 can securely be joined with the leads 3 by applying surface treatment such as Au (gold) plating to the joint portions of the lead 3 with the electrodes 2.
• a resin tape 21 with foil leads 20 formed on it is bonded to the electrode formed plane la of the semi ⁇ conductor element 1 instead of the metallic-plate leads 3 by an adhesive 4.
• One end 20a of the foil lead 20 and the electrode 2 are electrically connected with each other by thermocompression bonding or the like.
• a plurality of through-holes 22 are formed on the resin tape 21.
• One end 20b of the foil lead 20 is extended so as to cover an opening 22a of the through-hole 22 at the electrode formed plane side.
• a resin plate 8 having a plurality of through- holes 9 is bonded to a plane 21b opposite to the plane 21a of the resin tape 21 bonded with the electrode formed plane la by an adhesive 7 and the through-holes 9 of the resin plate 8 and the through-holes 22 of the resin tape 21 are aligned with each other.
• the recesses 17 for housing the external terminals 6 are formed on the surface of the package by bonding the resin plate 8 provided with the through-holes 9 to the resin tape 21 and exposing a plane 8a of the resin plate 8 to the surface of the package 11.
• Metallic external terminals 6 serving as electrical connection means between the semiconductor device and an external object are housed in the recesse ⁇ 17 (comprising the through-holes 22 of the resin tape 21 and the through-holes 9 of the resin plate 8) and joined with the ends 20b of the foil leads 20.
• the package 11 is formed by sealing the semiconductor element 1, resin tape 21, adhesive 4, foil leads 20, and resin plate 8 with the sealing resin 10.
• the external terminals 6 are located at the bottom lib of the package and formed in a range of the electrode formed plane la of the semiconductor element 1 and arranged like an array. Moreover, a part of each of the external terminals 6 is spherically protruded to the outside of the package 11 so that it can be connected with a circuit board for mounting the semiconductor device.
• Hanging members 23a extending to four corners of the package 11 from the resin plate 8 are formed on the bottom lib of the package where the plane 8a of the resin plate 8 is exposed.
• the hanging members 23a are used to secure the package constituting members such as the semiconductor element 1 in a mold at the time of resin sealing.
• the resin tape 21 with the foil leads 20 a tape carrier used for a conventional tape carrier package (TCP) is used.
• TCP tape carrier package
• the foil leads 20 can be joined with the electrodes 2 of the semiconductor element 1 by the tape automated bonding (TAB) art.
• the foil leads 20 are made of Cu (copper) or Au (gold) and the resin tape 21 is made of polyimide resin or the like.
• solder e.g. Pb-Sn- based eutectic solder
• solder plating Ni (nickel) plating, or Sn (tin) plating to the joint portions of the foil leads 20 with the external terminals 6.
• an insulating material such as polyimide resin, epoxy resin, or silicone resin is used.
• a material with an elastic modulus of 10 to 6,000 MPa is used for the adhesive 4 for bonding the resin tape 21 to the semiconductor element 1.
• the shape of the adhesive is stabilized when bonding the resin tape 21 and a preferable adhesiveness is obtained, and moreover it is possible to improve the durability of the solder joint portions between the external terminals and the circuit board against fatigue breakdown due to repetition of temperature change after mounting the semiconductor device on the circuit board.
• the present semiconductor device it is possible to make the plane size of a package approach the plane size of a semiconductor element because external terminals are located in the plane dimension (in the plane) of the electrode formed plane of the semiconductor element.
• the resin thickness 10a around the semiconductor element 1 to 0.1 mm or more, filler added in the resin 10 is smoothly injected into a mold at the time of resin sealing without clogging.
• the resin thickness 10a to approx. 0.5 mm, the semiconductor element 1 does not move from a predetermined position upon molding. Therefore, it is possible to obtain a package with a dimension obtained by adding 1.0 mm to the plane dimension of the semiconductor element or less.
• the present semiconductor device can be covered with resin similarly to the case of a conven ⁇ tional semiconductor device, it is possible to improve the reliability of the moisture resistance or the like. Furthermore, because the external terminals 6 can be arranged like an array at the bottom of a package, it is possible to cope with increase of the number of terminals (increase of the number of pins) of a semiconductor device.
• FIG. 31a shows a sectional view of the semiconductor element 1 used for this embodiment.
• the electrodes 2 are formed on a periphery portion of the electrode formed plane la of the semiconductor element 1.
• a not-illustrated protective film (passivation) for protecting the circuit of the semi ⁇ conductor element 1 is formed on the electrode formed plane la of the semiconductor element 1 except at least the foil lead joint portion of the electrodes 2.
• the resin tape 21 with foil leads 20 is bonded to the electrode formed plane la of the semiconductor element 1 by the insulating adhesive 4 so that the foil lead formed plane 21a faces the electrode formed plane la.
• the resin tape 21 is provided with through-holes 22 for joining external terminals with the foil leads 20.
• the resin plate 8 provided with through-holes 9 serving as recesses for housing the external terminals after forming a package is bonded to the plane 21b opposite to the plane of the resin tape 21 bonded with the semiconductor element 1 by the adhesive 7 so that the through-holes 22 of the resin tape 21 align with the through-holes 9 of the resin plate 8.
• the resin plate 8 is connected to the external frame 23b shown in Figure 32 by hanging members 23a to form a frame-shaped member 23 in which a plurality of same parts are connected.
• thermocompression bonding or the like. It is possible to join the foil lead 20 with the electrode 2 of the semiconductor element 1 by the conventional TAB art.
• the thus formed assembly is set in a mold 16, 29 of the transfer-molding to seal with resin.
• molding is performed by bringing the outside plane 8a of the resin plate 8 into contact with the inside surface 16a of an upper mold 16.
• the plane 8a of the resin plate 8 By bringing the plane 8a of the resin plate 8 into contact with the upper mold 16, it is possible to prevent resin from entering the through-holes 9 from the circumference of the plane 8a of the resin plate 8.
• parts of hanging members 23a are held by the upper mold 16 and lower mold 29 so that the semicon ⁇ ductor element 1 or the like is not moved due to the inflow pressure of resin in the upper mold 16 and lower mold 29.
• the outside plane 8a of the resin plate 8 is exposed and recesses 17 for receiving external terminals are formed on the surface of the package 11 as shown in Figure 31e.
• the external terminals 6 are joined to the foil leads 20 by mounting solder balls serving as the external terminals 6 in the recesses 17 and heating them.
• solder balls it is preferable to improve the wettability of solder by using flux or heating the balls in an inert gas or an reducing gas.
• the hanging members 23a are cut at the lateral of the package to obtain the semiconductor device shown in Figures 29 and 30.
• the external terminals 6 are formed and thereafter, the hanging members 23a are cut at the lateral of the package.
• any external terminal is necessary, it is possible to cut the hanging members 23a at the lateral of the package without forming the external terminals 6.
• the modification of the second embodiment of the semiconductor device of the present invention shown in Figures 29 and 30 uses the resin film with foil leads. However, it is possible to omit the resin film if desired as shown in Figure 33.
• the foil leads 20 are bonded to the formed plane la of the electrode 2 of the semiconductor element 1 by the adhesive 4 and ends 20a of the foil leads 20 and the electrodes 2 are joined by thermocompression bonding.
• the foil leads 20 are directly bonded to the resin plate 8 by the resin 7.
• the foil leads 20 are directly bonded to the resin plate 8 by the adhesive 7.
• Figures 36 and 37 show a semiconductor module in which semiconductor devices 26 of the present invention are mounted on a circuit board 12.
• the circuit board 12 is provided with a socket for connection with an external unit.
• the semiconductor devices 26 are mounted on the surface 12a of the circuit board 12 by the external terminals 6 provided in the bottom lib of the package facing the surface 12a of the circuit board 12 (plane at the side facing the circuit board 12) .
• the semiconductor module shown in Figures 36 and 37 has the semiconductor devices 26 including semiconductor elements mainly operating as memory and it is used as a memory card or memory module.

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• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Computer Hardware Design (AREA)
• Power Engineering (AREA)
• Manufacturing & Machinery (AREA)
• Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

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Cited By (7)

Citations (4)

• 1996
  • 1996-06-19 WO PCT/JP1996/001689 patent/WO1997001865A1/en active Application Filing
  • 1996-06-19 TW TW085107434A patent/TW299488B/zh active
  • 1996-06-28 IN IN1139CA1996 patent/IN191568B/en unknown

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