WO1993001615A1 - Silicon wafer and its cleaning method - Google Patents
Silicon wafer and its cleaning method Download PDFInfo
- Publication number
- WO1993001615A1 WO1993001615A1 PCT/JP1992/000839 JP9200839W WO9301615A1 WO 1993001615 A1 WO1993001615 A1 WO 1993001615A1 JP 9200839 W JP9200839 W JP 9200839W WO 9301615 A1 WO9301615 A1 WO 9301615A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- silicon wafer
- wafer
- oxide film
- silicon
- thermal oxide
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02043—Cleaning before device manufacture, i.e. Begin-Of-Line process
- H01L21/02052—Wet cleaning only
Definitions
- the present invention relates to a silicon wafer for LSI manufacturing, and more particularly to a silicon wafer having a small number of voids on one surface of the wafer.
- the LSI manufacturing process after the silicon wafer stock first example HoSO ⁇ - H 2 0 2, NH 4 OH-H 2 0 9, HC 1- H. 0. Organic substances, metals, particles, etc. attached to the silicon wafer are removed by washing using various chemicals such as.
- the above-described cleaning is performed, for example, before diffusion or the like in order to prevent the deterioration of the element characteristics due to the above-described organic substances, metals, particles, and the like.
- the present inventors have found the following regarding the cleaning method, the surface state of the wafer after cleaning, and the relationship between the device characteristics.
- the surface roughness Ra of a CZ silicon wafer obtained by slicing a silicon single crystal prepared by the pulling method and mirror-polishing it is approximately 0.1 to 0.4 nm when measured with a scanning tunneling microscope.
- the surface roughness Ra is the average center line surface roughness, and is the average of the absolute values of the size of the irregularities from the center line obtained by averaging the irregularities.
- the present inventors vacancies silicon is interposed guessing.
- the silicon surface is etched by about 80 A by one washing, but if there is a vacancy, isotropic etching is not performed.
- the large surface roughness of the CZ wafer is due to the large number of vacancies in the crystal.
- wafers with a diameter of 8 inches or more have a high vacancy density and become rough. It is thought that if the diameter increases, the vacancies will increase due to uneven heat distribution and strain due to gravity, but the true cause is not yet known.
- the present invention is directed to a silicon wafer capable of forming a higher-performance device for a large-diameter wafer having a diameter of 8 inches or more by suppressing surface roughness of the wafer due to H 2 O 2 cleaning.
- the purpose is to: Disclosure of the invention
- a first gist of the present invention resides in a silicon wafer having a thermal oxide film formed on the entire surface of a silicon wafer having a diameter of 8 inches or more obtained by slicing an ingot obtained by a pulling method.
- the second aspect is present in wafer cleaning method to Toku ⁇ to wash ⁇ thermal oxide film of silicon wafer of the first aspect the ⁇ E hard overall post entirely removed by NH ⁇ OH- H 2 0 2.
- the silicon wafer obtained in this study is obtained by slicing an ingot manufactured by the pulling method, polishing the mirror, cleaning it, and then heating and oxidizing it in an oxidizing atmosphere such as an oxidation furnace to form a thermal oxide film on the surface.
- an oxidizing atmosphere such as an oxidation furnace
- Thermal oxidation treatment is dry oxidation or wet acid that oxidizes in an atmosphere containing moisture. It may be either of These oxidation treatments reduce the vacancy density of the silicon surface layer compared to the bulk vacancy density, and the surface layer becomes a better crystal.
- NH 4 from the viewpoint of preventing surface roughening for OH- H 2 0 2 cleaning, vacancy density of the surface layer is desirably reduced by one digit or more compared to the bulk.
- various conditions can be selected by combining the temperature, the concentration of the oxidizing gas and moisture, the flow rate, the time, and the like, but it is preferable that the oxide film thickness is 0.7 m.
- This 0.7 zm thermal oxide film can be obtained by, for example, wet oxidation at 1000 ° C. for 4 hours. Alternatively, dry oxidation may be used. By forming a 0. 7 / zm or more thermal oxide film, the effect of preventing the surface roughness caused by contact with NH 4 OH- H 2 0 9 solution you further improved.
- the thickness of the surface layer in which the vacancy density is reduced is 80 OA or more.
- the above silicon wafer may be removed by etching after forming an oxide film.However, if a thermal oxide film is left on the silicon wafer, the silicon wafer may be damaged by collision with a case etc. during transportation of the silicon wafer or silicon may be removed. It is also possible to prevent particles such as dust from adhering to the surface.
- FIG. 1 is a graph showing the relationship between NH 4 OH—H 20 cleaning and silicon wafer surface roughness Ra.
- Figure 2 is a graph showing a current (I D) first voltage (V D) characteristic of the n-channel MOS, (a) shows a conventional example, showing the (b) Example. BEST MODE FOR CARRYING OUT THE INVENTION
- FIG. 1 shows the results of measuring the surface roughness Ra after washing with a scanning tunneling microscope. As comparative examples, it was measured surface roughness R a of conventional ⁇ Eha subjected to NH 4 OH-H than zero second cleaning without forming a thermal oxide film in the same manner. Figure 1 also shows the results.
- the conventional wafer without a thermal oxide film had a surface roughness of 15 m before washing, but increased to 0.45 m after washing for 10 minutes. The number of washes increased to 0.65; m after repeated washing.
- the wafer of this example has a surface roughness of 0.2 nm with almost no change in a single cleaning, and maintains a surface state after polishing of 0.35 ⁇ m even after 10 cleanings. Was done.
- the thickness of the surface layer having a reduced vacancy density is 80 OA or more, and does not adversely affect devices formed on the wafer surface. It is also known that this density is less than 1Z10 of the bulk density. This has been confirmed from the measurement results of the wafer of this example and the conventional wafer using the DLTS method (Deep Level Transient Spectroscopy).
- the thermal oxide film formed on the silicon wafer of this example exhibited extremely good characteristics as an insulating film as compared with a conventional silicon wafer. Further, using the silicon wafer of the present example having a thermal oxide film of 0.7 m and the silicon wafer of the conventional example, an n-channel MOS having the following shape was formed. Chinanore length: 10
- Figure 2 shows the current (I D ) -voltage (V D ) characteristics of the fabricated MOS.
- Uetsu gate oxide has a high oxidation rate, S i-S i 0 atomic Sorane ⁇ f to 2 interface is formed with the progress of oxidation, which is a shall Namame empty ⁇ ? Continue to diffuse into the bulk Conceivable. Therefore, vacancies can be efficiently eliminated by using Etsoni. Also, the formation of a thick SiO 2 of 7 can be performed in a short time of 4 hours, and the process can be shortened. However, a similar effect can be obtained by using dry oxidation, and thus the present invention is not necessarily limited to wet oxidation.
- an oxide film of 0.7 ⁇ ⁇ m or more is formed, it has been found that an oxide film of 0.7 m or less is effective enough if the L and the wafer are originally low in vacancy. . Therefore, it is needless to say that an oxide film thinner than 0.7 may be used, but considering the variation in vacancy density of the wafer, etc., a stable result can be obtained by forming an oxide film of 0.7 zm or more. be able to.
- the present invention makes it possible to NH 4 OH- H 2 0 9 cleaning can be suppressed surface roughness due next, a silicon N'weha for high resistance ⁇ Ko having for example, a thin gate oxide film and a capacitor, etc. . It is also possible to prevent the occurrence of scratches due to collision with a case etc. during the transportation of silicon wafers and the attachment of particles such as dust to the silicon surface.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP92914382A EP0592671A1 (en) | 1991-07-02 | 1992-07-02 | Silicon wafer and its cleaning method |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18814891A JPH0513395A (ja) | 1991-07-02 | 1991-07-02 | シリコンウエハ−及び洗浄方法 |
JP3/188148 | 1991-07-02 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1993001615A1 true WO1993001615A1 (en) | 1993-01-21 |
Family
ID=16218592
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP1992/000839 WO1993001615A1 (en) | 1991-07-02 | 1992-07-02 | Silicon wafer and its cleaning method |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0592671A1 (ja) |
JP (1) | JPH0513395A (ja) |
WO (1) | WO1993001615A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111842330A (zh) * | 2020-07-31 | 2020-10-30 | 江苏高照新能源发展有限公司 | 一种单晶硅片清洗装置及工艺 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6348157B1 (en) | 1997-06-13 | 2002-02-19 | Tadahiro Ohmi | Cleaning method |
JP4135780B2 (ja) * | 1997-08-29 | 2008-08-20 | ユーシーティー株式会社 | 薬液定量注入装置および方法 |
IT1316448B1 (it) | 2000-01-19 | 2003-04-22 | Benetton Spa | Dispositivo per l'assorbimento di vibrazioni, particolarmente percalzature od attrezzi sportivi. |
JP5272496B2 (ja) * | 2008-04-25 | 2013-08-28 | 信越半導体株式会社 | シリコンウェーハの酸化膜形成方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58168237A (ja) * | 1982-03-30 | 1983-10-04 | Toshiba Corp | シリコン基板 |
JPS60247928A (ja) * | 1984-05-23 | 1985-12-07 | Seiko Instr & Electronics Ltd | 半導体基板の洗浄方法 |
JPS61294824A (ja) * | 1985-06-21 | 1986-12-25 | Nec Corp | 半導体集積回路の製造装置 |
-
1991
- 1991-07-02 JP JP18814891A patent/JPH0513395A/ja active Pending
-
1992
- 1992-07-02 WO PCT/JP1992/000839 patent/WO1993001615A1/ja not_active Application Discontinuation
- 1992-07-02 EP EP92914382A patent/EP0592671A1/en not_active Withdrawn
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58168237A (ja) * | 1982-03-30 | 1983-10-04 | Toshiba Corp | シリコン基板 |
JPS60247928A (ja) * | 1984-05-23 | 1985-12-07 | Seiko Instr & Electronics Ltd | 半導体基板の洗浄方法 |
JPS61294824A (ja) * | 1985-06-21 | 1986-12-25 | Nec Corp | 半導体集積回路の製造装置 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111842330A (zh) * | 2020-07-31 | 2020-10-30 | 江苏高照新能源发展有限公司 | 一种单晶硅片清洗装置及工艺 |
Also Published As
Publication number | Publication date |
---|---|
EP0592671A1 (en) | 1994-04-20 |
JPH0513395A (ja) | 1993-01-22 |
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