US20180337303A1 - Method for manufacturing high photoelectric conversion efficiency solar cell and high photoelectric conversion efficiency solar cell - Google Patents

Method for manufacturing high photoelectric conversion efficiency solar cell and high photoelectric conversion efficiency solar cell Download PDF

Info

Publication number
US20180337303A1
US20180337303A1 US15/778,022 US201615778022A US2018337303A1 US 20180337303 A1 US20180337303 A1 US 20180337303A1 US 201615778022 A US201615778022 A US 201615778022A US 2018337303 A1 US2018337303 A1 US 2018337303A1
Authority
US
United States
Prior art keywords
solar cell
silicon substrate
semiconductor silicon
temperature
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US15/778,022
Other languages
English (en)
Inventor
Takenori Watabe
Hiroshi Hashigami
Hiroyuki Ohtsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shin Etsu Chemical Co Ltd
Original Assignee
Shin Etsu Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Chemical Co Ltd filed Critical Shin Etsu Chemical Co Ltd
Assigned to SHIN-ETSU CHEMICAL CO., LTD. reassignment SHIN-ETSU CHEMICAL CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HASHIGAMI, HIROSHI, OHTSUKA, HIROYUKI, WATABE, TAKENORI
Publication of US20180337303A1 publication Critical patent/US20180337303A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1864—Annealing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0216—Coatings
    • H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0224—Electrodes
    • H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/05—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells
    • H01L31/0504—Electrical interconnection means between PV cells inside the PV module, e.g. series connection of PV cells specially adapted for series or parallel connection of solar cells in a module
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing a solar cell.
  • FIG. 1 shows an overview of a general high photoelectric conversion efficiency solar cell using a single-crystal N-type silicon substrate seen from a light receiving surface side.
  • FIG. 2 shows a schematic view of a cross-sectional configuration of this solar cell.
  • This solar cell 100 has many electrodes each of which is called a finger electrode 121 and has a width of hundred or tens of micrometers as collecting electrodes on the light receiving surface on an N-type substrate 110 .
  • An interval between the finger electrodes adjacent to each other is generally approximately 1 to 3 mm.
  • it also has two to four bus bar electrodes 122 as collecting electrodes to couple the solar cells.
  • FIG. 3 shows a schematic view of a cross-sectional structure when an N-type substrate is used as this solar cell.
  • a solar cell 300 a light receiving surface of an N-type substrate 310 is covered with an antireflection film 341 .
  • N electrodes (N-type finger electrodes) 335 and a P electrode (a P-type finger electrode) 334 are alternately formed on a back surface of the solar cell 300 .
  • Patent Literature 1 Japanese Unexamined Patent Application Publication No. 2007-95774
  • Non-patent Literature 1 A. A. Istratov et al., Appl. Phys. Lett., Vol. 71, No. 16 (1997) 2349-2351
  • the solar cell having the structure has achieved the high efficiency.
  • the efficiency of the solar cell has been enhanced and, on the other hand, a conversion efficiency degrading phenomenon with time has been revealed. That is, this is a phenomenon that the conversion efficiency is lowered when the solar cell is just left as it stands at a room temperature for several days to several weeks (in the following description of the present invention, this phenomenon will be simply referred to as “degradation”).
  • this phenomenon will be simply referred to as “degradation”.
  • a measure to prevent the solar cell from being degraded must be taken.
  • the low-temperature annealing treatment is performed at such a temperature to the substrate subjected to the electrode baking, it is possible to manufacture the solar cell which suppresses a degradation phenomenon that an output of the solar cell is lowered by just leaving the solar cell as it stands at a room temperature in the atmosphere.
  • the annealing treatment it is preferable to perform the annealing treatment a time of 0.5 minute or more.
  • a temperature drop rate from a maximum temperature to 450° C. to 50° C./second or more.
  • the present invention is particularly effective when the temperature drop rate in the baking step is as large as described above.
  • the maximum temperature in the baking of the electrode precursor is 500° C. or more and 1100° C. or less.
  • the electrode baking can be effectively carried out.
  • a low-temperature curing conductive material which is curable at 100° C. or more and 450° C. or less, can be applied to the main surface of the semiconductor substrate in a pattern shape, and then, at the time of performing the annealing treatment, the low-temperature curing conductive material can be cured at the same time to form a conductor section.
  • an insulating material which is curable at 100° C. or more and 450° C. or less, can be applied to the main surface of the semiconductor silicon substrate in a pattern shape, and then, at the time of performing the annealing treatment, the insulating material can be cured at the same time to form an insulator film.
  • the low-temperature annealing treatment may be performed after applying the insulating material in the pattern shape. This is effective in case of manufacturing the backside electrode solar cell in particular.
  • the semiconductor silicon substrate is preferably an N-type semiconductor silicon substrate.
  • the method for manufacturing a solar cell according to the present invention is more effective to the N type than to the P type.
  • the present invention provides a solar cell including a semiconductor silicon substrate which has an electrode formed by baking an electrode precursor on at least one main surface, has a PN junction, and is less than 100° C., the semiconductor silicon substrate being subjected to an annealing treatment at 100° C. or more and 450° C. or less.
  • the present invention provides the solar cell characterized in that a value A of an initial short-circuit current measured within one day after the annealing treatment and a value B of a short-circuit current measured after storing the solar cell at a room temperature for one week from the measurement of the initial short-circuit current meet a relationship of B/A ⁇ 3.98.
  • the present invention provides a solar cell including a semiconductor silicon substrate having a PN junction, and an electrode formed by baking an electrode precursor on at least one main surface of the semiconductor silicon substrate, the solar cell being characterized in that a value A of an initial short-circuit current measured within one day after completion of the solar cell and a value B of a short-circuit current measured after storing the solar cell at a room temperature for one week from the measurement of the initial short-circuit meet a relationship of B/A ⁇ 0.98.
  • the solar cell according to the present invention is a solar cell which suppresses a degradation phenomenon that an output of the solar cell is lowered by just leaving the solar cell as it stands at a room temperature in the atmosphere.
  • the present invention provides a photovoltaic module having the built-in solar cell.
  • the solar cell according to the present invention can be included in a photovoltaic module in a built-in manner.
  • the present invention provides a photovoltaic power generation system including the photovoltaic module.
  • the photovoltaic module having the built-in solar cell according to the present invention can be used in the photovoltaic power generation system.
  • the present invention provides a solar cell manufacturing apparatus including: a baking furnace in which a semiconductor silicon substrate having an electrode precursor formed on at least one main surface is heated, and then the electrode precursor is baked to form an electrode on the semiconductor silicon substrate by decreasing a temperature to be less than 100° C.; and an annealing furnace in which the semiconductor silicon substrate treated with the use of the baking furnace is annealed at 100° C. or more and 450° C. or less.
  • the solar cell When the solar cell is manufactured by using such a solar cell manufacturing apparatus, it is possible to manufacture the solar cell which suppresses a phenomenon that an output of the solar cell is lowered by just leaving the solar cell as it stands at a room temperature in the atmosphere.
  • the baking furnace is mechanically connected to the annealing furnace, and the semiconductor silicon substrate carried out of the baking furnace can be automatically accommodated in the annealing furnace.
  • the method for manufacturing a solar cell of the present invention it is possible to manufacture the high photoelectric conversion efficiency solar cell which suppresses the degradation phenomenon that an output of the solar cell is lowered when the solar cell is left as it stands at a room temperature in the atmosphere.
  • FIG. 1 is an overview diagram showing a general solar cell to which the present invention can be applied from a light receiving surface side;
  • FIG. 2 is a schematic cross-sectional view of the general solar cell to which the present invention can be applied;
  • FIG. 3 is a schematic cross-sectional view of a general backside contact solar cell to which the present invention can be applied;
  • FIG. 4 is a view showing a correlation between an annealing temperature, and conversion efficiency and a conversion efficiency maintenance factor obtained by Examples 1-1 to 1-6 and Comparative Examples 1-1 and 1-2;
  • FIG. 5 is a graph showing a correlation between an annealing time, and conversion efficiency and a conversion efficiency maintenance factor obtained by Example 2;
  • FIG. 7 is a view showing a correlation between an insulating material annealing temperature, and conversion efficiency and a conversion efficiency maintenance factor obtained by Example 4;
  • FIG. 8 is an overview diagram of a photovoltaic module according to the present invention.
  • FIG. 9 is a schematic view of an inside of a back surface of a photovoltaic module according to the present invention.
  • FIG. 10 is a schematic cross-sectional view of the photovoltaic module according to the present invention.
  • FIG. 11 is a schematic view of a photovoltaic power generation system according to the present invention.
  • FIG. 12 is a view showing an aging degradation phenomenon and recovery by annealing according to the present invention.
  • a semiconductor silicon substrate which has an electrode formed by baking an electrode precursor on at least one main surface, also has a PN junction, and is less than 100° C. is prepared as described below (a step a).
  • This semiconductor silicon substrate can be prepared through the following sub-steps a-1 to a-4.
  • a substrate made of semiconductor silicon is prepared (a sub-step a-1).
  • the PN junction is formed on the substrate made of the semiconductor silicon (a sub-step a-2).
  • the electrode precursor is formed on at least one main surface of the substrate (a sub-step a-3).
  • a silver paste or the like can be used as the electrode precursor.
  • the substrate having the electrode precursor formed thereon is heated, and then a temperature is lowered to be less than 100° C. (at this time, cooling may be effected until the temperature reaches a value substantially equal to an environmental temperature in a surrounding area), thereby baking the electrode to form the electrode on the substrate (a sub-step a-4.
  • This formation of the electrode effected by baking the electrode precursor will be also referred to as an electrode baking step hereinafter.).
  • the method for manufacturing a solar cell according to the present invention can appropriately have any other steps.
  • the method for manufacturing a solar cell according to the present invention has performing an annealing treatment at 100° C. or more and 450° C. or less to the semiconductor silicon substrate prepared at the step a as described above (a step b).
  • a low-temperature annealing step of annealing the substrate at a relatively low temperature is provided after the electrode baking step in this manner, degradation can be recovered, and performing this treatment enables avoiding aging degradation. That is, the method for manufacturing a solar cell according to the present invention can make it possible to manufacture a solar cell with high photoelectric conversion efficiency which suppresses a degradation phenomenon that an output of the solar cell is lowered when the solar cell is left as it stands at a room temperature in the atmosphere.
  • the method for manufacturing a solar cell enables manufacturing the solar cell having a configuration illustrated in FIGS. 1 and 2 , the method can be likewise applied to solar cells having other configurations.
  • a temperature at which the annealing treatment is performed is set to 100° C. or more and 450° C. or less as described above. When the temperature is lower than 100° C., annealing effect does not appear. When the temperature is higher than 450° C., A solar cell main body may have a flaw, e.g., an increase in contact resistance of the electrode.
  • a temperature for this low-temperature annealing treatment a temperature which is 150° C. or more and 400° C. or less is preferable, and a temperature which is 200° C. or more and 300° C. or less is more preferable.
  • the annealing treatment for a time which is 0.5 minute or more.
  • the time of the low-temperature annealing treatment is set to 0.5 minute or more, the degradation phenomenon suppressing effect can be more assuredly provided.
  • Setting the time of the low-temperature annealing treatment to one minute or more is preferable, and setting the same to five minutes or more is more preferable. Further, even when the time of the low-temperature annealing treatment is too long, no quality problem occurs, but setting the time to 180 minutes or less is preferable to suppress a manufacturing cost, and setting the same to 60 minutes or less is more preferable.
  • the low-temperature annealing treatment may be carried out in a plurality of stages. That is, the low-temperature annealing treatment can be once performed at a temperature of 100° C. or more and 450° C. or less, the temperature can be decreased to near a room temperature, and the low-temperature annealing treatment can be again performed at a temperature of 100° C. or more and 450° C. or less. In this case, it is preferable to set a total time of the low-temperature annealing treatment to 0.5 minute or more and 60 minutes or less.
  • a temperature drop rate from a maximum temperature to 450° C. to be 50° C./second or more.
  • a temperature drop rate from a maximum temperature to 450° C. to be 50° C./second or more.
  • the temperature drop rate is high in this manner, original initial characteristics of the solar cell can be enhanced. Further, when the temperature drop rate is higher, the effect of the present invention can be further greatly exerted, and hence it is preferable to set the temperature drop rate to 50° C./second or more as described above.
  • the method for manufacturing a solar cell according to the present invention can avoid the aging degradation after manufacture of the solar cell.
  • the maximum temperature in the baking of the electrode precursor (the sub-step a-4, the baking step) to 500° C. or more and 1100° C. or less.
  • the annealing effect can be readily provided when the maximum temperature is 500° C. or more, and contamination from a baking furnace can be suppressed when the maximum temperature is 1100° C. or less, whereby the annealing effect can be easily provided.
  • it is preferable to set the maximum temperature of the baking to 550° C. or more and 1000° C. or less since a low contact resistance between the electrode and the substrate can be realized.
  • the baking of the electrode can advance when the maximum temperature of the baking is set to 700° C. or more, or a reduction in bulk lifetime does not occur when the same is set to 850° C. or less, and hence the greater solar cell initial characteristics can be provided, which is preferable.
  • FIG. 12 is a view showing aging data of a short-circuit current (I SC ) of the solar cell created through the electrode baking step.
  • I SC short-circuit current
  • Symbols ⁇ , ⁇ , and ⁇ represent changes in short-circuit current with time when the substrates after the passage of 17 days are annealed and a moment immediately after the annealing is determined as 0.
  • the short-circuit current is restored to a value immediately after the baking, and no aging degradation is observed.
  • the above is a specific example of aging degradation, recovery of the degradation due to the low-temperature annealing, and inhibition of the degradation phenomenon.
  • a last high-temperature heat treatment step is an electrode forming step.
  • the electrode forming step is specifically printing and baking a paste containing silver powder or the like, and especially the baking step includes lowering a high temperature close to 800° C. to a room temperature or a close temperature in less than 1 minute.
  • Cu copper
  • Non-patent Literature 1 Cu in silicon bulk forms precipitates in the bulk in several hours order even at a room temperature, and it can be considered that the precipitates lower the characteristics of the solar cell. That is, this is considered to be a factor of a reduction in output with time.
  • Patent Literature 1 it is widely known that Cu in silicon bulk disperses in a substrate surface when a heat treatment at a room temperature to 400° C. is performed more than once. It is considered that, when such a low-temperature annealing treatment is performed, Cu in the bulk moves to and fixed in the substrate surface and turns to be harmless to the solar cell characteristics. That is, this is considered to be a factor which recovers the degradation due to the low-temperature annealing and inhibits the degradation.
  • a mode of Cu in a silicon substrate is not described in detail, and the solar cell has a special step, i.e., the baking of the electrode (the precipitous drop in temperature), and hence it is considered that the degradation phenomenon occurs.
  • the method for manufacturing a solar cell including features of the present invention can suppress the degradation phenomenon which occurs in conventional solar cells at any rate.
  • the low-temperature annealing step can also serve as any other low-temperature heat treatment in the solar cell manufacturing process, and these steps can be performed at the same time.
  • a low-temperature curing conductive material is applied in a pattern shape, and then the low-temperature annealing treatment for suppressing the solar cell degradation can be carried out.
  • This method is effective when a bus bar electrode is made of a low-temperature curing conductive material. More specifically, the following steps can be taken. That is, after the step (the step a) of preparing the semiconductor silicon substrate by performing the electrode baking or the like, a low-temperature curing conductive material which can be cured at 100° C. or more and 450° C.
  • the step b curing of the low-temperature curing conductive material can be simultaneously carried out, thereby forming a conductor section.
  • This conductor section can be constituted as, e.g., a bus bar electrode.
  • the low-temperature annealing treatment for suppression of the solar cell degradation can be carried out after applying the insulating material in the pattern shape.
  • This is effective in manufacture of a backside contact solar cell in particular. More specifically, the following steps can be taken. That is, after preparing the semiconductor silicon substrate by performing the electrode baking or the like (the step a), the insulating material which can be cured at 100° C. or more and 450° C. or less is applied in the pattern shape to the main surface of the substrate. Then, at the time of performing the annealing treatment (the step b), the insulating material can be cured at the same time to form an insulator film.
  • This insulator film can be constituted as, e.g., a film which separates a P electrode and an N electrode of the backside contact solar cell.
  • a constituent material of the module or the string contains solder or a sealing material. When such a material is exposed to high temperatures, its quality is decreased, thus preventing execution of the annealing. Furthermore, an area of an individual unit increases, and hence not only a size of an apparatus enlarges, but also uniformly performing heating (annealing) becomes technically difficult.
  • the substrate is an N-type semiconductor silicon substrate. That is because the present invention exerts a larger effect to the N type than to the P type. Although the details of this reason is unclear, it is known that Cu in the P-type substrate starts moving to a surface at a temperature which is close to a room temperature, and it can be considered that the degradation phenomenon itself is relatively hard to occur as compared with the N-type substrate. However, the present invention can be also uneventfully applied to the P-type substrate.
  • high-purity silicon is doped with a group V element such as phosphorous, arsenic or antimony, and an as-cut single crystal ⁇ 100 ⁇ N-type silicon substrate having a specific resistance of 0.1 to 5 ⁇ cm is prepared.
  • the single-crystal silicon substrate may be fabricated by any method, i.e., a CZ (Czochralski) method or a FZ (floating zone) method.
  • the silicon substrate prepared here does not necessarily have to be made of the single-crystal silicon, and polycrystal silicon may be used.
  • mechanical damage on the substrate surface formed at the time of slicing or cutting is subjected to etching using, e.g., a high-concentration alkali such as a sodium hydroxide aqueous solution or a potassium hydroxide aqueous solution having concentration of 5 to 60% or a mixed acid of a hydrofluoric acid and a nitric acid.
  • a high-concentration alkali such as a sodium hydroxide aqueous solution or a potassium hydroxide aqueous solution having concentration of 5 to 60% or a mixed acid of a hydrofluoric acid and a nitric acid.
  • this mechanical damage removal step is not necessarily required, and it can be omitted.
  • the texture is an effective method to reduce a reflectance of the solar cell.
  • the texture is fabricated by immersion in a heated solution (concentration: 1 to 10%, temperature: 60 to 100° C.) of alkali such as sodium hydroxide, potassium carbonate, sodium carbonate, or sodium hydrogencarbonate for approximately 10 minutes to 30 minutes. A certain amount of 2-propanol is often dissolved in the solution to promote a reaction.
  • cleaning is performed in an acid aqueous solution of, e.g., a hydrochloride acid, a sulfuric acid, a nitric acid, a hydrofluoric acid or a mixture of these members.
  • Hydrogen peroxide can be mixed to improve cleanliness.
  • a P-type diffusion layer is formed on the substrate.
  • the diffusion layer there are a vapor phase diffusion method and a coating diffusion method, and any one of these methods can be used.
  • the vapor phase diffusion method it is possible to adopt a method for overlapping two substrates as a pair and putting them in a heat treatment furnace in this state, leading a mixed gas of BBr 3 and oxygen, and performing a heat treatment at 950 to 1050° C.
  • a carrier gas nitrogen or argon is preferable.
  • the coating diffusion method it is possible to adopt a method for applying a coating agent containing a boron source to one entire main surface of the substrate and performing a heat treatment at 950 to 1050° C.
  • the coating agent it is possible to use an aqueous solution containing 1 to 4% of boric acid as the boron source and 0.1 to 4% of polyvinyl alcohol as a thickener.
  • an N-type diffusion layer is formed.
  • the vapor phase diffusion method and the coating diffusion method for formation of the diffusion layer, there are the vapor phase diffusion method and the coating diffusion method, and any one of these methods can be used.
  • the vapor phase diffusion method it is possible to adopt a method for overlapping two substrates as a pair and putting them in a heat treatment furnace in this state and performing a heat treatment at 850 to 950° C. in a mixed gas atmosphere of phosphorous oxychloride, nitrogen, and oxygen.
  • the coating diffusion method is a method for spin-coating or printing a material containing phosphorous and then carrying out a treatment method, and any method can be used.
  • an antireflection film is formed on a light receiving surface.
  • a silicon nitride film, a silicon oxide film, or the like can be used.
  • a plasma CVD apparatus is used to form the film with a film thickness of approximately 100 nm.
  • a reactant gas monosilane (SiH 4 ) and ammonia (NH 3 ) are often mixed and used, but nitrogen can be likewise used in place of NH 3 .
  • Hydrogen is mixed in the reactant gas in some cases to adjust a process pressure and dilute the reactant gas.
  • the CVD method may be used, but higher cell characteristics can be provided in a film formed by a thermal oxidation method.
  • a protective film which is the silicon nitride film or the silicon oxide film on a back surface like the light receiving surface.
  • a thin aluminum oxide film or thermal oxide film of approximately 1 to 20 nm may be formed on the substrate surface in advance, and the silicon nitride film or the silicon oxide film may be formed.
  • a paste containing Ag powder is formed by a screen printing method.
  • a printing pattern is a comb-tooth shape, and it is easiest to form a finger electrode and a bus bar electrode at the same time. It is preferable for a finger electrode width to be approximately 40 to 200 ⁇ m and for a bus bar electrode width to be approximately 0.5 to 2 mm.
  • the screen printing method is also used for formation of light receiving surface electrodes, and an Ag paste provided by mixing the Ag powder and glass frit with an organic binder is printed.
  • a printing pattern is the comb-tooth shape like the back surface, and it is easiest to form the finger electrode and the bus bar electrode at the same time. It is preferable for a finger electrode width to be approximately 40 to 100 ⁇ m and for a bus bar electrode width to be approximately 0.5 to 2 mm.
  • the Ag powder is penetrated through (fire-through) the silicon nitride film by a heat treatment so that the electrodes can be conducive with silicon.
  • Baking of the electrodes on the back surface and that of the electrodes on the light receiving surface can be performed at a time, or they may be separately performed.
  • the baking is usually carried out by performing a treatment at a temperature of 700 to 850° C. for several seconds to several minutes.
  • a temperature drop rate is also an important factor, and this rate is desirably higher than 50° C./second.
  • the temperature drop rate of the baking step means an average value until 450° C. is reached from a peak temperature in the baking step.
  • the substrate after the electrode baking is heated (annealed) at 100 to 450° C., for 1 to 60 minutes.
  • an annealing method there are indirect resistance heating, direct resistance heating, infrared heating, high-frequency induction heating, and the like.
  • the indirect resistance heating is a system for conducting heat from a heated heating element to an element to be heated to effect heating
  • the direct resistance heating is a system for directly flowing a current to an object to be heated to effect heating
  • the infrared heating is a system for directly applying electrical energy to a heating material in the form of infrared rays to effect heating
  • the high-frequency induction method is a system for converting the electrical energy into high-frequency waves and directly applying them to a heating material to effect heating.
  • a heating apparatus may be a batch type clean oven, a heating furnace, a simple oven with a heating space, or a hot plate whose device surface is heated, and any one of a single-wafer processing walking beam system and a belt conveyer system may be used.
  • cells may be directly overlapped and then treated, or the cells may be accommodated in a container and then treated.
  • the number of cells to be treated is preferably one to 400. When the number of cells to be treated is 400 or less, easy handling can be realized, which is preferable.
  • the number of cells to be treated is determined based on a thermal capacity of each cell and a capability of a heat source, a preferred number is generally 1000 or less.
  • the present invention also provides a solar cell manufacturing apparatus which is suitable for manufacture of the solar cell.
  • This solar cell manufacturing apparatus includes a baking furnace in which an electrode precursor is baked to form an electrode on a semiconductor silicon substrate by decreasing a temperature to be less than 100° C. after heating a semiconductor silicon substrate having the electrode precursor formed on at least one main surface. Further, it also includes an annealing furnace in which the semiconductor silicon substrate treated in the baking furnace is annealed at 100° C. or more and 450° C. or less.
  • the baking furnace may be mechanically connected to the annealing furnace to automatically move the substrate. That is, in the solar cell manufacturing apparatus, the baking furnace can be mechanically connected to the annealing furnace so that the semiconductor silicon substrate carried out from the baking furnace can be automatically accommodated in the annealing furnace.
  • the baking furnace adopting the walking beam system or the belt conveyer system and the annealing furnace likewise adopting the walking beam system or the belt conveyer system can be used by synchronizing substrate carrying operations.
  • the baked substrate can be temporarily accommodated in a heat-resisting container, or the substrates can be directly overlapped and accommodated in a batch type furnace.
  • a substrate temperature must be set to be less than 100° C.
  • the finger electrode and the bus bar electrode can be separately formed. Since a contact resistance between the bus bar electrode and the substrate does not have to be lowered, a low-temperature curing conductive paste can be used as a material of the bus bar electrode. Specifically, it is possible to use one or more conductive materials selected from Ag, Cu, Au, Al, Zn, In, Sn, Bi, and Pb and a material containing one or more resins selected from an epoxy resin, an acrylic resin, a polyester resin, a phenol resin, and silicone resin.
  • the Ag paste is applied by printing, a dispenser, or the like to form (bake) the finger electrode having the parallel line shape by the fire-through method, and then a bus bar electrode precursor is applied and dried with the use of the paste by printing, the dispenser, or the like so as to be orthogonal to the finger electrode.
  • a substrate temperature at the time of forming the bus bar electrode precursor must be set to be less than 100° C. When this electrode precursor is heated at 100° C. or more and 450° C. or less, not only the bus bar electrode can be formed, but also an effect to avoid degradation can be provided.
  • the processing method in this case may be the batch type
  • the single-wafer processing system e.g., the walking beam system or the belt conveyer system
  • the processing can be smoothed.
  • a temperature of the low-temperature annealing can be further optimized at 100° C. or more and 450° C. or less which is a temperature range enabling suppression of the solar cell degradation in accordance with, e.g., a type of the low-temperature curing conductive material.
  • a P-type diffusion layer is formed on an entire substrate back surface of a substrate subject to the texture formation as described above.
  • the substrate is thermally oxidized, or a silicon nitride film or a silicon oxide film is formed on both surfaces of the substrate. These films function as a diffusion mask at the time of subsequent phosphorous diffusion.
  • the mask formed on the back surface is opened in a pattern shape.
  • a parallel line shape having substantially equal intervals is simplest.
  • the opening may be physically performed by using a laser, a dicer, or the like, or it may be chemically performed by taking advantage of an etching paste, a photoresist, or the like.
  • immersion into a KOH or NaOH aqueous solution is carried out to etch a P + layer in the opening portion.
  • phosphorous diffusion is carried out by the method to form an N + layer in the opening portion alone. This is immersed into HF or the like to remove the mask and glass formed at the time of diffusion.
  • the substrate is cleaned, and both the surfaces are passivated by using an aluminum oxide film, a silicon nitride film, or the like.
  • An electrode paste is printed on both the P and N diffusion layers.
  • a pattern at this time may be parallel to the pattern of each diffusion layer. That is, it is easiest to adopt a parallel line shape in which the respective P and N electrodes are alternately arranged.
  • This substrate is baked and subjected to fire-through. Conditions are the same as those described above.
  • bus bar electrodes are formed. Since a P bus bar electrode must be electrically connected to a P finger electrode alone and an N bus bar electrode must be electrically connected to an N finger electrode alone, an insulating material is printed in a pattern shape before forming the bus bar electrodes. That is, the insulating material is printed at least at each intersecting portion of the P bus bar electrode and the N finger electrode and each intersecting portion of the N bus bar electrode and the P finger electrode.
  • a material containing one or more resins selected from a silicone resin, a polyimide resin, a polyamide-imide resin, a fluorine resin, a phenol resin, a melamine resin, an urea resin, polyurethane, an epoxy resin, an acrylic resin, a polyester resin, and a poval resin is preferable.
  • a substrate temperature at the time of applying the insulating material must be set to be less than 100° C. After the pattern formation, the substrate is heated (low-temperature annealing) at 100 to 450° C. Consequently, not only an insulator layer is formed, but an effect to avoid degradation can be also provided.
  • a low-temperature annealing time may be set to 0.5 to 60 minutes, but it may be adjusted depending on a type of the insulator material or the like.
  • the low-temperature annealing time may be set to one minute or more and 100 minutes or less.
  • the low-temperature annealing temperature can be further optimized at 100° C. or more and 450° C. or less which is a temperature range that enables suppressing the solar cell degradation depending on, e.g., a type of the insulator material.
  • each bus bar electrode is formed by using, e.g., the material, a high photoelectric conversion efficiency backside contact solar cell which suppresses degradation can be fabricated.
  • the P-type substrate can be embodied by just countercharging the P type and the N type in the above description.
  • the solar cell manufactured by the method is the solar cell which is provided by performing the anneal treatment at 100° C. or more and 450° C. or less to the semiconductor silicon substrate which has the electrode formed by baking the electrode precursor on at least one main surface, has the PN junction, and is less than 100° C.
  • Such a solar cell according to the present invention is the solar cell which suppresses the degradation phenomenon that an output of the solar cell is lowered when the solar cell is left as it stands at a room temperature in the atmosphere.
  • the solar cell according to the present invention can be a solar cell in which a value A of an initial short-circuit current measured within one day from the annealing treatment and a value B of a short-circuit current measured after storing the solar cell at a room temperature for one week from the measurement of the initial short-circuit current meet a relationship of B/A ⁇ 0.98 (see FIG. 12 ).
  • the solar cell according to the present invention can have the following configuration and characteristics. That is, this solar cell includes the semiconductor silicon substrate having the PN junction. Furthermore, it also has an electrode formed by baking the electrode precursor on at least one main surface of the semiconductor silicon substrate. Moreover, the value A of the initial short-circuit current measured within one day after completion of this solar cell and the value B of the short-circuit current measured after storing the solar cell at the room temperature for one week from the measurement of the initial short-circuit current meet the relationship of B/A ⁇ 0.98.
  • Such a solar cell according to the present invention is the solar cell which suppresses the degradation phenomenon that an output of the solar cell is lowered when the solar cell is left as it stands at a room temperature in the atmosphere.
  • FIG. 9 shows an overview of the string.
  • FIG. 9 corresponds to a schematic view of a back surface side in the module which cannot be usually seen. Further, a finger electrode or a bus bar electrode is not shown.
  • a P bus bar (a bus bar electrode connected to the finger electrode joined to a P-type layer of a substrate) and an N bus bar (a bus bar electrode connected to the finger electrode joined to an N-type layer of the substrate) of the adjoining solar cells 400 are connected to each other through a tab lead wire 461 or the like.
  • FIG. 10 shows a schematic cross-sectional view of the photovoltaic module 460 .
  • the string is constituted by connecting the plurality of solar cells 400 to the lead wires 461 through bus bar electrodes 422 .
  • the string is usually sealed in by using a filler 472 having translucency such as EVA (ethylene vinyl acetate), and a non-light receiving surface side is covered with a weatherable resin film 473 such as PET (polyethylene terephthalate), and a light receiving surface is covered with a light receiving surface protective material 471 having translucency and high mechanical strength such as soda-lime glass.
  • EVA ethylene vinyl acetate
  • PET polyethylene terephthalate
  • a light receiving surface protective material 471 having translucency and high mechanical strength such as soda-lime glass.
  • the filler 472 besides the EVA, polyolefin, silicone, or the like can be used.
  • FIG. 11 shows a basic structure of the photovoltaic power generation system having the modules according to the present invention coupled with each other.
  • a plurality of photovoltaic modules 16 are coupled in series through wirings 15 , and generated electric power is supplied to an external load circuit 18 through an inverter 17 .
  • the system may further include a secondary cell which stores the generated electric power.
  • a phosphorous-doped ⁇ 100 ⁇ N-type as-cut silicon substrate having a horizontal and vertical size of 156 ⁇ 156 mm, a thickness of 200 ⁇ m, and a specific resistance of 1 ⁇ cm was prepared. Then, a damage layer of the silicon substrate was removed by using a heated potassium hydroxide solution. Subsequently, the substrate was immersed into an aqueous solution containing potassium hydroxide and 2-propanol to form a texture on a substrate surface. Then, the substrate was immersed in an aqueous solution of a 1% hydrochloric acid and 1% hydrogen peroxide maintained at 80° C. for five minutes, then rinsed with pure water for five minutes, and thereafter dried in a clean oven.
  • a P-type diffusion layer was formed on the substrate.
  • the two substrates were overlapped as a pair and put into a heat treatment furnace in this state, a mixed gas of BBr 3 , oxygen and argon was introduced, and a heat treatment was carried out at 1000° C. for 10 minutes.
  • N-type diffusion layer was formed.
  • the two substrates were overlapped as a pair and put into the heat treatment furnace in this state, and a heat treatment was carried out in a mixed gas atmosphere of phosphorous oxychloride, nitrogen, and oxygen at 900° C. for 40 minutes.
  • glass on the surface was removed by using a 25% hydrofluoric acid, and cleaning was performed in an aqueous solution of the 1% hydrochloric acid and the 1% hydrogen peroxide.
  • silicon substrates were treated in an oxygen atmosphere at 900° C. for 40 minutes to be thermally oxidized, and a thermal oxide film of 20 nm was formed on both surfaces of each substrate.
  • an antireflection film or a passivation film which is a silicon nitride film was formed on the thermal oxide film on each of both the surfaces.
  • a plasma CVD method was used, and a mixed gas of monosilane and ammonia was used as a reactant gas.
  • a film thickness of a light receiving surface was set to 80 nm, and a refractive index of the same was set to 2.0.
  • a film thickness of a non-light receiving surfaces was set to 80 mm, and a refractive index of the same was set to 2.2.
  • a silver paste was screen-printed on the entire non-light receiving surface in a comb-tooth-shaped pattern, and dried. Thereafter, the silver paste was screen-printed on the light receiving surface in the comb-tooth-shaped pattern, and dried.
  • the silver paste has silver powder dispersed in an organic solvent.
  • a heat treatment was performed at 840° C. in an air atmosphere for approximately 10 seconds, and silver was sintered. At this sintering step, a temperature was decreased from 840° C. to 450° C. at a temperature drop rate of 50° C./second or more, and it was further lowered to a room temperature (an environmental temperature).
  • Each substrate was left at rest in a belt furnace and annealed for 20 minutes under respective conditions, e.g., 25° C. (Comparative Example 1-1), 100° C. (Example 1-1), 200° C. (Example 1-2), 250° C. (Example 1-3), 300° C. (Example 1-4), 400° C. (Example 1-5), 450° C. (Example 1-6), and 500° C. (Comparative Example 1-2).
  • the above-described substrates were left at rest in the belt furnace and annealed at 200° C. for 10 seconds, 30 seconds, one minute, 10 minutes, 40 minutes, and 60 minutes.
  • Bus bar electrodes were formed by using a low-temperature curing silver paste separately from finger electrodes. Specifically, fabrication was performed in the same manner as Examples 1-1 to 1-6 and Comparative Examples 1-1 and 1-2 until an antireflection film/passivation film was formed on both front and back surfaces, and then the finger electrodes having a parallel line shape pattern were screen-printed on the front and back surfaces and dried.
  • the substrates were heat-treated in an air atmosphere at 840° C. for approximately 10 seconds, and silver was sintered. At this sintering step, the temperature was decreased from 840° C. to 450° C. at a temperature drop rate of 50° C./second or more, and it was further lowered to a room temperature (an environmental temperature).
  • bus bar electrodes As the bus bar electrodes, three lines of an epoxy-based silver paste were printed on the front and back surfaces and dried, and the substrates were left at rest in the belt furnace and annealed at 200° C. for one minute, five minutes, 10 minutes, 30 minutes, and 60 minutes.
  • a backside contact solar cell was fabricated by using the present invention. Fabrication was carried out until boron diffusion in the same manner as Example 1, and thermal oxidation was performed at 1000° C. for three hours to form a thermal oxide film on both surfaces. Thermal oxide film was opened in a parallel line shape having intervals of 1.4 mm by using an etching paste, and immersed into a 25% KOH aqueous solution of 70° C. for six minutes to etch a P + layer in each opening portion. Further, phosphorous-diffused/passivation film was formed by the same method as Example 1. Finger electrodes having a parallel line shape pattern having intervals of 0.7 mm were solely screen-printed on a non-light receiving surface along an N+ region, and then dried.
  • the obtained product was heat-treated in an air atmosphere at 840° C. for approximately 10 seconds to sinter silver.
  • the temperature was decreased from 840° C. to 450° C. at a temperature drop rate of 50° C./second or more, and it was further lowered to a room temperature (an environmental temperature).
  • An insulating material intended to insulate from the opposed bus bar electrodes was screen-printed at three positions per finger electrode, eventually to all the finger electrodes in a pattern shape, and dried.
  • silicone manufactured by Shin-Etsu Chemical Co., Ltd. was used.
  • the substrates were left at rest in the belt furnace and annealed for five minutes under respective conditions of, 100, 150, 200, 250, 300, and 350° C.
  • bus bar electrodes six lines of the epoxy-based silver paste were printed to be orthogonal to the already provided finger electrodes and dried, and the substrates were left at rest in the belt furnace and annealed at 200° C. for 30 minutes.
  • FIG. 4 summarizes results of Examples 1-1 to 1-6 and Comparative examples 1-1 and 1-2.
  • a decrease in initial conversion efficiency can be observed at 500° C. It can be considered that, when an annealing temperature is too high, a flaw is produced in an electrode contact.
  • a decrease in maintenance factor can be observed at 25° C. alone. That is because a degradation phenomenon has occurred. To avoid the degradation, the annealing temperature of 100° C. or more is required.
  • FIG. 5 summarizes results of Example 2. Initial characteristics are the same under any conditions. A slight decrease in maintenance factor can be seen in case of 10 seconds alone. That is because the degradation phenomenon has occurred. To avoid the degradation, an annealing time of 30 seconds or more is preferable.
  • FIG. 6 summarizes results of Example 3. Initial characteristics are low in case of one minute. As a reason for this, insufficient curing of the bus bar electrode material can be considered. The maintenance factor remains the same, and no degradation can be observed. Thus, the effect of preventing the degradation due to the low-temperature annealing treatment according to the present invention can be provided.
  • FIG. 7 summarizes results of Example 4.
  • Initial characteristics are low at 100° C. and 350° C.
  • insufficient curing of the insulating material can be considered as a cause.
  • a progression of oxidation (burning) of the insulating material can be considered as a cause.
  • the maintenance factor remains the same, and no degradation is observed.
  • the effect of preventing the degradation due to the low-temperature annealing treatment according to the present invention can be provided.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Sustainable Development (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Photovoltaic Devices (AREA)
US15/778,022 2016-10-05 2016-10-05 Method for manufacturing high photoelectric conversion efficiency solar cell and high photoelectric conversion efficiency solar cell Abandoned US20180337303A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2016/004492 WO2018066016A1 (ja) 2016-10-05 2016-10-05 高光電変換効率太陽電池の製造方法及び高光電変換効率太陽電池

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2016/004492 A-371-Of-International WO2018066016A1 (ja) 2016-10-05 2016-10-05 高光電変換効率太陽電池の製造方法及び高光電変換効率太陽電池

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US16/829,322 Division US11538957B2 (en) 2016-10-05 2020-03-25 Methods for manufacturing high photoelectric conversion efficiency solar cell

Publications (1)

Publication Number Publication Date
US20180337303A1 true US20180337303A1 (en) 2018-11-22

Family

ID=61282765

Family Applications (2)

Application Number Title Priority Date Filing Date
US15/778,022 Abandoned US20180337303A1 (en) 2016-10-05 2016-10-05 Method for manufacturing high photoelectric conversion efficiency solar cell and high photoelectric conversion efficiency solar cell
US16/829,322 Active 2037-04-12 US11538957B2 (en) 2016-10-05 2020-03-25 Methods for manufacturing high photoelectric conversion efficiency solar cell

Family Applications After (1)

Application Number Title Priority Date Filing Date
US16/829,322 Active 2037-04-12 US11538957B2 (en) 2016-10-05 2020-03-25 Methods for manufacturing high photoelectric conversion efficiency solar cell

Country Status (7)

Country Link
US (2) US20180337303A1 (de)
EP (1) EP3333901B1 (de)
JP (1) JP6285612B1 (de)
KR (1) KR102599917B1 (de)
CN (1) CN109844960B (de)
TW (1) TWI631717B (de)
WO (1) WO2018066016A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10236397B2 (en) 2016-11-07 2019-03-19 Shin-Etsu Chemical Co., Ltd. Method for producing high-efficiency solar cell

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050189015A1 (en) * 2003-10-30 2005-09-01 Ajeet Rohatgi Silicon solar cells and methods of fabrication
US7714224B2 (en) 2004-09-03 2010-05-11 Shin - Etsu Chemical Co., Ltd. Photovoltaic power generation module and photovoltaic power generation system employing same
DE102005005808A1 (de) * 2005-02-09 2006-08-10 Centrotherm Elektrische Anlagen Gmbh & Co. Kg Verfahren und Vorrichtung zur Herstellung von Siliziumsolarzellen
JP4481869B2 (ja) * 2005-04-26 2010-06-16 信越半導体株式会社 太陽電池の製造方法及び太陽電池並びに半導体装置の製造方法
JP2007095774A (ja) 2005-09-27 2007-04-12 Toshiba Ceramics Co Ltd 遷移金属不純物の洗浄除去方法
JP2007173528A (ja) * 2005-12-22 2007-07-05 Kyocera Corp 結晶半導体粒子の製造方法および光電変換装置ならびに光発電装置
JP5376752B2 (ja) * 2006-04-21 2013-12-25 信越半導体株式会社 太陽電池の製造方法及び太陽電池
JP4933179B2 (ja) * 2006-07-14 2012-05-16 信越化学工業株式会社 硬化性シリコーンゴム組成物及びその硬化物
FR2906403B1 (fr) * 2006-09-21 2008-12-19 Commissariat Energie Atomique Procede de recuit de cellules photovoltaiques
JP2011066044A (ja) * 2009-09-15 2011-03-31 Mitsubishi Electric Corp 太陽電池素子の製造方法
JP5559509B2 (ja) * 2009-10-28 2014-07-23 昭栄化学工業株式会社 太陽電池電極形成用導電性ペースト
CN102117844A (zh) * 2009-12-30 2011-07-06 比亚迪股份有限公司 太阳电池正面电极浆料及太阳电池正面电极的制备方法
TWI559372B (zh) * 2010-04-06 2016-11-21 薄膜電子Ａｓａ公司 磊晶結構、其形成方法及含此結構之元件
MY162449A (en) * 2011-02-04 2017-06-15 Sumitomo Metal Mining Co Oxide sintered body and tablets obtained by processing same
JP2012209413A (ja) * 2011-03-29 2012-10-25 Tdk Corp 太陽電池用金属プリカーサー形成材、太陽電池用金属プリカーサーの製造方法およびｉｂ−ｉｉｉａ−ｖｉａ族系化合物太陽電池の製造方法
CN102315332B (zh) * 2011-09-29 2013-08-07 英利能源（中国）有限公司 太阳能电池片热处理工艺
US20140242747A1 (en) * 2011-10-04 2014-08-28 Applied Nanotech Holdings, Inc. Thin Film Deposition of Materials by External Induced Release from a Ribbon Tape
KR101363344B1 (ko) * 2012-01-10 2014-02-19 주식회사 젠스엔지니어링 전도성 페이스트를 전극으로 사용하는 실리콘 태양전지 모듈 및 그 제조 방법.
US8735210B2 (en) 2012-06-28 2014-05-27 International Business Machines Corporation High efficiency solar cells fabricated by inexpensive PECVD
RU2636405C2 (ru) * 2012-10-04 2017-11-23 Син-Эцу Кемикал Ко., Лтд. Способ изготовления солнечного элемента
JP6030587B2 (ja) * 2014-01-31 2016-11-24 信越化学工業株式会社 太陽電池セルの製造方法
JP6220063B2 (ja) * 2014-06-11 2017-10-25 信越化学工業株式会社 太陽電池及び太陽電池の製造方法
CN104362216B (zh) * 2014-10-23 2017-02-15 云南大学 一种晶体硅太阳能电池前栅线电极的制备方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10236397B2 (en) 2016-11-07 2019-03-19 Shin-Etsu Chemical Co., Ltd. Method for producing high-efficiency solar cell

Also Published As

Publication number Publication date
EP3333901A4 (de) 2019-02-27
JPWO2018066016A1 (ja) 2018-10-04
JP6285612B1 (ja) 2018-02-28
CN109844960B (zh) 2022-11-29
EP3333901B1 (de) 2020-12-30
TW201814917A (zh) 2018-04-16
KR102599917B1 (ko) 2023-11-09
US11538957B2 (en) 2022-12-27
EP3333901A1 (de) 2018-06-13
US20200227584A1 (en) 2020-07-16
CN109844960A (zh) 2019-06-04
TWI631717B (zh) 2018-08-01
WO2018066016A1 (ja) 2018-04-12
KR20190055818A (ko) 2019-05-23

Similar Documents

Publication Publication Date Title
US11038070B2 (en) High photoelectric conversion efficiency solar cell and method for manufacturing high photoelectric conversion efficiency solar cell
KR102646477B1 (ko) 고광전변환효율 태양전지 및 고광전변환효율 태양전지의 제조 방법
US11538957B2 (en) Methods for manufacturing high photoelectric conversion efficiency solar cell
KR102581702B1 (ko) 고광전변환효율 태양전지 및 고광전변환효율 태양전지의 제조방법
US11222991B2 (en) Solar cell and method for manufacturing the same
EP3355361B1 (de) Solarzelle mit hoher fotoelektrischer umwandlungseffizienz und verfahren zur herstellung einer solarzelle mit hoher fotoelektrischer umwandlungseffizienz
EP3336905B1 (de) Solarzelle mit hoher photoelektrischer umwandlungseffizienz und verfahren zur herstellung einer solarzelle mit hoher photoelektrischer umwandlungseffizienz
JP6564081B2 (ja) 高光電変換効率太陽電池及び高光電変換効率太陽電池の製造方法

Legal Events

Date Code Title Description
AS Assignment

Owner name: SHIN-ETSU CHEMICAL CO., LTD., JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WATABE, TAKENORI;HASHIGAMI, HIROSHI;OHTSUKA, HIROYUKI;REEL/FRAME:045872/0151

Effective date: 20180330

STPP Information on status: patent application and granting procedure in general

Free format text: DOCKETED NEW CASE - READY FOR EXAMINATION

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STPP Information on status: patent application and granting procedure in general

Free format text: RESPONSE TO NON-FINAL OFFICE ACTION ENTERED AND FORWARDED TO EXAMINER

STPP Information on status: patent application and granting procedure in general

Free format text: NON FINAL ACTION MAILED

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION