US20130270227A1 - Layer-layer etch of non volatile materials - Google Patents

Layer-layer etch of non volatile materials Download PDF

Info

Publication number
US20130270227A1
US20130270227A1 US13/446,778 US201213446778A US2013270227A1 US 20130270227 A1 US20130270227 A1 US 20130270227A1 US 201213446778 A US201213446778 A US 201213446778A US 2013270227 A1 US2013270227 A1 US 2013270227A1
Authority
US
United States
Prior art keywords
precursor
metal complex
recited
gas
metal layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13/446,778
Other languages
English (en)
Inventor
Joydeep Guha
Jeffrey Marks
Butsurin JINNAI
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lam Research Corp
Original Assignee
Lam Research Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Research Corp filed Critical Lam Research Corp
Priority to US13/446,778 priority Critical patent/US20130270227A1/en
Assigned to LAM RESEARCH CORPORATION reassignment LAM RESEARCH CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MARKS, JEFFREY, GUHA, Joydeep, JINNAI, BUTSURIN
Priority to PCT/US2013/034971 priority patent/WO2013154867A1/en
Priority to KR1020147031791A priority patent/KR20140147133A/ko
Priority to SG10201608573XA priority patent/SG10201608573XA/en
Priority to SG11201406233VA priority patent/SG11201406233VA/en
Priority to TW102112558A priority patent/TW201411725A/zh
Publication of US20130270227A1 publication Critical patent/US20130270227A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/10—Etching compositions
    • C23F1/12—Gaseous compositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011—Manufacture or treatment of multistable switching devices
    • H10N70/061—Shaping switching materials
    • H10N70/063—Shaping switching materials by etching of pre-deposited switching material layers, e.g. lithography
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only

Definitions

  • the present invention relates to etching a layer of non volatile materials through a mask during the production of a semiconductor device. More specifically, the present invention relates to etching a metal containing layer.
  • features may be etched through a metal containing layer.
  • MRAM magnetoresistive random-access memory
  • RRAM resistive random-access memory
  • a method for etching a metal layer dispose below a mask is provided.
  • the metal layer is placed in an etch chamber.
  • a precursor gas is flowed into the etch chamber.
  • the precursor gas is adsorbed into the metal layer to form a precursor metal complex.
  • the precursor metal complex is heated to a temperature above a vaporization temperature of the precursor metal complex, while the metal layer is exposed to the precursor gas.
  • the vaporized precursor metal complex is exhausted from the etch chamber.
  • an apparatus for etching a metal layer on a substrate is provided.
  • a chamber is provided.
  • a substrate support is provided within the chamber.
  • a gas source is provided to flow a precursor gas into the chamber.
  • An exhaust system is provided for removing gas from the chamber.
  • a heat source is provided for heating the metal layer, wherein the heat source heats the metal layer more than the substrate.
  • FIG. 1 is a high level flow chart of an embodiment of the invention.
  • FIGS. 2A-D are schematic views of a stack processed according to an embodiment of the invention.
  • FIG. 3 is a schematic view of an etch reactor that may be used for etching.
  • FIG. 4 illustrates a computer system, which is suitable for implementing a controller used in embodiments of the present invention.
  • FIG. 5 is schematic view of a stack with a plurality of metal layers to be sequentially etched.
  • FIG. 1 is a high level flow chart of a process used in an embodiment of the invention.
  • a substrate with a metal layer is placed in a chamber (step 104 ).
  • a precursor gas is flowed into the chamber (step 108 ).
  • the precursor gas is adsorbed into the metal layer, forming a precursor metal complex (step 112 ).
  • the precursor metal complex is heated causing the precursor metal complex to be vaporized (step 116 ).
  • the vaporized precursor metal complex is exhausted from the chamber (step 120 ).
  • the substrate and remaining metal layer are removed from the chamber (step 124 ).
  • FIG. 2A is a cross-sectional view of a stack 200 with a substrate 204 over which a metal layer 208 has been formed.
  • a patterned thermal hardmask layer 212 is placed over the metal layer 208 .
  • an intermediate layer 216 is placed between the substrate 204 and the metal layer 208 .
  • One or more layers may be placed between the substrate 204 and the metal layer 208 .
  • one or more layers may be placed between the patterned thermal hardmask layer 212 and the metal layer 208 .
  • the patterned thermal hardmask layer 212 has features 236 , 240 with different aspect ratios.
  • a patterned photoresist mask may be placed above the patterned thermal hardmask layer 212 .
  • the substrate 204 is a silicon wafer
  • the metal layer 208 is iron (Fe). Additional metal layers may be used to form magnetoresistive random-access memory (MRAM) or a resistive random-access memory (RRAM) device.
  • the intermediate layer 216 may be one or more additional layers used to form MRAM or RRAM devices.
  • the patterned thermal hardmask layer 212 may be a conventional hardmask material such as SiN or may be another material.
  • the patterned thermal hardmask layer 212 must be resistant to ashing or melting at temperatures at which a precursor metal complex would vaporize. Because of this, the patterned thermal hardmask layer 212 would not be formed from a photoresist material, which melts at a temperature below 300° C.
  • FIG. 3 is a schematic view of an etch reactor that may be used in practicing the invention.
  • an etch reactor 300 comprises a gas distribution plate 306 providing a gas inlet and a chuck 308 , within an etch chamber 349 , enclosed by a chamber wall 350 .
  • the substrate 204 is positioned on top of the chuck 308 .
  • the chuck 308 may provide a bias from the ESC source 348 as an electrostatic chuck (ESC) for holding the substrate 204 or may use another chucking force to hold the substrate 204 .
  • a heat source 310 such as heat lamps, is provided to heat the metal layer.
  • a precursor gas source 324 is connected to the etch chamber 349 through the distribution plate 306 .
  • FIG. 4 is a high level block diagram showing a computer system 400 , which is suitable for implementing a controller 335 used in embodiments of the present invention.
  • the computer system may have many physical forms ranging from an integrated circuit, a printed circuit board, and a small handheld device up to a huge super computer.
  • the computer system 400 includes one or more processors 402 , and further can include an electronic display device 404 (for displaying graphics, text, and other data), a main memory 406 (e.g., random access memory (RAM)), storage device 408 (e.g., hard disk drive), removable storage device 410 (e.g., optical disk drive), user interface devices 412 (e.g., keyboards, touch screens, keypads, mice or other pointing devices, etc.), and a communication interface 414 (e.g., wireless network interface).
  • the communication interface 414 allows software and data to be transferred between the computer system 400 and external devices via a link.
  • the system may also include a communications infrastructure 416 (e.g., a communications bus, cross-over bar, or network) to which the aforementioned devices/modules are connected.
  • a communications infrastructure 416 e.g., a communications bus, cross-over bar, or network
  • Information transferred via communications interface 414 may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface 414 , via a communication link that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels.
  • the one or more processors 402 might receive information from a network, or might output information to the network in the course of performing the above-described method steps.
  • method embodiments of the present invention may execute solely upon the processors or may execute over a network such as the Internet in conjunction with remote processors that shares a portion of the processing.
  • non-transient computer readable medium is used generally to refer to media such as main memory, secondary memory, removable storage, and storage devices, such as hard disks, flash memory, disk drive memory, CD-ROM and other forms of persistent memory and shall not be construed to cover transitory subject matter, such as carrier waves or signals.
  • Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter.
  • Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.
  • a precursor gas source 324 supplies the precursor gas into interior region 340 of the etch chamber 349 during the etch processes.
  • the precursor gas is chlorine (Cl 2 ).
  • the precursor gas is adsorbed into the metal layer to form precursor metal complex.
  • iron adsorbs chlorine to form Anhydrous iron(III) chloride in the reaction:
  • FIG. 2B is a cross sectional view of the stack 200 after chlorine has been absorbed by iron in the metal layer 208 to form a precursor metal complex 220 .
  • Arrows 224 indicate that Cl 2 flows to the metal layer 208 to be adsorbed by the metal layer 208 .
  • the precursor metal complex 220 is heated, which causes the precursor metal complex 220 to vaporize (step 116 ).
  • the heat source 310 heats the precursor metal complex to a temperature equal to or greater than the boiling or vaporization point of the precursor metal complex. For FeCl 3 this is about 315° C.
  • the heat lamps of the heat source 310 heat the precursor metal complex to a temperature of about 400° C. More specifically, in this example, the heat lamps heat the top surface of the precursor metal complex more than the remaining metal layer or substrate.
  • the patterned thermal hardmask layer 212 is preferably of a material that does not melt at 400° C.
  • the vaporized precursor metal complex is exhausted from the etch chamber 349 (step 120 ).
  • the exhaust pump 320 may be used to exhaust the vaporized precursor metal complex.
  • flowing the precursor gas (step 108 ), adsorbing the precursor gas (step 112 ), vaporizing the precursor metal complex (step 116 ), and removing the vaporized precursor metal complex (step 120 ) are preformed simultaneously until the etch is completed.
  • FIG. 2C is a cross-sectional view of the stack 200 during the etching process after features 244 , 248 in the metal layer 208 have been partially etched.
  • FIG. 2D is a cross-sectional view of the stack 200 after the etching process is completed.
  • the flow of the precursor gas and heat from the heat source 310 are stopped.
  • the substrate 204 and etched metal layer 208 are removed from the etch chamber 349 (step 124 ).
  • a plasma is not formed or provided to the etch chamber 349 . Instead, an un-ionized gas is used for the etching process. Because of this, in this example, the patterned thermal hardmask layer 212 is not etched by the precursor gas. In addition, since plasma in not used, a low pressure and some other plasma parameters are not needed, providing a simpler and faster etching process.
  • plasma etching processes for etching metal layers rely on sputtering by energetic ions that form non-volatile byproducts. These non-volatile byproducts deposit on the chamber walls or other parts of the wafer, which may provide contamination. Even if in plasma processing a chemistry is found for etching a metal layer to form volatile metal products, the plasma may breakdown the volatile metal products to non-volatile daughter products, which may deposit on and contaminate the chamber or wafer.
  • This embodiment of the invention provides volatile byproducts in etching a metal layer and in addition does not use a plasma, which prevents the breakdown of volatile byproducts to non-volatile daughter products.
  • This embodiment of the invention also provides layer by layer control of material etch.
  • the bombarding ions may have sufficient energy to etch all layers, so that there is no discrimination between different layers. Because this embodiment of the invention does not use bombardment, but chemistry and vaporization temperatures of resulting complexes to etch one layer may be a complete etch stop for another layer. This is more useful in etching very thin films of the order of less than 10 ⁇ , which are typically found in MRAM and RRAM devices and similar technology stacks.
  • the etching is continuous and is faster than a process that provides steps sequentially, which would provide an intermittent etch process.
  • heat lamps to provide heat directly to the top surface of the metal layer provides maximum heat to the precursor metal complex, while minimizing heat to other parts of the stack. Such heating provides additional control of the heating process. Pulsing the heat lamps uses frequency, duty cycle, and other pulse parameters to provide additional control. In other embodiments, the heat lamps may be placed outside of the chamber providing heat through a window. In another embodiment, the heat is collimated to provide a more directional etch. Preferably, the heat source preferentially heats the etch layer with respect to the substrate. More preferably, the heat source preferentially heats the exposed surfaces of the etch layer with respect to the remaining etch layer.
  • the precursor gas would be a gas that provides a component that would be adsorbed by the metal layer to be etched to form a precursor metal complex with a sufficiently low vaporization temperature to be vaporized without melting the thermal hardmask or other layers.
  • the precursor gas has a halogen containing component, NO, or CO.
  • the halogen containing component is PF 3 , Cl 2 , or SF 6 .
  • Different metals that may be etched are, for example but not limited to, iron (Fe), cobalt (Co), ruthenium (Ru), platinum (Pt), manganese (Mn), palladium (Pd), iridium (Jr), magnesium (Mg), and tantalum (Ta).
  • Different materials for the thermal hardmask may be, for example but not limited to, silicon oxide, tungsten, tantalum, titanium nitride, tantalum nitride, and tungsten nitride.
  • the thermal hardmask should be a different material than the metal layer being etched.
  • inventions may use a plasma to create the precursor gas.
  • the creation of the volatile byproduct is not through the use of a plasma, but instead the heating of the precursor metal complex to vaporize the precursor metal complex.
  • the heat source heats the precursor metal complex to a temperature of at least 300° C. More preferably, the heat source heats the precursor metal complex to a temperature of between 300° C. to 400° C.
  • FIG. 5 is a schematic cross-sectional view of part of a stack that may be used in forming an MRAM device.
  • a substrate 504 is provided. Over the substrate is one or more intermediate layers 508 . Over the one or more intermediate layers 508 is a synthetic antiferomagnet (SAF) stack formed by a first cobalt layer 512 , a ruthenium layer 516 , and a second cobalt layer 520 . A thermal hardmask 524 is placed over the second cobalt layer 520 .
  • the ruthenium layer 516 has a thickness of 6 ⁇ to 8 ⁇ . The thickness of the cobalt layers would be 20 ⁇ .
  • the recipe and precursor gas for etching the ruthenium layer 516 would be different than the recipe and precursor gas for etching the cobalt layers 512 , 520 . Because the recipes for etching the ruthenium and cobalt are different, the etching of one layer is etch stopped by the next layer, since the invention provides highly selective etch processes.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Drying Of Semiconductors (AREA)
US13/446,778 2012-04-13 2012-04-13 Layer-layer etch of non volatile materials Abandoned US20130270227A1 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
US13/446,778 US20130270227A1 (en) 2012-04-13 2012-04-13 Layer-layer etch of non volatile materials
PCT/US2013/034971 WO2013154867A1 (en) 2012-04-13 2013-04-02 Layer-layer etch of non volatile materials
KR1020147031791A KR20140147133A (ko) 2012-04-13 2013-04-02 비 휘발성 재료의 층별 에칭
SG10201608573XA SG10201608573XA (en) 2012-04-13 2013-04-02 Layer-layer etch of non volatile materials
SG11201406233VA SG11201406233VA (en) 2012-04-13 2013-04-02 Layer-layer etch of non volatile materials
TW102112558A TW201411725A (zh) 2012-04-13 2013-04-09 非揮發性材料之層－層蝕刻

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/446,778 US20130270227A1 (en) 2012-04-13 2012-04-13 Layer-layer etch of non volatile materials

Publications (1)

Publication Number Publication Date
US20130270227A1 true US20130270227A1 (en) 2013-10-17

Family

ID=49324153

Family Applications (1)

Application Number Title Priority Date Filing Date
US13/446,778 Abandoned US20130270227A1 (en) 2012-04-13 2012-04-13 Layer-layer etch of non volatile materials

Country Status (5)

Country Link
US (1) US20130270227A1 (ko)
KR (1) KR20140147133A (ko)
SG (2) SG11201406233VA (ko)
TW (1) TW201411725A (ko)
WO (1) WO2013154867A1 (ko)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104953027A (zh) * 2014-03-27 2015-09-30 朗姆研究公司 蚀刻非挥发性金属材料的方法
JP2017059824A (ja) * 2015-09-15 2017-03-23 セントラル硝子株式会社 ドライエッチング方法、半導体素子の製造方法及びチャンバークリーニング方法
US11270893B2 (en) 2019-04-08 2022-03-08 International Business Machines Corporation Layer-by-layer etching of poly-granular metal-based materials for semiconductor structures
US11715643B2 (en) * 2019-07-18 2023-08-01 Tokyo Electron Limited Gas phase etch with controllable etch selectivity of metals

Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5228206A (en) * 1992-01-15 1993-07-20 Submicron Systems, Inc. Cluster tool dry cleaning system
US6187616B1 (en) * 1998-02-13 2001-02-13 Seiko Epson Corporation Method for fabricating semiconductor device and heat treatment apparatus
US6284146B1 (en) * 1996-06-13 2001-09-04 Samsung Electronics Co., Ltd. Etching gas mixture for transition metal thin film and method for etching transition metal thin film using the same
US6436838B1 (en) * 2000-04-21 2002-08-20 Applied Materials, Inc. Method of patterning lead zirconium titanate and barium strontium titanate
US20020132485A1 (en) * 1998-01-20 2002-09-19 Tegal Corporation Method for using a hard mask for critical dimension growth containment
US20020130339A1 (en) * 2001-03-16 2002-09-19 Kabushiki Kaisha Toshiba Magnetoresistance effect device, method of manufacturing the same, magnetic memory apparatus, personal digital assistance, and magnetic reproducing head, and magnetic information reproducing apparatus
US6881277B2 (en) * 1999-02-08 2005-04-19 Micron Technology, Inc. Method of processing selected surfaces in a semiconductor process chamber based on a temperature differential between surfaces
US20060101636A1 (en) * 2004-11-18 2006-05-18 Hitachi Global Storage Technologies Method for patterning a magnetoresistive sensor
US20060286819A1 (en) * 2005-06-21 2006-12-21 Applied Materials, Inc. Method for silicon based dielectric deposition and clean with photoexcitation
US20100284103A1 (en) * 2008-01-30 2010-11-11 Fujitsu Limited Magnetoresistive effect device, magnetic head, and information storage apparatus
US20100327248A1 (en) * 2009-06-29 2010-12-30 Seagate Technology Llc Cell patterning with multiple hard masks
US20120178203A1 (en) * 2007-10-06 2012-07-12 Solexel, Inc. Laser annealing for aluminum doping and formation of back-surface field in solar cell contacts
US20130069182A1 (en) * 2011-09-21 2013-03-21 Yuichi Ohsawa Magnetoresistive effect element, magnetic memory, and magnetoresistive effect element manufacturing method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100255661B1 (ko) * 1997-02-22 2000-05-01 윤종용 반도체 소자의 전극층 식각 방법
KR100605174B1 (ko) * 2003-07-23 2006-07-28 동부일렉트로닉스 주식회사 반도체 소자의 본딩 패드 형성방법
KR100599437B1 (ko) * 2004-06-30 2006-07-12 주식회사 하이닉스반도체 반도체소자의 소자분리 방법
JP4849881B2 (ja) * 2005-12-08 2012-01-11 株式会社日立ハイテクノロジーズ プラズマエッチング方法
KR20090045529A (ko) * 2007-11-02 2009-05-08 주식회사 하이닉스반도체 루테늄 식각 방법 및 그를 이용한 캐패시터의 제조 방법

Patent Citations (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5228206A (en) * 1992-01-15 1993-07-20 Submicron Systems, Inc. Cluster tool dry cleaning system
US6284146B1 (en) * 1996-06-13 2001-09-04 Samsung Electronics Co., Ltd. Etching gas mixture for transition metal thin film and method for etching transition metal thin film using the same
US20020132485A1 (en) * 1998-01-20 2002-09-19 Tegal Corporation Method for using a hard mask for critical dimension growth containment
US6187616B1 (en) * 1998-02-13 2001-02-13 Seiko Epson Corporation Method for fabricating semiconductor device and heat treatment apparatus
US6881277B2 (en) * 1999-02-08 2005-04-19 Micron Technology, Inc. Method of processing selected surfaces in a semiconductor process chamber based on a temperature differential between surfaces
US6436838B1 (en) * 2000-04-21 2002-08-20 Applied Materials, Inc. Method of patterning lead zirconium titanate and barium strontium titanate
US20020130339A1 (en) * 2001-03-16 2002-09-19 Kabushiki Kaisha Toshiba Magnetoresistance effect device, method of manufacturing the same, magnetic memory apparatus, personal digital assistance, and magnetic reproducing head, and magnetic information reproducing apparatus
US20060101636A1 (en) * 2004-11-18 2006-05-18 Hitachi Global Storage Technologies Method for patterning a magnetoresistive sensor
US20060286819A1 (en) * 2005-06-21 2006-12-21 Applied Materials, Inc. Method for silicon based dielectric deposition and clean with photoexcitation
US20120178203A1 (en) * 2007-10-06 2012-07-12 Solexel, Inc. Laser annealing for aluminum doping and formation of back-surface field in solar cell contacts
US20100284103A1 (en) * 2008-01-30 2010-11-11 Fujitsu Limited Magnetoresistive effect device, magnetic head, and information storage apparatus
US20100327248A1 (en) * 2009-06-29 2010-12-30 Seagate Technology Llc Cell patterning with multiple hard masks
US20130069182A1 (en) * 2011-09-21 2013-03-21 Yuichi Ohsawa Magnetoresistive effect element, magnetic memory, and magnetoresistive effect element manufacturing method

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104953027A (zh) * 2014-03-27 2015-09-30 朗姆研究公司 蚀刻非挥发性金属材料的方法
JP2017059824A (ja) * 2015-09-15 2017-03-23 セントラル硝子株式会社 ドライエッチング方法、半導体素子の製造方法及びチャンバークリーニング方法
WO2017047400A1 (ja) * 2015-09-15 2017-03-23 セントラル硝子株式会社 ドライエッチング方法、半導体素子の製造方法及びチャンバークリーニング方法
US11270893B2 (en) 2019-04-08 2022-03-08 International Business Machines Corporation Layer-by-layer etching of poly-granular metal-based materials for semiconductor structures
US11715643B2 (en) * 2019-07-18 2023-08-01 Tokyo Electron Limited Gas phase etch with controllable etch selectivity of metals

Also Published As

Publication number Publication date
SG11201406233VA (en) 2014-10-30
TW201411725A (zh) 2014-03-16
SG10201608573XA (en) 2016-12-29
WO2013154867A1 (en) 2013-10-17
KR20140147133A (ko) 2014-12-29

Similar Documents

Publication Publication Date Title
US8608973B1 (en) Layer-layer etch of non volatile materials using plasma
US9391267B2 (en) Method to etch non-volatile metal materials
TWI576912B (zh) 減少蝕刻腔室內污染的方法
US9257300B2 (en) Fluorocarbon based aspect-ratio independent etching
JP2014049466A (ja) エッチング処理方法及び基板処理装置
TW201436026A (zh) 鎢蝕刻之方法
US20130270227A1 (en) Layer-layer etch of non volatile materials
KR20200054962A (ko) 에칭 층을 에칭하기 위한 방법
TWI806871B (zh) 多孔低介電常數介電蝕刻
US20160035585A1 (en) Method to etch a tungsten containing layer
TW202125640A (zh) 原子層蝕刻及離子束蝕刻圖案化
US20240021435A1 (en) Metal etch
TWI789430B (zh) 金屬氧化物之原子層蝕刻
US20230230819A1 (en) Method for cleaning a chamber

Legal Events

Date Code Title Description
AS Assignment

Owner name: LAM RESEARCH CORPORATION, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:GUHA, JOYDEEP;MARKS, JEFFREY;JINNAI, BUTSURIN;SIGNING DATES FROM 20120402 TO 20120404;REEL/FRAME:028138/0541

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO PAY ISSUE FEE