US20080143699A1 - Display drive circuit - Google Patents

Display drive circuit Download PDF

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Publication number
US20080143699A1
US20080143699A1 US11/907,200 US90720007A US2008143699A1 US 20080143699 A1 US20080143699 A1 US 20080143699A1 US 90720007 A US90720007 A US 90720007A US 2008143699 A1 US2008143699 A1 US 2008143699A1
Authority
US
United States
Prior art keywords
power supply
ground
line
drive circuit
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US11/907,200
Other languages
English (en)
Inventor
Atsushi Hirama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lapis Semiconductor Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Assigned to OKI ELECTRIC INDUSTRY CO., LTD reassignment OKI ELECTRIC INDUSTRY CO., LTD ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HIRAMA, ATSUSHI
Publication of US20080143699A1 publication Critical patent/US20080143699A1/en
Assigned to OKI SEMICONDUCTOR CO., LTD. reassignment OKI SEMICONDUCTOR CO., LTD. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: OKI ELECTRIC INDUSTRY CO., LTD.
Priority to US14/190,495 priority Critical patent/US9208716B2/en
Assigned to Lapis Semiconductor Co., Ltd. reassignment Lapis Semiconductor Co., Ltd. CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: OKI SEMICONDUCTOR CO., LTD
Priority to US14/932,118 priority patent/US9589501B2/en
Priority to US15/424,766 priority patent/US9799265B2/en
Abandoned legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G06F3/1423Digital output to display device ; Cooperation and interconnection of the display device with other functional units controlling a plurality of local displays, e.g. CRT and flat panel display
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    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
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    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G09G3/325Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
    • GPHYSICS
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    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/17Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H01L2224/171Disposition
    • H01L2224/1712Layout
    • H01L2224/1715Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
    • H01L2224/17154Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry covering only portions of the surface to be connected
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

Definitions

  • the invention relates to a display drive circuit for operating a display device, which uses an organic electroluminescent device (hereinafter called “an organic EL device”) or a light emitting diode (hereinafter called “an LED”), and specifically, relates to a display drive circuit formed in a chip manufactured by a Chip On Glass (hereinafter called “a COG”) implementation technology, which connects lead lines for a display formed on a glass substrate by bonding.
  • an organic EL device organic electroluminescent device
  • an LED light emitting diode
  • FIG. 2A is a diagram showing the entire skeleton framework of a display panel having an organic EL drive circuit formed on a COG
  • FIG. 2B is a sectional view taken on line 11 - 12 of FIG. 2A .
  • the display panel includes a nearly square-shaped glass substrate 2 , and a display area 10 displaying the images is located in the center of the substrate 2 .
  • a plurality of data lines SEG and a plurality of scanning lines COM which are perpendicular to the data lines SEG, are formed.
  • An organic EL device 11 is formed at each intersection of the data lines SEG and the scanning lines COM so that the organic EL devices 11 are arranged in a lattice-like manner.
  • Both of the data lines SEG and the scanning lines COM extend from the display area 10 to an edge of the glass substrate 2 as lead lines.
  • Each of the data lines SEG and the scanning lines COM are formed of a transparent conductive layer using ITO (indium Tin Oxide) for instance.
  • ITO indium Tin Oxide
  • a display drive circuit includes a plurality of data line drive circuits 20 - 1 . . . 20 - n and a plurality of scanning line drive circuit 30 - 1 . . . 30 - n .
  • Each of the data line drive circuits 20 - 1 . . . 20 - n is formed on one of the lead lines of the data lines SEG extending from the display area 10 , and is formed in an individual chip, which is implemented by the COG method.
  • Each data line drive circuit 20 includes switching elements such as transistors, which are operated in response to image data for displaying the images, and which have a function to supply a predetermined electric current to each of the data lines SEG.
  • each scanning line drive circuit 30 includes switching elements such as transistors, which are operated in response to image data for displaying the images, and which have a function for supplying ground electric potential (ex. 0 volt) to the scanning lines SEG.
  • the glass substrate is equipped with unillustrated electrical components, such as a control circuit, in an area around the display area 10 .
  • FIG. 3 is a skeletal circuit diagram in an area X of the FIG. 2A , which is adjacent to one of the organic EL devices 11 , and in an area Y of the FIG. 2A , which is a part of one of the scanning line drive circuit 30 .
  • FIG. 4A is a diagram showing a skeleton framework of one of the scanning line drive circuit 30 shown in FIG. 2A
  • FIG. 4B is a sectional view taken on line 121 - 122 of FIG. 4A .
  • the organic EL device is connected in a forward direction between a data line SEG and a scanning line COM that is perpendicular to the data line in the area X.
  • each of the scanning line drive circuit 30 includes a rectangularly-shaped substrate 31 .
  • An elongated ground line 32 having a width W and length L is formed on the substrate 31 along the longer side of the substrate 31 .
  • a plurality of output terminals 33 - 1 . . . 33 - n are disposed on the substrate 31 along one of the longer side of the substrate 31 , and a plurality of a switches 34 - 1 . . . 34 - n , each of which includes a transistor, are formed on the substrate 31 wherein each of the switches 34 is disposed between one of the output terminals 33 - 1 . . . 33 - n and the ground line 32 .
  • the switches 34 are operated by the control circuit.
  • ground terminals 35 - 1 and 35 - 2 are formed near the opposite longer side of the substrate 31 .
  • Each output terminal 33 is connected to one of the scanning lines through a bump electrode 36 formed thereon, and each of the two ground terminals is grounded through another bump electrode 36 formed thereon.
  • One of the organic EL devices 11 (for example the organic EL device 11 illustrated in FIG. 2A ) emits light in the following way.
  • the scanning line drive circuit 30 - 1 which connects the organic EL device 11 to be eliminated, is connected to the ground line 32 through the output terminal 33 - 1 and the switch 34 - 1 so that the ground electric potential (0 volt) is supplied to the scanning line COM connected to the organic EL devices 11 .
  • the drive current from the data line drive circuit 20 - 1 is supplied to the data line SEG, which is connected to the organic EL devices 11 .
  • the drive current flows in the flowing order; the data line SEG the organic EL device 11 ⁇ the scanning line COM ⁇ the output terminal 33 - 1 ⁇ switch 34 - 1 ⁇ the ground line 32 ⁇ the ground terminals 34 - 1 and 34 - 2 .
  • the organic EL device 11 emits light.
  • the light intensity of the organic EL device 11 depends on the value of the drive current.
  • Reference 1 Japanese laid open patent 2002-151276
  • Reference 3 Japanese laid open patent 2004-206056
  • an EL display device with a good balance between colors of EL elements and with a good balance in emission intensity, which is capable of displaying brightly hued images is disclosed.
  • EL drive circuits which are similar to the drive circuits of FIGS. 2A , 2 B and 3 , are disclosed.
  • EL drive circuits, which suppress luminance unevenness and retain display quality without enlarging a frame part are disclosed.
  • the reference 4 discloses line heads of the configuration without any difference in the quantity of light emitted from a plurality of light emitting elements, and an image forming apparatus using the same.
  • the following problems are recognized in the display drive circuit, for example, the scanning line drive circuits 30 , in the related art.
  • ground terminals 34 - 1 and 34 - 2 are connected respectively to the opposite ends of the ground line 32 , and each ground terminal 34 - 1 or 34 - 2 , which are implemented by the COG method, is grounded through a respective one of the bump electrodes 36 .
  • the resistance value of the ground line 32 in the scanning line drive circuits 30 is determined by the amount of an electromigration.
  • the electromigration is the phenomenon that occurs when some of the momentum of moving electrons is transferred to nearby-activated ions. This causes the ions to move from their original position.
  • the width W of the ground line 32 is required to be a 1000 ⁇ m when the length L of the ground line 32 is set to be a 10,000 ⁇ m. Since a sheet resistance is 0.05 ⁇ / ⁇ , the resistance value of the ground line 32 having the length L is calculated to be 0.5 ⁇ . As a result, as shown as an arrow in FIG.
  • the output electric current which is supplied from the left-end output terminal 33 - 1 to the ground line 32 through the switch 34 - 1 , may flow to ground through the right-end ground terminal 35 - 2 in the case that the contact resistance at the ground terminal 35 - 1 is to be greater than the sum of the resistance value of the ground line 32 and the contact resistance at the ground terminal 35 - 2 .
  • the dispersion of the contact resistance can be reduced by the size of the ground terminal 35 - 1 or 35 - 2 .
  • the sizes of the both ground terminals 35 - 1 and 35 - 2 are reduced, it would be required to form a hundred ground terminals near each ground terminal 35 - 1 and 35 - 2 to obtain the capacity to pass the electric current to ground.
  • the size of the substrate 31 becomes larger because its longer side is further elongated. This is a distant idea in view of the difficulty of its implementation.
  • the width W of the ground line 32 may need to be a 1000 ⁇ m so that the shorter side of the substrate 31 is also elongated. As a result, the total side of the scanning line drive circuit becomes larger. This is a specific problem with implementation using the COG method.
  • the width of the wiring ( 107 ), which connects the two terminals ( 105 ) acting as the supply terminals to the current supply lines ( 104 ), is set to be a best value wherein two terminals ( 105 ) correspond to the ground terminals 35 - 1 and 35 - 2 and the current supply lines ( 104 ) correspond to the dale lines SEG and the wirings ( 107 ) correspond to the ground line 32 .
  • the width W of the ground line 32 is set at the best value by using the technology disclosed in the reference 1, the ground line 32 having a 1000 ⁇ m width is required as described above.
  • the shorter side of the substrate 31 is elongated so that the problem is not solved.
  • the width of the power supply line supplying the power supply to the EL display panel is reduced to half so that the area of the flame part can be reduced wherein the area of the flame part corresponds to the area around the display area 10 shown in FIG. 2A .
  • the reason that the width of the power supply line is reduced to half be that the power supply line extends from the mounting terminal area ( 102 ) at both of its sides, as shown in FIG. 4 of the reference 3.
  • the technology disclosed in the reference 3 corresponds to the description above in that the width W of the ground line 32 is reduced to half by using two ground terminals 35 - 1 and 35 - 2 connected at the both ends of the ground line 32 , as shown in FIG. 4A . Thus, the problem is not solved.
  • the reference 4 does not consider any width of the wiring, and the COG technology is not used. Thus, the teachings of reference 4 cannot be combined with the related arts to solve the problem.
  • An objective of the invention is to solve the above-described problem and to provide a display drive circuit, whose operation does not depend on the variety of the contact resistance value without making its substrate larger.
  • a display drive circuit formed in a chip manufactured by a chip on glass implementation which is connected to lead lines formed on a glass substrate, comprising, a rectangularly-shaped substrate, a power supply line formed on the substrate, the line being elongated along the longer side of the rectangularly-shaped substrate, a plurality of output terminals formed on the rectangularly-shaped substrate, the output terminal being disposed along the power supply line, a plurality of bump electrodes, each of which connects one of the output terminal to one of the lead lines, switches disposed along the power supply line, each of which is connected between the one of the output terminals and the power supply line, a single power supply terminal, which is disposed near the middle of the power supply line, being connected to the power supply line.
  • FIG. 1A is a plan view showing a skeleton framework of a display drive circuit, such as a scanning line drive circuit, used in a display panel, according to a first embodiment
  • FIG. 1B is a sectional view taken on line 121 - 122 of FIG. 1A ;
  • FIG. 2A is an entire plan view of a configuration diagram showing a skeleton framework of a display panel having an organic EL drive circuit formed on a COG;
  • FIG. 2B is a sectional view taken on line 11 - 12 of FIG. 2A ;
  • FIG. 3 is a skeletal circuit diagram in an area X of the FIG. 2 , which is adjacent to one of the organic EL devices 11 and in an area Y of the FIG. 2 , which is a part of one of the scanning line drive circuit 30 ;
  • FIG. 4A is a plan view of a configuration diagram showing a skeleton framework of one of the scanning line drive circuit 30 shown in FIG. 2 ;
  • FIG. 4B is a sectional view taken on line 121 - 122 of FIG. 4A ;
  • FIG. 5A is a plan view showing a skeleton framework of a display drive circuit, such as a scanning line drive circuit, used in a display panel, according to a second embodiment
  • FIG. 5B is a sectional view taken on line 131 - 132 of FIG. 5A ;
  • FIG. 6 is an enlarged view showing a layout of the scanning line drive circuit of FIG. 5A .
  • FIG. 1A is a plan view showing a skeleton framework of a display drive circuit, such as a scanning line drive circuit, used in a display panel, according to a first embodiment and FIG. 1B is a sectional view taken on line 121 - 122 of FIG. 1A .
  • a display drive circuit such as a scanning line drive circuit
  • the display panel 40 includes a nearly square-shaped glass substrate 41 , and a display area 50 displaying the images is formed in the center of the substrate 41 .
  • a plurality of data lines SEG and a plurality of scanning lines COM which are perpendicular to the data lines SEG, are formed.
  • An organic EL device 51 is formed at each intersection of the data lines SEG and the scanning lines COM so that the organic EL devices 51 are arranged in a lattice-like manner.
  • Both of the data lines SEG and the scanning lines COM extend from the display area 50 to an edge of the glass substrate 41 as lead lines.
  • Each of the data lines SEG and the scanning lines COM are formed of a transparent conductive layer using ITO (indium Tin Oxide) for instance.
  • ITO indium Tin Oxide
  • a display drive circuit includes a plurality of data line drive circuit s 70 and a plurality of scanning line drive circuits 60 .
  • Each of the data line drive circuits 70 is formed on one of the lead lines of the data lines SEG extending from the display area 50 , and is formed in an individual chip, which is implemented by the COG method.
  • Each data line drive circuit 70 includes switching elements such as transistors, which are operated in response to image data for displaying the images, and which have a function to supply a predetermined electric current to each of the data lines SEG.
  • Also provided on each of the lead lines of the scanning lines COM extending from the display area 50 is a respective one the scanning line drive circuits 60 formed in an individual chip, which is implemented by the COG method.
  • Each scanning line drive circuit 60 includes switching elements such as transistors, which are operated in response to image data for displaying the images, and which have a function for supplying ground electric potential (ex. 0 volt) to the scanning lines SEG.
  • Each of the scanning line drive circuit 30 includes a rectangularly-shaped substrate 61 .
  • An elongated ground line 62 having a predetermined width W and a predetermined length L (ex. 10000 ⁇ m), and having a resistance value R (ex. 0.5 ⁇ ) is extended from one of the shorter side of the substrate 61 to the opposite side on the substrate 61 along one of the longer side of the substrate 61 .
  • a plurality of output terminals 63 - 1 . . . 63 - n are disposed regularly on the substrate 31 along another longer side of the substrate 31 , and a plurality of a switches 64 - 1 . . .
  • each of which includes a transistor are formed on the substrate 61 wherein each of the switches 34 is disposed between one of the output terminals 63 - 1 . . . 33 - n and the ground line 62 .
  • the switches 34 are operated by an unillustrated control circuit disposed in an area around the display area 50 .
  • a single ground terminals 65 is disposed near the middle location of the another longer side of the substrate 61 between another longer side of the substrate 61 and the ground line 62 , and is connected to the ground line near its middle location.
  • the resistance value of the ground line 62 between the ground terminals 65 and the left end of the ground line 62 is R/2 (about 0.25 ⁇ )
  • the resistance value of the ground line 62 between the ground terminals 65 and the right end of the ground line 62 is also R/2 (about 0.25 ⁇ ).
  • Each output terminal 63 are connected to one of the scanning lines COM through an AU bump electrode 66 formed thereon, and the ground terminals 65 are grounded through another AU bump electrode 66 formed thereon.
  • One of the organic EL devices 51 (for example the organic EL devices 51 illustrated in FIG. 1A ) emits light in the following way.
  • the scanning line drive circuit 60 which connects the organic EL device 51 to be eliminated, is connected to the ground line 62 through the output terminal 63 - 1 and the switch 64 - 1 so that the ground electric potential (0 volt) is supplied to the scanning line COM connected to the organic EL devices 51 .
  • the drive current from the data line drive circuit 70 is supplied to the data line SEG, which is connected to the organic EL devices 51 .
  • the drive current flows in the flowing order; the data line SEG ⁇ the organic EL device 51 ⁇ the scanning line COM ⁇ the output terminal 63 - 1 ⁇ switch 64 - 1 ⁇ the ground line 64 ⁇ the single ground terminals 65 .
  • the organic EL device 51 emits light.
  • the light intensity of the organic EL device 51 depends on the value of the drive current.
  • the switches 64 - 1 . . . 64 - n are turned on by the control circuit in series from the left ( 64 - 1 ) to the right ( 64 - n ) illustrated in the FIG. 1A , the drive current from the output terminals 63 - 1 . . . 63 - n /2, which are located in the left side, are flowed to the ground line 62 through the switches 64 - 1 . . . 64 - n/ 2. Then the drive current flows on the ground line 62 from the left to the center, and then flows to the ground through the single ground terminal 65 . On the other hand, the drive current output from the output terminals 63 -( n/ 2+1) . . .
  • the maximum allowable current is generally at 1 mA.
  • the width W of the ground line 62 is set to be a 1000 ⁇ m and the length L of the ground line 62 is set to be a 10,000 ⁇ m
  • the resistance value of the ground line 32 having the length L is calculated 0.5 ⁇ since a sheet resistance is to be 0.05 ⁇ / ⁇ .
  • the ground terminal 65 is located near the middle of the ground line 62 , and is connected to the ground line 62 , the drive current, which flows through the switches 64 - 1 . . . 64 - n /2 located in the left side, flows on the ground line 62 from its left to its center, and then flows to the ground through the single ground terminal 65 while the drive current, which flows through the switches 64 -( n/ 2+1) . . . 64 - n/ 2 located in the right side, flows on the ground line 62 from its right to its center, and then flows to the ground through the single ground terminal 65 .
  • the route of the drive current flowing on the ground line 62 does not depend on the dispersion of the contact resistance, and is always the same.
  • the route of the drive current flowing on the ground line 62 through the switch 34 - 1 depends on the contact resistances of the ground terminal, which are determined accidentally in the COG process. In other words, in a certain occasion (if the contact resistance of the ground terminal 35 - 1 is smaller than the sum of the resistance values of the ground line 32 and the ground terminal 35 - 2 ), the drive current reached on the ground line 32 through the switch 34 - 1 flows to the ground through the ground terminal 35 - 1 .
  • the drive current reached on the ground line 32 through the switch 34 - 1 flows to the ground through the ground terminal 35 - 2 .
  • the drive current reached on the ground line 62 through the switch 64 - 1 always flows to the ground through the single ground terminal 65 so that the route of the drive current from a certain switch is always the same.
  • the longest route on the ground line 62 of the drive current is the half of the length of the ground line 62 (L/2).
  • the resistance value R of the ground line 32 having the length L/2 is calculated 0.25 ⁇ .
  • the width W of the ground line 62 can be reduced to half, such as at a 500 mm, the electromigration may not occurs. Accordingly, the length of the substrate 61 can be shorter at its shorter side, and the total size of the scanning line drive circuit 60 can be miniaturized.
  • the single ground terminal 65 is located near the middle of the ground line 62 , and is connected to the ground line 62 , the length L of the ground line 62 is not changed while the width W of the ground line 62 is reduced to half. As a result, the length of the substrate 61 can be shorter at its shorter side, and the total size of the scanning line drive circuit 60 can be miniaturized.
  • the second embodiment is explained with reference to FIGS. 5A , 5 B and 6 .
  • uniformity of displaying the images may occur because of a differences of the power supply impedance, which may be occur between the scanning lines COM, each of which is connected to one adjacent scanning line drive circuits.
  • a differences of the power supply impedance may be occur between the scanning line COM disposed at the most right in the most right side of the scanning line drive circuit in the left and the scanning line COM disposed at the most left in the most left side of the scanning line drive circuit, which is next right to aforementioned scanning line drive circuit, in the right.
  • FIG. 5A is a plan view showing a skeleton framework of a display drive circuit, such as a scanning line drive circuit, used in a display panel
  • FIG. 5B is a sectional view taken on line 131 - 132 of FIG. 5A
  • FIG. 6 is an enlarged view showing a layout of the scanning line drive circuit of FIG. 5A .
  • the same reference numbers designate the same or similar components.
  • a first group of an even number (l) of ground terminals 65 - 1 is disposed near the middle of a ground line 62 in a scanning line drive circuit 60 A, and each of the ground terminals 65 - 1 of the first group is connected to the ground line 62 .
  • a second group of a number (m) of ground terminals 65 - 2 is disposed at one end of the ground line 62 in the scanning line drive circuit 60 A, and each of the ground terminals 65 - 2 of the second group is connected to the ground line 62 .
  • a third group of a number (n) of ground terminals 65 - 3 is disposed at the other end of the ground line 62 in the scanning line drive circuit 60 A, and each of the ground terminals 65 - 2 of the second group is connected to the ground line 62 .
  • the numbers (m) and (n) could be the same, or could be the different.
  • Each of the ground terminals 65 - 1 , 65 - 2 and 65 - 2 in the first through third group is grounded through an AU bump electrode 66 formed thereon.
  • the planar dimension of each ground terminals 65 - 1 , 65 - 2 and 65 - 3 is the same.
  • the number (l) of the ground terminals 65 - 1 is set to be greater than that (m) of the ground terminals 65 - 2 or that (n) of the ground terminals 65 - 2 . For this reason, a total of planar dimension of the ground terminals 65 - 1 of the first group is set to be larger than a total of planar dimension of the ground terminals 65 - 2 of the second group or a total of planar dimension of the ground terminals 65 - 3 of the third group.
  • a sum of the contact resistance of the ground terminals 65 - 1 of the first group, each of which is connected in parallel, is smaller than that of the ground terminals 65 - 2 , each of which also is connected in parallel or that of the ground terminals 65 - 3 , each of which also is connected in parallel.
  • each of pitches p 1 between the ground terminals 65 - 1 of the first group is set to be greater than each of pitches p 2 between the ground terminals 65 - 2 of the second group or each of the pitches p 3 between the ground terminals 65 - 3 of the third group.
  • the distances of the pitches (p 2 ) and (p 3 ) could be the same, or could be the different.
  • the operation of the display drive circuit 60 A of the second embodiment is explained below.
  • the switches 64 - 1 . . . 64 - n are turned on by the control circuit in series from the left ( 64 - 1 ) to the right ( 64 - n ) illustrated in the FIG. 5A , the drive current from the output terminals 63 - 1 . . . 63 - n/ 2, which are located in the left side, are flowed to the ground line 62 through the switches 64 - 1 . . . 64 - n /2.
  • the drive current output from the output terminals 63 -( n/ 2+1) . . . 63 - n at the right side flows to the ground line 62 through the switches 64 -( n /2+1) . . . 64 - n , respectively.
  • each of the ground terminals 65 - 1 , 65 - 2 and 65 - 3 is the same, and is set at the range between 1 ⁇ (min) and 10 ⁇ (max), and when the number (m) of the ground terminals 65 - 2 is set at twenty (20), the number (n) of the ground terminals 65 - 3 is also set at twenty (20), and the number (l) of the ground terminals 65 - 1 is set at forty (40), each sum of the contact resistance of the ground terminals 65 - 2 and 65 - 3 of the second and the third groups would be at the range between 0.1 ⁇ (min) and 0.5 ⁇ (max) and the sum of the contact resistance of the ground terminals 65 - 1 of the first group would be at the range between 0.05 ⁇ (min) and 0.25 ⁇ (max).
  • seventy percent (70%) of the drive current flows to the ground through the ground terminals 65 - 1
  • the rest (30%) of the drive current flows to the ground through either of the ground terminals 65 - 2 or 65
  • the ground terminals 65 - 2 and 65 - 3 are formed at the both ends of the ground line 62 in addition to a plurality of the ground terminals 65 - 1 near the middle of the ground line 62 , it could be reduce the differences of the power supply impedance, which may occur between the scanning lines COM, each of which is connected to one adjacent scanning line drive circuits. Accordingly the uniformity of displaying the images at the scanning lines having a difference of the power supply impedance can be eliminated.
  • each of the pitches p 1 between the ground terminals 65 - 1 of the first group is set to be greater than each of the pitches p 2 between the ground terminals 65 - 2 of the second group or each of the pitches p 3 between the ground terminals 65 - 3 of the third group, degree of density of the ground terminals 65 - 1 is higher than that of the ground terminals 65 - 2 or that of the ground terminals 65 - 3 .
  • the length of the scanning line drive circuit 60 A at its longer side can be suppressed to become further longer.
  • a plurality of the ground terminals 65 - 1 in the first group is formed in order to excess the number (m) or (n) of the ground terminals 65 - 2 and 65 - 3 .
  • a single ground terminal having a planar dimension, which is larger than the total planar dimension of either the ground terminals 65 - 2 or 65 - 3 may be disposed near the middle of the ground line, and connects thereto.
  • the organic EL devices are used, other display devices, such as a light emitting diode (LED) can be employed to both embodiments.
  • the number (l) of the ground terminals 65 - 1 and the numbers (m) and (n) of the ground terminals 65 - 2 and 65 - 3 may be set as a desired ratio.
  • the scanning line drive circuits 60 and 60 A are explained for the sake of brevity, both embodiments can be applied to another display drive circuit, such as the data line drive circuit 70 .
  • the ground line 62 can be replaced with the power supply line
  • the switches 64 can be replace with other switches, each having a different configuration
  • the ground terminal 65 can be replaced with an power supply terminal.

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US11/907,200 2006-12-15 2007-10-10 Display drive circuit Abandoned US20080143699A1 (en)

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US14/190,495 US9208716B2 (en) 2006-12-15 2014-02-26 Display drive circuit including an output terminal
US14/932,118 US9589501B2 (en) 2006-12-15 2015-11-04 Display drive circuit including an output terminal
US15/424,766 US9799265B2 (en) 2006-12-15 2017-02-03 Display drive circuit including an output terminal

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US14/190,495 Active US9208716B2 (en) 2006-12-15 2014-02-26 Display drive circuit including an output terminal
US14/932,118 Active US9589501B2 (en) 2006-12-15 2015-11-04 Display drive circuit including an output terminal
US15/424,766 Active US9799265B2 (en) 2006-12-15 2017-02-03 Display drive circuit including an output terminal

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US15/424,766 Active US9799265B2 (en) 2006-12-15 2017-02-03 Display drive circuit including an output terminal

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JP2008151892A (ja) 2008-07-03
US9589501B2 (en) 2017-03-07
CN101206831B (zh) 2011-08-17
JP4425264B2 (ja) 2010-03-03
US20170148381A1 (en) 2017-05-25
US9799265B2 (en) 2017-10-24
US9208716B2 (en) 2015-12-08
US20140176522A1 (en) 2014-06-26
KR101451770B1 (ko) 2014-10-16
US20160055795A1 (en) 2016-02-25
CN101206831A (zh) 2008-06-25

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