US20060086948A1 - Semiconductor device and semiconductor device manufacturing method - Google Patents

Semiconductor device and semiconductor device manufacturing method Download PDF

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US20060086948A1
US20060086948A1 US11/252,734 US25273405A US2006086948A1 US 20060086948 A1 US20060086948 A1 US 20060086948A1 US 25273405 A US25273405 A US 25273405A US 2006086948 A1 US2006086948 A1 US 2006086948A1
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gan substrate
gas
semiconductor device
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Akihito Ohno
Masayoshi Takemi
Nobuyuki Tomita
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Assigned to MITSUBISHI DENKI KABUSHIKI KAISHA reassignment MITSUBISHI DENKI KABUSHIKI KAISHA ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: OHNO, AKIHITO, TAKEMI, MASAYOSHI, TOMIT, NOBYUYUKI
Assigned to MITSUBISHI DENKI KABUSHIKI KAISHA reassignment MITSUBISHI DENKI KABUSHIKI KAISHA CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE THIRD ASSIGNOR. PREVIOUSLY RECORDED AT REEL 017110 FRAME 0947. Assignors: OHNO, AKIHITO, TAKEMI, MASAYOSHI, TOMITA, NOBUYUKI
Publication of US20060086948A1 publication Critical patent/US20060086948A1/en
Priority to US11/941,195 priority Critical patent/US7632695B2/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223—Buried stripe structure
    • H01S5/2231—Buried stripe structure with inner confining structure only between the active layer and the upper electrode
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S2304/00—Special growth methods for semiconductor lasers
    • H01S2304/04—MOCVD or MOVPE
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/0207—Substrates having a special shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/2201—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure in a specific crystallographic orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
    • H01S5/2214—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers based on oxides or nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/30—Structure or shape of the active region; Materials used for the active region
    • H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
    • H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
    • H01S5/34333—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser

Definitions

  • the present invention relates to a semiconductor device having a nitride semiconductor layer formed on a gallium nitride (GaN) substrate, and to a method for manufacturing the semiconductor device.
  • GaN gallium nitride
  • Nitride semiconductors such as gallium nitride
  • gallium nitride are utilized and studied for light emitting devices and other electronic devices, and blue light emitting diodes and green light emitting diodes making use of the properties of nitride semiconductors are already in practical use.
  • blue-violet semiconductor lasers employing nitride semiconductors are being developed as next-generation high-density optical disk light sources.
  • the fabrication of light emitting devices with nitride semiconductors mainly uses sapphire substrates.
  • the lattice mismatch between the sapphire substrates and nitride semiconductors formed thereon is as large as about 13%, so that a high density of defects, such as dislocations, are produced in the nitride semiconductors, making it difficult to obtain nitride semiconductors of high quality.
  • GaN substrates gallium nitride substrates with low defect density
  • the GaN substrates are chiefly intended for use as semiconductor laser substrates.
  • Japanese Patent Application Laid-Open No. 2000-223743 discloses a technique for improving the crystallinity of, and lengthening the life of, a nitride semiconductor light emitting device formed on a GaN substrate, in which the upper surface of the GaN substrate is inclined at an angle of not less than 0.03° nor more than 10° with respect to the C-plane.
  • the nitride semiconductor layers formed on the GaN substrate present not only good crystallinity but also superior surface flatness.
  • the nitride semiconductor layers may exhibit unsatisfactory surface flatness, and may even fail to ensure sufficient crystallinity. This causes the semiconductor device fabricated with the nitride semiconductor layers to exhibit deteriorated electric characteristics and reduced reliability. Also, it is not preferable to greatly incline the upper surface of the GaN substrate from the viewpoint of manufacture of the semiconductor devices.
  • An object of the present invention is to provide a technique which enables formation of a nitride semiconductor layer with excellent flatness and excellent crystallinity on a GaN substrate, while improving the producibility of the semiconductor device using the GaN substrate.
  • a semiconductor device includes a gallium nitride substrate and a nitride semiconductor layer that is formed on the upper surface of the gallium nitride substrate.
  • the upper surface of the gallium nitride substrate has an off-angle of not less than 0.1° nor more than 1.0° in a ⁇ 1-100> direction, with respect to a (0001) plane.
  • a semiconductor device manufacturing method includes the steps (a) and (b).
  • the step (a) is a step of preparing a gallium nitride substrate whose upper surface has an off-angle of not less than 0.1° nor more than 1.0° in a ⁇ 1-100> direction with respect to a (0001) plane.
  • the step (b) is a step of forming a nitride semiconductor layer on the upper surface of the gallium nitride substrate.
  • the upper surface of the gallium nitride substrate has an off-angle of not less than 0.1° nor more than 1.00 in the ⁇ 1-100> direction with respect to the (0001) plane. This enables formation of a nitride semiconductor layer with excellent flatness and excellent crystallinity on the gallium nitride substrate, while improving the producibility of the semiconductor device.
  • FIG. 1 is a perspective view illustrating the structure of a gallium nitride substrate according to a preferred embodiment of the present invention
  • FIG. 2 is a perspective view illustrating the structure of a semiconductor device according to the preferred embodiment of the present invention.
  • FIG. 3 is a perspective view illustrating a modification of the structure of the semiconductor device according to the preferred embodiment of the present invention.
  • FIG. 4 is a flowchart showing a semiconductor device manufacturing method according to the preferred embodiment of the present invention.
  • FIG. 5 is a diagram showing a relation between an off-angle of the upper surface of the gallium nitride substrate and maximum height difference on the surface of a nitride semiconductor layer;
  • FIG. 6 is a diagram showing a relation between an off-angle in the ⁇ 11-20> direction of the upper surface of the gallium nitride substrate and maximum height difference on the upper surface of the nitride semiconductor layer, where the upper surface of the gallium nitride substrate has an off-angle in the ⁇ 1-100> direction;
  • FIG. 7 is a perspective view illustrating a modification of the structure of the semiconductor device according to the preferred embodiment of the present invention.
  • FIG. 8 is a diagram showing a relation between the time of thermal processing to the gallium nitride substrate and maximum height difference on the upper surface of the gallium nitride substrate;
  • FIG. 9 is a diagram showing a relation between the temperature of thermal processing to the gallium nitride substrate and maximum height difference on the upper surface of the gallium nitride substrate.
  • FIG. 10 is a diagram showing a relation between impurity concentration of a nitride semiconductor layer and maximum height difference on the upper surface of the nitride semiconductor layer.
  • FIG. 1 is a perspective view illustrating the structure of a GaN substrate 10 according to a preferred embodiment of the present invention.
  • the GaN substrate 10 of the preferred embodiment has a hexagonal crystal structure.
  • the GaN substrate 10 is used to produce semiconductor devices such as light emitting devices, e.g., semiconductor lasers and light emitting diodes, or high-frequency electronic devices.
  • the upper surface 10 a of the GaN substrate 10 has an off-angle ⁇ in the ⁇ 1-100> direction with respect to the C-plane, i.e., the (0001) plane. Accordingly, the upper surface 10 a of the GaN substrate 10 is parallel to a plane that is obtained by rotating a plane parallel to the C-plane by the off-angle ⁇ around a rotation axis extending in the ⁇ 11-20> direction that is normal to the ⁇ 1-100> direction and parallel to the C-plane.
  • the off-angle ⁇ is set to be not less than 0.1° nor more than 1.0°.
  • high dislocation density regions 21 and low dislocation density regions 22 form alternately in the ⁇ 11-20> direction as shown in FIG. 1 .
  • the low dislocation density regions 22 are employed to form semiconductor devices with the GaN substrate.
  • FIG. 2 is a perspective view showing the structure a nitride semiconductor laser manufactured using the GaN substrate 10 . As shown in FIG. 2 , a plurality of nitride semiconductor layers are stacked over the upper surface 10 a of the GaN substrate 10 .
  • the stacked structure on the upper surface 10 a of the GaN substrate 10 includes an n-type semiconductor layer 11 , an n-type cladding layer 12 , an n-type optical guide layer 13 , a multiple quantum well (MQW) active layer 14 , a p-type electron barrier layer 15 , a p-type optical guide layer 16 , a p-type cladding layer 17 , and a p-type contact layer 18 , which are stacked in this order.
  • an n-electrode 19 is provided on the bottom surface of the GaN substrate 10 and a p-electrode 20 is provided on the top surface of the p-type contact layer 18 .
  • the n-type semiconductor layer 11 has a thickness of 1.0 ⁇ m and is formed of n-type GaN or n-type aluminum gallium nitride (AlGaN), for example.
  • the n-type cladding layer 12 has a thickness of 1.0 ⁇ m and is formed of n-type Al 0.07 Ga 0.93 N, for example.
  • the n-type optical guide layer 13 has a thickness of 0.1 ⁇ m and is formed of n-type GaN, for example.
  • the multiple quantum well active layer 14 has a multiple quantum well structure including an alternate stack of well layers having a thickness of 3.5 nm and formed of indium gallium nitride (In 0.12 Ga 0.88 N) and barrier layers having a thickness of 7.0 nm and formed of GaN, for example.
  • the p-type electron barrier layer 15 has a thickness of 0.02 ⁇ m and is formed of p-type Al 0.2 Ga 0.8 N, for example.
  • the p-type optical guide layer 16 has a thickness of 0.1 ⁇ m and is formed of p-type GaN, for example.
  • the p-type cladding layer 17 has a thickness of 0.4 ⁇ m and is formed of p-type Al 0.07 Ga 0.93 N, for example.
  • the p-type contact layer 18 has a thickness of 0.1 ⁇ m and is formed of p-type GaN, for example.
  • the nitride semiconductor laser constructed as above according to the preferred embodiment is cleaved in (1-100) surfaces and has resonator mirrors in the (1-100) surfaces.
  • Application of voltage between the n-electrode 19 and the p-electrode 20 causes the multiple quantum well active layer 14 to output a laser beam.
  • FIG. 3 is a perspective view showing a modification of the semiconductor laser structure of the preferred embodiment.
  • the semiconductor laser shown in FIG. 3 is a ridge waveguide type semiconductor laser, in which the semiconductor laser of FIG. 1 is modified by changing the shapes of the p-type cladding layer 17 , p-type contact layer 18 , and p-electrode 20 and by adding silicon oxide films 52 .
  • a method of manufacturing the semiconductor laser of FIG. 3 will be described below.
  • the crystal growth of the nitride semiconductor layers may be achieved by metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or hydride vapor phase epitaxy (HVPE), the example below uses the MOCVD method.
  • MOCVD metal-organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • HVPE hydride vapor phase epitaxy
  • TMG trimethyl gallium
  • TMA trimethyl aluminum
  • TMI trimethyl indium
  • NH 3 ammonia
  • the process uses monosilane (SiH 4 ) as n-type impurity material and uses scyclo-pentadienyl magnesium (CP 2 Mg) as p-type impurity material, for example.
  • Hydrogen (H 2 ) gas and nitrogen (N 2 ) gas are used as carrier gas for carrying the material gases.
  • FIG. 4 is a flowchart showing a method of manufacturing the semiconductor laser shown in FIG. 3 .
  • the GaN substrate 10 shown in FIG. 1 having an off-angle ⁇ of 0.5°, for example, is prepared.
  • step s 2 the GaN substrate 10 is thermally processed.
  • the GaN substrate 10 is placed in an MOCVD apparatus.
  • the temperature in the apparatus is raised to 1000° C., with supply of NH 3 gas into the apparatus.
  • a mixed gas of NH 3 gas, N 2 gas, and H 2 gas is supplied into the apparatus, and the GaN substrate 10 is thermally processed for 15 minutes in the mixed gas atmosphere.
  • the percentage of the H 2 gas in the mixed gas is set at 5%, for example.
  • step s 3 the plurality of nitride semiconductor layers, including the n-type semiconductor layer 11 etc., are formed on the GaN substrate 10 .
  • a TMG gas and a SiH 4 gas are supplied into the MOCVD apparatus, so as to grow the n-type GaN semiconductor layer 11 on the upper surface 10 a of the GaN substrate 10 .
  • supply of a TMA gas is started so as to grow the n-type Al 0.07 Ga 0.93 N cladding layer 12 on the n-type semiconductor layer 11 .
  • the supply of TMA gas is stopped and the n-type GaN optical guide layer 13 is grown on the n-type cladding layer 12 .
  • the supply of TMG gas and SiH 4 gas is stopped and the temperature in the apparatus is decreased to 700° C.
  • the multiple quantum well active layer 14 is grown on the n-type optical guide layer 13 .
  • TMG gas, TMI gas, and NH 3 gas are supplied to grow an In 0.12 Ga 0.88 N well layer, and TMG gas and NH 3 gas are supplied to grow a GaN barrier layer. This process is repeated to form the multiple quantum well active layer 14 having three pairs of well and barrier layers.
  • the temperature in the apparatus is again raised to 1000° C. with supply of NH 3 gas, and then supply of TMG gas, TMA gas, and CP 2 Mg gas is started, so as to grow the p-type Al 0.2 Ga 0.8 N electron barrier layer 15 on the multiple quantum well active layer 14 .
  • the supply of TMA gas is stopped and the p-type GaN optical guide layer 16 is grown on the p-type electron barrier layer 15 .
  • the supply of TMA gas is restarted, so as to grow the 0.4- ⁇ m-thick p-type Al 0.07 Ga 0.93 N cladding layer 17 on the p-type optical guide layer 16 .
  • the supply of TMA gas is stopped and the 0.1- ⁇ m-thick p-type GaN contact layer 18 is grown on the p-type cladding layer 17 .
  • the supply of TMG gas and CP 2 Mg gas is stopped and the temperature in the apparatus is decreased to room temperature.
  • step s 4 first, resist is applied to the entire wafer surface and a lithography process is performed to form a given resist pattern that corresponds to the shape of the mesa area. Using the resist pattern as a mask, the p-type contact layer 18 and the p-type cladding layer 17 are sequentially etched by, e.g., reactive ion etching (RIE). The ridge portion 51 as an optical waveguide is thus formed.
  • RIE reactive ion etching
  • a chlorine-based gas is used as the etching gas, for example.
  • step s 5 the p-electrode 20 and the n-electrode 19 are formed.
  • a silicon oxide film (SiO 2 film) 52 e.g., 0.2 ⁇ m thick, is formed on the entire wafer surface by CVD, vacuum evaporation, or sputtering, and the portion of the silicon oxide film 52 located on the ridge portion 51 is removed together with the resist pattern. This process is called “lift-off”.
  • An opening 53 for exposure of the ridge portion 51 , is thus formed in the silicon oxide film 52 .
  • a metal film of platinum (Pt) and a metal film of gold (Au) are sequentially formed on the entire wafer surface by, e.g., vacuum evaporation, which is followed by resist application and lithography, and then by wet-etching or dry-etching, so as to form the p-electrode 20 in the opening 53 .
  • a metal film of titanium (Ti) and a metal film of aluminum (Al) are sequentially formed on the entire bottom surface of the GaN substrate 10 by, e.g., vacuum evaporation, and the formed stacked films are etched to form the n-electrode 19 .
  • an alloy process is performed to cause the n-electrode 19 to be in ohmic contact with the GaN substrate 10 .
  • the structure thus formed is processed into bar-shape, e.g., by cleavage, and both resonator facets are formed on the structure. Then, the resonator facets are coated and the bar-shaped structure is separated into chips by, e.g., cleavage.
  • the semiconductor laser shown in FIG. 3 is thus completed.
  • the upper surface 10 a of the GaN substrate 10 has an off-angle ⁇ of 0.1° or more in the ⁇ 1-100> direction with respect to the (0001) plane, which improves the flatness and crystallinity of the n-type semiconductor layer 11 formed on the upper surface 10 a .
  • This improves electric characteristics and reliability of the semiconductor device of the preferred embodiment that is manufactured using the n-type semiconductor layer 11 .
  • FIG. 5 is a diagram showing a relation between the off-angle ⁇ of the upper surface 10 a of the GaN substrate 10 and maximum height difference on the upper surface of the n-type semiconductor layer 11 formed on the upper surface 10 a .
  • the lozenge marks show data obtained when the upper surface 10 a of the GaN substrate 10 had the off-angle ⁇ in the ⁇ 1-100> direction as described in the preferred embodiment
  • the square marks show data obtained when the upper surface 10 a of the GaN substrate 10 had an off-angle ⁇ in the ⁇ 11-20> direction unlike in the preferred embodiment.
  • the lozenge marks and square marks show data obtained in the same ways.
  • the maximum height difference shown on the vertical axis in FIG. 5 indicates values obtained by growing the n-type semiconductor layer 11 to a thickness of 4 ⁇ m and observing the surface of the n-type semiconductor layer 11 in an area of 200 ⁇ m ⁇ 200 ⁇ m by atomic force microscopy (AFM). The same applies to FIGS. 6 and 10 described later.
  • the off-angle ⁇ when the off-angle ⁇ is 0.1° or more, the maximum height difference on the upper surface of the n-type semiconductor layer 11 is greatly reduced and good surface morphology is obtained.
  • the upper surface 10 a of the GaN substrate 10 is inclined in the ⁇ 1-100> direction, the maximum height difference of the n-type semiconductor layer 11 is further reduced when the off-angle ⁇ is 0.25° or more, and the n-type semiconductor layer 11 provides good surface morphology.
  • the off-angle ⁇ becomes larger than 1.0°, the maximum height difference on the upper surface of the n-type semiconductor layer 11 becomes larger as shown in FIG. 5 .
  • step-like structures form along a direction normal to the direction of the off-angle. ⁇ , i.e., along a direction normal to the ⁇ 1-100> direction or the ⁇ 11-20> direction.
  • the step-like structures are reduced when the off-angle ⁇ is 0.25° or more, and then flatter morphology is obtained. In this case, the mean surface roughness of the n-type semiconductor layer 11 is suppressed to 0.5 nm or less.
  • the off-angle ⁇ of the upper surface 10 a of the GaN substrate 10 and its direction greatly affect the surface roughness and crystallinity of the grown layers formed on the upper surface 10 a .
  • the semiconductor laser When the semiconductor laser is formed on the upper surface 10 a of the GaN substrate 10 that is inclined at 0.1° or more in the ⁇ 1-100> direction as shown in the preferred embodiment, the semiconductor laser provides superior flatness and crystallinity and stable device characteristics. The flatness and crystallinity are further improved when the semiconductor laser is formed on the upper surface 10 a of the GaN substrate 10 that is inclined at 0.25° or more in the ⁇ 1-100> direction. The flatness and crystallinity are still further improved when the semiconductor laser is formed on the upper surface 10 a of the GaN substrate 10 that is inclined at 0.3° or more in the ⁇ 1-100> direction.
  • the off-angle ⁇ is set to be not more than 1.0° in the preferred embodiment, which improves the processability in the processing of the GaN substrate 10 for forming the off-angle ⁇ , and which also facilitates formation of the plurality of nitride semiconductor layers stacked over the GaN substrate 10 . This improves the producibility of the semiconductor device employing the GaN substrate 10 .
  • a semiconductor laser has resonator mirrors in (1-100) surfaces, in which case a larger off-angle ⁇ in the ⁇ 1-100> direction causes increased mirror loss. Accordingly, setting the off-angle ⁇ not more than 1.0° is preferable also from the viewpoint of mirror loss reduction of the semiconductor laser.
  • FIG. 6 shows a relation between the off-angle ⁇ 1 and maximum height difference on the upper surface of the n-type semiconductor layer 11 formed on the upper surface 10 a of the GaN substrate 10 , where the upper surface 10 a has an off-angle ⁇ of 0.25° in the ⁇ 1-100> direction and the off-angle ⁇ 1 in the ⁇ 11-20> direction.
  • FIG. 6 shows the structure of a modification of the nitride semiconductor laser of FIG. 2 , where the nitride semiconductor laser employs a GaN substrate 10 having the off-angle ⁇ in the ⁇ 1-100> direction and the off-angle ⁇ 1 in the ⁇ 11-20> direction.
  • FIG. 8 shows a relation between the maximum height difference on the upper surface 10 a of the GaN substrate 10 and thermal processing time, where the GaN substrate 10 was thermally processed in a growth furnace at 1000° C. in a mixed gas atmosphere containing NH 3 gas, N 2 gas, and H 2 gas, or in a mixed gas atmosphere containing NH 3 gas and N 2 gas.
  • FIG. 8 shows the percentage of the H 2 gas in the mixed gas as a parameter.
  • the circular marks in FIG. 8 show data obtained when the partial pressure of the H 2 gas was 0%, i.e., when the mixed gas contains no H 2 gas
  • the square marks, triangle marks, x marks, * marks, and lozenge marks in FIG. 8 show data obtained when the partial pressure of H 2 gas was 5%, 10%, 20%, 30%, and 40%, respectively.
  • the maximum height difference on the vertical axis in FIG. 8 shows values obtained by observing the upper surface 10 a of the GaN substrate 10 by AFM in an area of 10 ⁇ m ⁇ 10 ⁇ m. The same applies to FIG. 9 described later.
  • the roughness on the upper surface 10 a of the GaN substrate 10 is greatly reduced when the thermal process is applied for 5 minutes or more with the partial pressure of H 2 gas of 30% or less.
  • applying the thermal process for 10 minutes or more with the H 2 gas partial pressure of not less than 0% nor more than 10% reduces the roughness on the upper surface 10 a of the GaN substrate 10 to 1 nm or less.
  • nitride semiconductor layers are formed over the upper surface 10 a of the GaN substrate 10 that is inclined at 0.1° or more in the ⁇ 1-100> direction as described in the invention, formation of roughness of 2 nm or more on the upper surface 10 a of the GaN substrate 10 makes it difficult to maximally achieve the flatness and crystal quality improving effects.
  • FIG. 9 shows a relation between the thermal processing temperature and the maximum height difference on the upper surface 10 a of the GaN substrate 10 , where the GaN substrate 10 was thermally processed for 5 minutes in a growth furnace in a mixed gas atmosphere containing NH 3 gas, N 2 gas, and H 2 gas, with the partial pressure of the H 2 gas set at 20%. As shown in FIG.
  • the thermal process exerts strong thermal etching to the substrate surface and so the roughness on the upper surface 10 a of the GaN substrate 10 remains almost unchanged.
  • the flatness of the upper surface 10 a of the GaN substrate 10 is improved by, in the step s 2 , thermally processing the GaN substrate 10 for 5 minutes or more at not less than 800° C. nor more than 1200° C. in an atmosphere of a gas containing NH 3 , or a gas containing NH 3 and H 2 with the H 2 percentage of 30% or less.
  • This also improves the flatness of the nitride semiconductor layer formed over the upper surface 10 a of the GaN substrate 10 , and makes it possible to form a semiconductor device with good electric characteristics by using the nitride semiconductor layer.
  • the flatness of the GaN substrate 10 is certainly improved by setting the thermal processing time not exceeding 30 minutes.
  • the N 2 gas contained in the mixed gas used in the example above functions as a carrier gas and hardly contributes to the improvement of the flatness of the upper surface 10 a of the GaN substrate 10 . Accordingly, the mixed gas does not necessary have to contain N 2 gas.
  • FIG. 10 is a diagram showing a relation between the impurity concentration of the n-type semiconductor layer 11 of the preferred embodiment and the maximum height difference on the upper surface of the n-type semiconductor layer 11 .
  • the impurity concentration of the n-type semiconductor layer 11 is not less than 1 ⁇ 10 16 cm ⁇ 3 nor more than 1 ⁇ 10 20 cm ⁇ 3 , the maximum height difference on its upper surface is small and the n-type semiconductor layer 11 presents more improved surface morphology.
  • the impurity concentration of the n-type semiconductor layer 11 is not less than 1 ⁇ 10 17 cm ⁇ 3 nor more than 1 ⁇ 10 19 cm ⁇ 3 , the maximum height difference on its upper surface is smaller than 10 nm and the n-type semiconductor layer 11 presents more improved surface morphology.
  • the impurity concentration of the n-type semiconductor layer 11 is not less than 1 ⁇ 10 17 cm ⁇ 3 nor more than 5 ⁇ 10 18 cm ⁇ 3 , the maximum height difference on its upper surface is still smaller and the n-type semiconductor layer 11 presents still more improved surface morphology.
  • the present invention is applicable to other semiconductor light emitting devices as well as to semiconductor lasers, and also to other electronic devices.
  • the present invention enables formation of a nitride semiconductor layer with good flatness and good crystallinity on a GaN substrate.
  • the “crystallinity” herein means electric and optical characteristics of the crystal that result from the regularity of arrangement of atoms of the crystal, i.e., the structural regularity of the crystal.
  • the structural regularity is not ensured in a nitride semiconductor layer, abnormal structures independent of the flatness of the GaN substrate form in the nitride semiconductor layer. Such abnormal structures are roughly classified into irregular roughness on the surface of the nitride semiconductor layer, and surface configurations, called “hillocks”, that have regularity reflecting the crystallographic symmetricalness of the substrate.
  • Hillocks are substantially regarded as a kind of facets.
  • the irregular roughness is formed because of insufficient surface migration of Group III atoms during crystal growth. Insufficient surface migration reduces the possibility that Group III atoms are positioned in the sites where Group III atoms should originally be positioned crystallographically.
  • This deteriorates characteristics defined by microscopic structures on the atomic scale. Specifically, as for the electric characteristics, lattice defects such as vacancies and interstitial atoms reduce carrier mobility defined by carrier scattering possibility. Also, the optical characteristic is deteriorated because of formation of radiative recombination centers due to impurities.
  • formation of facets induces microscopic anisotropy of the surface migration of Group III atoms. This causes spatial variations in thickness of the multiple quantum well active layer of the semiconductor laser. The variations, even on the nanometer scale, significantly affects the emission wavelength.

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US8472491B2 (en) 2009-01-06 2013-06-25 Panasonic Corporation Semiconductor laser device
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