TWI830206B - 矽前驅物化合物及形成含矽膜之方法 - Google Patents

矽前驅物化合物及形成含矽膜之方法 Download PDF

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TWI830206B
TWI830206B TW111115213A TW111115213A TWI830206B TW I830206 B TWI830206 B TW I830206B TW 111115213 A TW111115213 A TW 111115213A TW 111115213 A TW111115213 A TW 111115213A TW I830206 B TWI830206 B TW I830206B
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silicon
plasma
vapor deposition
deposition conditions
containing film
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趙誠實
金多慧
金煥洙
李銖眞
布萊恩 漢迪克斯
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美商恩特葛瑞斯股份有限公司
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Abstract

本發明提供適用於在半導體裝置製造中形成含矽膜之某些矽前驅物化合物，且更具體言之用於形成此類含矽膜，諸如包含二氧化矽之膜的組合物及方法。

Description

矽前驅物化合物及形成含矽膜之方法
一般而言，本發明係關於用於將含矽膜沈積至微電子裝置表面上的方法及前驅物。
在半導體製造中，具有化學惰性介電材料，諸如氮化矽(Si 3N 4)、氮氧化矽(SiO xN y)、碳化矽(SiC)、碳氮化矽(SiCN)及碳氧化矽(SiCO)及/或二氧化矽(SiO 2)之薄(例如，＜1000奈米厚度)的被動層廣泛用於微電子裝置結構中，以充當多層裝置之結構元件，諸如側壁隔板元件、擴散遮罩、氧化障壁、溝槽隔離塗層(trench isolation coating)、金屬間介電材料、鈍化層、絕緣體及蝕刻停止層。
藉由化學氣相沈積技術沈積含矽膜為極具吸引力的形成此類膜之方法。涉及低沈積溫度的CVD製程為尤其所要的，例如低於約450℃之溫度，但需要可用於此類目的之合適的矽前驅物化合物。在一些情況下，當積體電路之熱預算將允許時，可考慮較高沈積溫度。在此等情況下，可利用＞450℃的溫度來獲得所要介電膜。因此，需要可在此類較高溫度下利用之用於形成含矽膜的前驅物。特定言之，需要具有良好熱穩定性、高揮發性及與基板表面具反應性之液態矽前驅物。
本發明大體上係關於在半導體裝置之製造中形成含矽膜，且更具體言之係關於用於形成此類含矽膜的組合物及方法。在一個特定實施例中，發現前驅物參(二甲基矽基)甲烷適用於使用臭氧作為氧化氣體在600℃下形成高純度及高生長速率(亦即約1.7Å/循環)的二氧化矽膜(參見圖1)。此外，如圖3中所表示之資料所示，由此前驅物產生之膜的濕式蝕刻速率(wet etch rate, WER)相比於利用BTBAS與臭氧形成之所得二氧化矽膜改善約77%。另外，當與熱氧化物相比時，使用本發明之前驅物化合物結合臭氧形成的氧化矽膜展現一濕式蝕刻速率(200:1稀HF)，其小於熱生長氧化矽之濕式蝕刻速率的約3倍。發現參(二甲基矽基)甲烷(TDMSM)在高於600℃之溫度下為熱穩定的，因此使其適用於需要高純度二氧化矽膜之相對高溫的原子層沈積製程。
如本說明書及所附申請專利範圍中所使用，除非文中內容另外明確指示，否則單數形式「一(a/an)」及「該」包括複數個提及物。如本說明書及隨附申請專利範圍中所使用，除非文中內容另外明確指示，否則術語「或」一般以其包括「及/或」之意義採用。
術語「約」一般係指被認為等效於所列舉值(例如具有相同功能或結果)之數值範圍。在許多情況下，術語「約」可包括經四捨五入至最接近之有效數的數值。
使用端點表示之數值範圍包括該範圍內包涵之所有數字(例如1至5包括1、1.5、2、2.75、3、3.80、4及5)。
在第一態樣中，本發明提供一種在微電子裝置之表面上在反應區中形成含矽膜的方法，其包含在氣相沈積條件下將至少一種以下式(I)化合物引入至該反應區： ， 其中各R 1及各R 2獨立地選自氫及C 1-C 10烷基。C 1-C 10烷基的實例包括甲基、乙基、正丙基、正丁基及其類似基團。
在一個實施例中，各R 1為氫且各R 2為甲基；在此實施例中，式(I)化合物具有以下結構： ， 在本文中藉由縮寫「TDMSM」提及。
在其他實施例中，各R 2為乙基，各R 2為正丙基，各R 2為正丁基，或各R 2係獨立地選自甲基、乙基、正丙基或正丁基。
式(I)化合物適用作含矽膜及尤其微電子裝置表面上之膜的氣相沈積中的前驅物。在某些實施例中，膜亦含有氮及/或氧及/或碳。
如本文中所使用，術語「含矽膜」係指膜，諸如二氧化矽、氮化矽、氮氧化矽、碳化矽、碳氮化矽、碳氮氧化矽、低k薄含矽膜、高k閘極矽酸鹽膜及低溫矽磊晶膜。
在某些實施例中，氣相沈積條件包含稱為化學氣相沈積、脈衝-化學氣相沈積及原子層沈積之反應條件。就脈衝-化學氣相沈積而言，在具有或不具有中間物(惰性氣體)吹掃步驟之情況下，一系列交替的前驅物化合物及共反應物的脈衝可用於累積膜厚度至所要終點。
在某些實施例中，上文所描繪之前驅物化合物之脈衝時間(亦即，前驅物暴露於基板之持續時間)在約1秒與30秒之間的範圍內。當利用吹掃步驟時，持續時間為約1至20秒或1至30秒。在其他實施例中，共反應物的脈衝時間在5秒至60秒範圍內。
在一個實施例中，氣相沈積條件包含約100℃至約1000℃，諸如約450℃至約1000℃之溫度，及約0.5至約1000托之壓力。在另一實施例中，氣相沈積條件包含約100℃至約800℃，諸如約500℃至約750℃之溫度。
以上化合物可用於藉由任何適合的氣相沈積技術，諸如化學氣相沈積(CVD)、數位(脈衝)CVD、原子層沈積(ALD)、脈衝電漿製程、電漿增強型循環化學氣相沈積(PECCVD)、可流動化學氣相沈積(FCVD)或電漿增強型ALD類製程來形成高純度的薄含矽膜。此類氣相沈積製程可用於在微電子裝置上形成含矽膜以形成具有約20埃至約2000埃之厚度的膜。
在本發明之方法中，上述化合物可以任何適合方式與所要微電子裝置基板反應，例如在單晶圓CVD、ALD及/或PECVD或PEALD腔室中，或在含有多個晶圓之鍋爐中反應。
替代地，本發明之製程可作為ALD或ALD類製程進行。如本文中所使用，術語「ALD或ALD類」係指諸如以下之製程：(i)將包括式(I)之矽前驅物化合物以及氧化及/或還原氣體的各反應物依序引入至反應器，諸如單晶圓ALD反應器、半分批式ALD反應器或分批式鍋爐(batch furnace) ALD反應器中，或(ii)藉由將基板移動或旋轉至反應器之不同部分使包括式(I)之矽前驅物化合物以及氧化及/或還原氣體之各反應物暴露於基板或微電子裝置表面，且各部分藉由惰性氣體簾幕(inert gas curtain)，亦即空間ALD反應器或輥對輥ALD反應器分離。
一般而言，使用式(I)之前驅物化合物產生之所要膜可藉由選擇各化合物與利用還原或氧化共反應物結合來調適。參見例如以下流程1，其說明式(I)之前驅物可如何用於氣相沈積製程中： 流程1
在一個實施例中，氣相沈積製程可進一步包含涉及將前驅物暴露於氣體的步驟，該氣體諸如H 2、H 2電漿、H 2/O 2混合物、水、N 2O、N 2O電漿、NH 3、NH 3電漿、N 2或N 2電漿。例如，可使用氧化氣體，諸如O 2、O 3、N 2O、水蒸氣、醇或氧電漿。在一個實施例中，在具有O 3作為氧化氣體之ALD製程中利用前驅物TDMSM。在某些實施例中，氧化氣體進一步包含惰性氣體，諸如氬氣、氦氣、氮氣或其組合。在另一實施例中，氧化氣體進一步包含氮氣，其可在電漿條件下與式(I)之前驅物反應以形成氮氧化矽膜。
在一個實施例中，本發明係關於一種使用臭氧作為氧化氣體來沈積低濕式蝕刻速率的二氧化矽膜之高溫熱原子層沈積(ALD)製程。
在另一實施例中，以上氣相沈積製程可進一步包含涉及將膜暴露於還原氣體的步驟。在本發明之某些實施例中，還原氣體包含選自H 2、肼(N 2H 4)、甲基肼、三級丁基肼、1,1-二甲基肼、1,2-二甲基肼及NH 3之氣體。
式(I)化合物能夠經低溫PECVD及/或PEALD形成含矽膜以及高溫ALD。此類化合物展現高揮發性及化學反應性，但在涉及前驅物之揮發或汽化的溫度下對於熱降解為穩定的，從而允許所得前驅物蒸氣持續且反覆地輸送至沈積區或反應腔室。就此而言，已發現，意外地TDMSM在超過600℃之溫度下穩定且另外TDMSM直至約650℃才展現出熱降解。式(I)化合物之化學反應性允許在低溫下利用PEALD技術使膜生長，在該等低溫下，諸如TEOS之傳統矽前驅物材料為惰性的且因此展現極少沈積行為或不展現沈積行為。另外，如上文所指出，圖3以圖形方式說明本發明之例示性式(I)化合物(亦即，TDMSM)的濕式蝕刻性能相比於已知矽前驅物BTBAS(雙(三級-丁基胺基)矽烷)之性能得到極大改良。
因此，在另一實施例中，本發明提供如上文所闡述之本發明的方法，其中含矽膜為二氧化矽，且其中由此形成之二氧化矽膜展現一濕式蝕刻速率，其與用BTBAS及臭氧沈積之SiO 2的濕式蝕刻速率相比改善至少約70%。如上文所指出，當與熱氧化物相比時，使用本發明之前驅物化合物與臭氧結合形成的氧化矽膜展現一濕式蝕刻速率(200:1稀HF)，其小於熱生長氧化矽之濕式蝕刻速率的約3倍。因此，在另一態樣中，本發明提供一種氧化矽膜，其200:1稀氟化氫溶液的濕式蝕刻速率小於熱生長氧化矽之蝕刻速率的約3倍。
當使用式(I)之前驅物化合物時，可藉由利用共反應物(諸如呈例如甲烷、乙烷、乙烯或乙炔形式之碳)以例如進一步將碳含量引入至含矽膜中，從而產生碳化矽來實現將碳及氮併入至此類膜中。類似地，可藉由利用含氮還原氣體引入氮氣。
本文中所揭示之沈積方法可涉及一或多種吹掃氣體。用於掃除未消耗之反應物及/或反應副產物的吹掃氣體為不與前驅物反應的惰性氣體。例示性吹掃氣體包括但不限於氬氣、氮氣、氦氣、氖氣、氫氣及其混合物。在某些實施例中，諸如Ar之吹掃氣體以約10至約2000 sccm範圍內之流動速率供應至反應器中持續約0.1至1000秒，藉此吹掃未反應之材料及可能殘留在反應器中之任何副產物。
供應矽前驅物化合物、氧化氣體、還原氣體及/或其他前驅物、源氣體及/或試劑的各別步驟可藉由改變供應其之順序及/或改變所得介電膜之化學計量組成來進行。
將能量施加至式(I)之矽前驅物化合物及氧化氣體、還原氣體或其組合中之至少一者，以誘導反應且在微電子裝置基板上形成含矽膜。此類能量可由以下(但不限於以下)方法提供：熱、脈衝熱、電漿、脈衝電漿、螺旋波電漿、高密度電漿、感應耦合式電漿、X射線、電子束、光子、遠程電漿方法及其組合。在某些實施例中，次級RF頻率源(secondary RF frequency source)可用以修改基板表面處之電漿特性。在其中沈積涉及電漿之實施例中，電漿產生製程可包含直接電漿產生製程，其中在反應器中直接產生電漿；或替代地，包含遠程電漿產生製程，其中在反應區及基板『遠端(remotely)』產生電漿，該電漿供應至反應器中。
如本文所使用，術語「微電子裝置」對應於經製造用於微電子、積體電路或電腦晶片應用的半導體基板，包括3D NAND結構、平板顯示器及微機電系統(MEMS)。應理解，術語「微電子裝置」不意謂以任何方式為限制性的且包括任何基板，該任何基板包括負通道金屬氧化物半導體(negative channel metal oxide semiconductor，nMOS)及/或正通道金屬氧化物半導體(positive channel metal oxide semiconductor，pMOS)電晶體且最終將成為微電子裝置或微電子總成。此類微電子裝置含有至少一種基板，其可以選自，例如矽、SiO 2、Si 3N 4、OSG、FSG、碳化矽、氫化碳化矽、氮化矽、氫化氮化矽、碳氮化矽、氫化碳氮化矽、氮化硼(boronitride)、抗反射塗層、光阻、鍺、含鍺、含硼、Ga/As、可撓性基板、多孔無機材料、金屬(諸如銅及鋁)及擴散障壁層，諸如但不限於TiN、Ti(C)N、TaN、Ta(C)N、Ta、W或WN。該等膜與多種後續加工步驟，例如化學機械平坦化(CMP)及異向性蝕刻製程相容。
式(I)化合物可藉由在鎂存在下使三溴甲烷(tribromomethane)與氯二甲基矽烷反應製備。藉助於實例，以下流程2說明式(I)化合物(亦即TDMSM)之合成，其中各R 1為氫且各R 2為甲基： 流程2
本發明可藉由其某些實施例之以下實例進一步說明，但將理解，除非另外具體指示，否則此等實例僅出於說明之目的而包括在內且不意欲限制本發明之範疇。 實例 實例 1 - TDMSM 合成將氯甲基矽烷(80 g，0.85莫耳)、溴仿(71.16 g，0.28莫耳)及鎂(20.55 g，0.85莫耳)置於1 L 3頸圓底燒瓶中。使反應混合物在室溫下反應。由於在反應期間會產生熱量，在反應結束之後使反應混合物之溫度冷卻至室溫。在53℃下在9托下藉由簡單蒸餾來純化產物以得到呈無色液體狀的最終產物(13 g，24%)。 實例 2 - 使用 TDMSM 與 作為氧化氣體之臭氧的氣相沈積通用程序
用在25℃至40℃下置於鼓泡器中的參(二甲基矽基)甲烷沈積氧化矽膜。使用雙重噴頭ALD反應器以用臭氧反應物將氧化矽膜沈積於450℃至650℃的矽晶圓上，該溫度為藉由熱電偶(TC)晶圓校準之晶圓溫度，且將反應器壓力控制在0.5至2.0托下。氧化矽沈積之後為21至28秒矽脈衝、15至40秒Ar吹掃、30秒臭氧脈衝及15至40秒Ar吹掃；且此循環重複150個循環，以得到250 Å之膜厚度。在膜中無碳及氯雜質之情況下，反應器在650℃下以約1.8 Å/循環飽和。3種不同晶圓溫度之資料闡述於下表1中。
表 1
晶圓溫度(℃) 前驅物劑量(sccm) 臭氧劑量(sccm) 生長速率(Å/循環) 折射率
590 21 30 1.69 1.46
600 21 30 1.64 1.45
650 21 30 1.86 1.43
實例 3 - 用於量測 TDSM 之濕式蝕刻速率 ( WER ) 的方法本文中所利用之濕式蝕刻量測製程使用49%氫氟酸(0.25 wt% dHF)的200:1溶液。將熱氧化物層用作參考；通常熱氧化物之針對0.25 wt% dHF的濕式蝕刻速率(WER)為約0.23 Å/秒。使用稀HF蝕刻製程蝕刻氧化矽層60秒，根據在濕式蝕刻之前及之後的厚度變化估計WER。圖3說明在不同晶圓溫度下藉由TDSM及臭氧以及BTBAS及臭氧沈積的氧化矽膜相對於熱氧化物的相對WER。
本發明已特定參考其某些實施例來詳細描述，但應理解，可在本發明之精神及範疇內實現變化及修改。
圖1為利用臭氧作為氧化氣體，生長速率(Å/循環)相對於以秒為單位之前驅物脈衝時間的曲線圖，其中本發明之例示性式(I)化合物(亦即，TDMSM)利用臭氧作為氧化氣體。作為對比，圖1中亦表示雙(三級丁基胺基)矽烷(BTBAS)之性能。
圖2說明當基板溫度自590℃變化至650℃時，ALD二氧化矽沈積製程之生長速率/循環。三角形點代表飽和曲線且圓形點代表折射率。在此實驗中，利用流動速率為1000 sccm之O 3。所用脈衝沈積循環順序為(i)使用前驅物持續21秒，(ii)吹掃15秒，(ⅲ)使用臭氧持續30秒，及(iv)吹掃15秒。
圖3為使用熱氧化物作為正規化基準=1之濕式蝕刻速率比較(200:1稀HF)。此圖說明本發明之例示性式(I)化合物，亦即TDMSM相比於已知矽前驅物BTBAS (雙(三級-丁基胺基)矽烷)的濕式蝕刻性能得到極大改良。
圖4為利用TDMSM及臭氧形成之SiO 2膜的原子百分比曲線。此資料說明SiO 2膜中不存在可量測數量之碳或氯。

Claims (10)

  1. 一種用於在微電子裝置之表面上在反應區中形成含矽膜的方法，其包含在氣相沈積條件下將至少一種以下式(I)化合物引入至該反應區：
    Figure 111115213-A0305-02-0013-1
     其中各R1及各R2獨立地選自氫及C1-C10烷基，及該含矽膜包含二氧化矽。
  2. 如請求項1之方法，其中該等氣相沈積條件係選自化學氣相沈積(CVD)、原子層沈積(ALD)、電漿增強型ALD(PEALD)、電漿增強型循環化學氣相沈積(PECCVD)、可流動化學氣相沈積(FCVD)或電漿增強型ALD類製程。
  3. 如請求項1之方法，其中該含矽膜進一步包含氮化矽、氮氧化矽、碳化矽、碳氮化矽、碳氮氧化矽、低k薄含矽膜、高k閘極矽酸鹽膜或低溫矽磊晶膜。
  4. 如請求項1之方法，其中該表面係選自二氧化矽、氮化矽、氧化鋁、氮化鋁、鋁、鎢、銅、鈷、鉬、釕、矽晶圓或其組合。
  5. 如請求項1之方法，其中該等氣相沈積條件包含在約100℃至約1000℃之溫度下的原子層沈積條件。
  6. 如請求項1之方法，其中該等氣相沈積條件包含選自H2、H2電漿、H2/O2混合物、水、N2O、N2O電漿、NH3、NH3電漿、N2或N2電漿的氣體。
  7. 如請求項1之方法，其中該等氣相沈積條件包含具有選自氧、氧電漿及臭氧之氧化氣體的原子層沈積條件。
  8. 如請求項1之方法，其中該氧化氣體為臭氧。
  9. 如請求項1之方法，其中該式(I)化合物具有下式：
    Figure 111115213-A0305-02-0014-2
  10. 一種含矽膜，其200：1稀氟化氫溶液的濕式蝕刻速率小於熱生長氧化矽之蝕刻速率的約3倍，其中該含矽膜包含二氧化矽。
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