CN117425745A - 硅前体化合物和形成含硅膜的方法 - Google Patents

硅前体化合物和形成含硅膜的方法 Download PDF

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CN117425745A
CN117425745A CN202280034968.9A CN202280034968A CN117425745A CN 117425745 A CN117425745 A CN 117425745A CN 202280034968 A CN202280034968 A CN 202280034968A CN 117425745 A CN117425745 A CN 117425745A
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silicon
vapor deposition
deposition conditions
plasma
films
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赵诚实
金多慧
金焕洙
李铢眞
B·C·亨德里克斯
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Entegris Inc
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Abstract

提供适用于在半导体装置制造中形成含硅膜的某些硅前体化合物，且更具体来说提供用于形成此类含硅膜、如包含二氧化硅的膜的组合物和方法。

Description

硅前体化合物和形成含硅膜的方法
技术领域
一般来说，本发明涉及用于将含硅膜沉积至微电子装置表面上的方法和前体。
背景技术
在半导体制造中，具有化学惰性介电材料，如氮化硅(Si3N4)、氮氧化硅(SiOxNy)、碳化硅(SiC)、碳氮化硅(SiCN)和碳氧化硅(SiCO)和/或二氧化硅(SiO2)的薄(例如，<1000纳米厚度)的被动层广泛用于微电子装置结构中，以充当多层装置的结构元件，如侧壁隔板元件、扩散掩模、氧化阻挡物、沟槽隔离涂层(trench isolation coating)、金属间介电材料、钝化层、绝缘体和蚀刻停止层。
通过化学气相沉积技术沉积含硅膜为极具吸引力的形成此类膜的方法。涉及低沉积温度的CVD工艺为尤其所要的，例如低于约450℃的温度，但需要可用于此类目的的合适的硅前体化合物。在一些情况下，当集成电路的热预算将允许时，可考虑较高沉积温度。在这些情况下，可利用>450℃的温度来获得所要介电膜。因此，需要可在此类较高温度下利用的用于形成含硅膜的前体。特定来说，需要具有良好热稳定性、高挥发性和与衬底表面具反应性的液态硅前体。
发明内容
本发明大体上涉及在半导体装置的制造中形成含硅膜，且更具体来说涉及用于形成此类含硅膜的组合物和方法。在一个特定实施例中，发现前体三(二甲基硅基)甲烷适用于使用臭氧作为氧化气体在600℃下形成高纯度和高生长速率(即约/循环)的二氧化硅膜(参见图1)。此外，依图3中所表示的数据所示，由此前体产生的膜的湿式蚀刻速率(wetetch rate,WER)相比于利用BTBAS与臭氧形成的所得二氧化硅膜改善约77％。另外，当与热氧化物相比时，使用本发明的前体化合物结合臭氧形成的氧化硅膜展现一湿式蚀刻速率(200:1稀HF)，其小于热生长氧化硅的湿式蚀刻速率的约3倍。发现三(二甲基硅基)甲烷(TDMSM)在高于600℃的温度下为热稳定的，因此使其适用于需要高纯度二氧化硅膜的相对高温的原子层沉积工艺。
附图说明
图1为利用臭氧作为氧化气体，生长速率(/循环)相对于以秒为单位的前体脉冲时间的曲线图，其中本发明的示范性式(I)化合物(即，TDMSM)利用臭氧作为氧化气体。作为对比，图1中还表示双(叔丁基氨基)硅烷(BTBAS)的性能。
图2说明当衬底温度从590℃变化至650℃时，ALD二氧化硅沉积工艺的生长速率/循环。圆形点代表饱和曲线且三角形点代表折射率。在此实验中，利用流动速率为1000sccm的O3。所用脉冲沉积循环顺序为(i)使用前体持续21秒，(ii)吹扫15秒，(ⅲ)使用臭氧持续30秒，和(iv)吹扫15秒。
图3为使用热氧化物作为标准化基准＝1的湿式蚀刻速率比较(200:1稀HF)。此图说明本发明的示范性式(I)化合物，即TDMSM相比于已知硅前体BTBAS(双(叔-丁基氨基)硅烷)的湿式蚀刻性能得到极大改进。
图4为利用TDMSM和臭氧形成的SiO2膜的原子百分比曲线。此数据说明SiO2膜中不存在可测量数量的碳或氯。
具体实施方式
如本说明书和所附权利要求书中所使用，除非文中内容另外明确指示，否则单数形式“一(a/an)”和“所述”包括多个提及物。如本说明书和所附权利要求书中所使用，除非文中内容另外明确指示，否则术语“或”一般以其包括“和/或”的意义采用。
术语“约”一般是指被认为等效于所列举值(例如具有相同功能或结果)的数值范围。在许多情况下，术语“约”可包括经四舍五入至最接近的有效数的数值。
使用端点表示的数值范围包括所述范围内包涵的所有数字(例如1至5包括1、1.5、2、2.75、3、3.80、4和5)。
在第一方面，本发明提供一种在微电子装置的表面上在反应区中形成含硅膜的方法，其包含在气相沉积条件下将至少一种以下式(I)化合物引入至所述反应区：
其中每个R1和每个R2独立地选自氢和C1-C10烷基。C1-C10烷基的实例包括甲基、乙基、正丙基、正丁基等。
在一个实施例中，每个R1为氢且每个R2为甲基；在此实施例中，式(I)化合物具有以下结构：
在本文中通过缩写“TDMSM”提及。
在其它实施例中，每个R2为乙基，每个R2为正丙基，每个R2为正丁基，或每个R2独立地选自甲基、乙基、正丙基或正丁基。
式(I)化合物适用作含硅膜和尤其微电子装置表面上的膜的气相沉积中的前体。在某些实施例中，膜还含有氮和/或氧和/或碳。
依本文中所使用，术语“含硅膜”是指膜，如二氧化硅、氮化硅、氮氧化硅、碳化硅、碳氮化硅、碳氮氧化硅、低k薄含硅膜、高k栅极硅酸盐膜和低温硅外延膜。
在某些实施例中，气相沉积条件包含称为化学气相沉积、脉冲-化学气相沉积和原子层沉积的反应条件。就脉冲-化学气相沉积来说，在具有或不具有中间物(惰性气体)吹扫步骤的情况下，一系列交替的前体化合物和共反应物的脉冲可用于累积膜厚度至所要终点。
在某些实施例中，上文所描绘的前体化合物的脉冲时间(即，前体暴露于衬底的持续时间)在约1秒与30秒之间的范围内。当利用吹扫步骤时，持续时间为约1至20秒或1至30秒。在其它实施例中，共反应物的脉冲时间在5秒至60秒范围内。
在一个实施例中，气相沉积条件包含约100℃至约1000℃(如约450℃至约1000℃)的温度和约0.5至约1000托的压力。在另一实施例中，气相沉积条件包含约100℃至约800℃(如约500℃至约750℃)的温度。
以上化合物可用于通过任何适合的气相沉积技术(如化学气相沉积(CVD)、数字(脉冲)CVD、原子层沉积(ALD)、脉冲等离子体工艺、等离子体增强型循环化学气相沉积(PECCVD)、可流动化学气相沉积(FCVD)或等离子体增强型ALD类工艺)来形成高纯度的薄含硅膜。此类气相沉积工艺可用于在微电子装置上形成含硅膜以形成具有约20埃至约2000埃的厚度的膜。
在本发明的方法中，上述化合物可以任何适合方式与所要微电子装置衬底反应，例如在单晶片CVD、ALD和/或PECVD或PEALD腔室中或在含有多个晶片的锅炉中反应。
替代地，本发明的工艺可作为ALD或ALD类工艺进行。依本文中所使用，术语“ALD或ALD类”是指如以下工艺：(i)将包括式(I)的硅前体化合物以及氧化和/或还原气体的每一反应物依序引入反应器(如单晶片ALD反应器、半分批式ALD反应器或分批式锅炉(batchfurnace)ALD反应器)中，或(ii)通过将衬底移动或旋转至反应器的不同部分使包括式(I)的硅前体化合物以及氧化和/或还原气体的每一反应物暴露于衬底或微电子装置表面，且每个部分通过惰性气体帘幕(inert gas curtain)(即空间ALD反应器或辊对辊ALD反应器)分离。
一般来说，使用式(I)的前体化合物产生的所要膜可通过选择每个化合物与利用还原或氧化共反应物结合来调适。参见例如以下流程1，其说明式(I)的前体可如何用于气相沉积工艺中：
在一个实施例中，气相沉积工艺可进一步包含涉及将前体暴露于气体的步骤，所述气体如H2、H2等离子体、H2/O2混合物、水、N2O、N2O等离子体、NH3、NH3等离子体、N2或N2等离子体。例如，可使用氧化气体，如O2、O3、N2O、水蒸气、醇或氧等离子体。在一个实施例中，在具有O3作为氧化气体的ALD工艺中利用前体TDMSM。在某些实施例中，氧化气体进一步包含惰性气体，如氩气、氦气、氮气或其组合。在另一实施例中，氧化气体进一步包含氮气，其可在等离子体条件下与式(I)的前体反应以形成氮氧化硅膜。
在一个实施例中，本发明涉及一种使用臭氧作为氧化气体来沉积低湿式蚀刻速率的二氧化硅膜的高温热原子层沉积(ALD)工艺。
在另一实施例中，以上气相沉积工艺可进一步包含涉及将膜暴露于还原气体的步骤。在本发明的某些实施例中，还原气体包含选自H2、肼(N2H4)、甲基肼、叔丁基肼、1,1-二甲基肼、1,2-二甲基肼和NH3的气体。
式(I)化合物能够经低温PECVD和/或PEALD形成含硅膜以及高温ALD。此类化合物展现高挥发性和化学反应性，但在涉及前体的挥发或汽化的温度下对于热降解为稳定的，从而允许所得前体蒸气持续且反复地输送至沉积区或反应腔室。就此来说，已发现，意外地TDMSM在超过600℃的温度下稳定且另外TDMSM直至约650℃才展现出热降解。式(I)化合物的化学反应性允许在低温下利用PEALD技术使膜生长，在所述低温下，如TEOS的传统硅前体材料为惰性的且因此展现极少沉积行为或不展现沉积行为。另外，依上文所指出，图3以图形方式说明本发明的示范性式(I)化合物(即，TDMSM)的湿式蚀刻性能相比于已知硅前体BTBAS(双(叔-丁基氨基)硅烷)的性能得到极大改进。
因此，在另一实施例中，本发明提供如上文所阐述的本发明的方法，其中含硅膜为二氧化硅，且其中由此形成的二氧化硅膜展现一湿式蚀刻速率，其与用BTBAS和臭氧沉积的SiO2的湿式蚀刻速率相比改善至少约70％。依上文所指出，当与热氧化物相比时，使用本发明的前体化合物与臭氧结合形成的氧化硅膜展现一湿式蚀刻速率(200:1稀HF)，其小于热生长氧化硅的湿式蚀刻速率的约3倍。因此，在另一方面，本发明提供一种氧化硅膜，其200:1稀氟化氢溶液的湿式蚀刻速率小于热生长氧化硅的蚀刻速率的约3倍。
当使用式(I)的前体化合物时，可通过利用共反应物(如呈例如甲烷、乙烷、乙烯或乙炔形式的碳)以例如进一步将碳含量引入至含硅膜中，从而产生碳化硅来实现将碳和氮并入至此类膜中。类似地，可通过利用含氮还原气体引入氮气。
本文中所公开的沉积方法可涉及一或多种吹扫气体。用于扫除未消耗的反应物和/或反应副产物的吹扫气体为不与前体反应的惰性气体。示范性吹扫气体包括但不限于氩气、氮气、氦气、氖气、氢气和其混合物。在某些实施例中，如Ar的吹扫气体以约10至约2000sccm范围内的流动速率供应至反应器中持续约0.1至1000秒，借此吹扫未反应的材料和可能残留在反应器中的任何副产物。
供应硅前体化合物、氧化气体、还原气体和/或其它前体、源气体和/或试剂的对应步骤可通过改变供应其的顺序和/或改变所得介电膜的化学计量组成来进行。
将能量施加至式(I)的硅前体化合物和氧化气体、还原气体或其组合中的至少一者，以诱导反应且在微电子装置衬底上形成含硅膜。此类能量可由以下(但不限于以下)方法提供：热、脉冲热、等离子体、脉冲等离子体、螺旋波等离子体、高密度等离子体、感应耦合式等离子体、X射线、电子束、光子、远程等离子体方法和其组合。在某些实施例中，次级RF频率源(secondary RF frequency source)可用以修改衬底表面处的等离子体特性。在其中沉积涉及等离子体的实施例中，等离子体产生工艺可包含直接等离子体产生工艺，其中在反应器中直接产生等离子体；或替代地，包含远程等离子体产生工艺，其中在反应区和衬底‘远程(remotely)’产生等离子体，所述等离子体被供应至反应器中。
依本文所使用，术语“微电子装置”对应于经制造用于微电子、集成电路或计算机芯片应用的半导体衬底，包括3D NAND结构、平板显示器和微机电系统(MEMS)。应理解，术语“微电子装置”不意谓以任何方式为限制性的且包括任何衬底，所述任何衬底包括负通道金属氧化物半导体(negative channel metal oxide semiconductor，nMOS)和/或正通道金属氧化物半导体(positive channel metal oxide semiconductor，pMOS)晶体管且最终将成为微电子装置或微电子组合件。此类微电子装置含有至少一种衬底，其可以选自例如硅、SiO2、Si3N4、OSG、FSG、碳化硅、氢化碳化硅、氮化硅、氢化氮化硅、碳氮化硅、氢化碳氮化硅、氮化硼、抗反射涂层、光阻剂、锗、含锗物、含硼物、Ga/As、柔性衬底、多孔无机材料、金属(如铜和铝)和扩散阻挡层，如但不限于TiN、Ti(C)N、TaN、Ta(C)N、Ta、W或WN。所述膜与多种后续加工步骤(例如化学机械平坦化(CMP)和各向异性蚀刻工艺)相容。
式(I)化合物可通过在镁存在下使三溴甲烷(tribromomethane)与氯二甲基硅烷反应制备。借助于实例，以下流程2说明式(I)化合物(即TDMSM)的合成，其中每个R1为氢且每个R2为甲基：
本发明可通过其某些实施例的以下实例进一步说明，但将理解，除非另外具体指示，否则这些实例仅出于说明的目的而包括在内且不打算限制本发明的范围。
实例
实例1-TDMSM合成
将氯甲基硅烷(80g，0.85摩尔)、溴仿(71.16g，0.28摩尔)和镁(20.55g，0.85摩尔)置于1L 3颈圆底烧瓶中。使反应混合物在室温下反应。由于在反应期间会产生热量，在反应结束之后使反应混合物的温度冷却至室温。在53℃下在9托下通过简单蒸馏来纯化产物以得到呈无色液体状的最终产物(13g，24％)。
实例2-使用TDMSM与作为氧化气体的臭氧的气相沉积通用程序
用在25℃至40℃下置于鼓泡器中的三(二甲基硅基)甲烷沉积氧化硅膜。使用双重喷头ALD反应器以用臭氧反应物将氧化硅膜沉积于450℃至650℃的硅晶片上，所述温度为通过热电偶(TC)晶片校准的晶片温度，且将反应器压力控制在0.5至2.0托下。氧化硅沉积之后为21至28秒硅脉冲、15至40秒Ar吹扫、30秒臭氧脉冲和15至40秒Ar吹扫；且此循环重复150个循环，以得到的膜厚度。在膜中无碳和氯杂质的情况下，反应器在650℃下以约/循环饱和。3种不同晶片温度的数据阐述于下表1中。
表1
实例3-用于测量TDSM的湿式蚀刻速率(WER)的方法
本文中所利用的湿式蚀刻测量工艺使用49％氢氟酸(0.25wt％dHF)的200:1溶液。将热氧化物层用作参考；通常热氧化物的针对0.25wt％dHF的湿式蚀刻速率(WER)为约/秒。使用稀HF蚀刻工艺蚀刻氧化硅层60秒，根据在湿式蚀刻之前和之后的厚度变化估计WER。图3说明在不同晶片温度下通过TDSM和臭氧以及BTBAS和臭氧沉积的氧化硅膜相对于热氧化物的相对WER。
本发明已特定参考其某些实施例来详细描述，但应理解，可在本发明的精神和范围内实现变化和修改。

Claims (13)

1.一种用于在微电子装置的表面上在反应区中形成含硅膜的方法，其包含在气相沉积条件下将至少一种以下式(I)化合物引入所述反应区：
其中每个R1和每个R2独立地选自氢和C1-C10烷基。
2.根据权利要求1所述的方法，其中所述气相沉积条件选自化学气相沉积CVD、原子层沉积ALD、等离子体增强型ALD PEALD、等离子体增强型循环化学气相沉积PECCVD、可流动化学气相沉积FCVD或等离子体增强型ALD类工艺。
3.根据权利要求1所述的方法，其中所述含硅膜选自二氧化硅、氮化硅、氮氧化硅、碳化硅、碳氮化硅、碳氮氧化硅、低k薄含硅膜、高k栅极硅酸盐膜和低温硅外延膜。
4.根据权利要求1所述的方法，其中所述表面选自二氧化硅、氮化硅、氧化铝、氮化铝、铝、钨、铜、钴、钼、钌、硅晶片或其组合。
5.根据权利要求1所述的方法，其中所述气相沉积条件包含在约100℃至约1000℃的温度下的原子层沉积条件。
6.根据权利要求1所述的方法，其中所述气相沉积条件包含在约100℃至约800℃的温度下的原子层沉积条件。
7.根据权利要求1所述的方法，其中所述气相沉积条件包含在约500℃至约750℃的温度下的原子层沉积条件。
8.根据权利要求1所述的方法，其中所述气相沉积条件包含选自H2、H2等离子体、H2/O2混合物、水、N2O、N2O等离子体、NH3、NH3等离子体、N2或N2等离子体的气体。
9.根据权利要求1所述的方法，其中所述气相沉积条件包含具有选自氧、氧等离子体和臭氧的氧化气体的原子层沉积条件。
10.根据权利要求1所述的方法，其中所述氧化气体为臭氧。
11.根据权利要求1所述的方法，其中所述式(I)化合物具有下式：
12.根据权利要求10所述的方法，其中所述含硅膜为二氧化硅，并且其中由此形成的所述二氧化硅膜展现与用双(叔-丁基氨基)硅烷BTBAS和臭氧沉积的SiO2相比改善至少约70％的200:1稀氟化氢溶液的湿式蚀刻速率。
13.一种氧化硅膜，其200:1稀氟化氢溶液的湿式蚀刻速率小于热生长氧化硅的蚀刻速率的约3倍。
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