TWI808497B - 半導體結構及其形成方法 - Google Patents
半導體結構及其形成方法 Download PDFInfo
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- TWI808497B TWI808497B TW110135979A TW110135979A TWI808497B TW I808497 B TWI808497 B TW I808497B TW 110135979 A TW110135979 A TW 110135979A TW 110135979 A TW110135979 A TW 110135979A TW I808497 B TWI808497 B TW I808497B
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- 238000000034 method Methods 0.000 title claims abstract description 105
- 239000004065 semiconductor Substances 0.000 title claims description 44
- 238000000151 deposition Methods 0.000 claims abstract description 39
- 229910052751 metal Inorganic materials 0.000 claims description 58
- 239000002184 metal Substances 0.000 claims description 58
- 238000005229 chemical vapour deposition Methods 0.000 claims description 41
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- 238000011049 filling Methods 0.000 claims description 17
- 229910052721 tungsten Inorganic materials 0.000 claims description 15
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 14
- 239000010937 tungsten Substances 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 9
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- 239000010941 cobalt Substances 0.000 claims description 7
- 229910017052 cobalt Inorganic materials 0.000 claims description 7
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- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 238000000231 atomic layer deposition Methods 0.000 description 4
- GDTBXPJZTBHREO-UHFFFAOYSA-N bromine Substances BrBr GDTBXPJZTBHREO-UHFFFAOYSA-N 0.000 description 4
- 229910052794 bromium Inorganic materials 0.000 description 4
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
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- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 3
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- 238000000038 ultrahigh vacuum chemical vapour deposition Methods 0.000 description 3
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- HEDRZPFGACZZDS-UHFFFAOYSA-N Chloroform Chemical compound ClC(Cl)Cl HEDRZPFGACZZDS-UHFFFAOYSA-N 0.000 description 2
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- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 2
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- 229910052785 arsenic Inorganic materials 0.000 description 2
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- OKZIUSOJQLYFSE-UHFFFAOYSA-N difluoroboron Chemical compound F[B]F OKZIUSOJQLYFSE-UHFFFAOYSA-N 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 229940104869 fluorosilicate Drugs 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 2
- 229930195733 hydrocarbon Natural products 0.000 description 2
- 150000002430 hydrocarbons Chemical class 0.000 description 2
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- 238000002955 isolation Methods 0.000 description 2
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- 238000001039 wet etching Methods 0.000 description 2
- 229910019311 (Ba,Sr)TiO Inorganic materials 0.000 description 1
- ITWBWJFEJCHKSN-UHFFFAOYSA-N 1,4,7-triazonane Chemical compound C1CNCCNCCN1 ITWBWJFEJCHKSN-UHFFFAOYSA-N 0.000 description 1
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910017121 AlSiO Inorganic materials 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910015844 BCl3 Inorganic materials 0.000 description 1
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
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- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 229910021193 La 2 O 3 Inorganic materials 0.000 description 1
- 229910016006 MoSi Inorganic materials 0.000 description 1
- 229910005881 NiSi 2 Inorganic materials 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- 108091081062 Repeated sequence (DNA) Proteins 0.000 description 1
- 229910002367 SrTiO Inorganic materials 0.000 description 1
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- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910006249 ZrSi Inorganic materials 0.000 description 1
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- 238000000137 annealing Methods 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- CFJVGKGKXJDSDK-UHFFFAOYSA-N dialuminum oxygen(2-) zirconium(4+) Chemical compound [Al+3].[O-2].[Zr+4].[O-2].[Al+3] CFJVGKGKXJDSDK-UHFFFAOYSA-N 0.000 description 1
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- 230000009969 flowable effect Effects 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
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- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000002086 nanomaterial Substances 0.000 description 1
- 239000002073 nanorod Substances 0.000 description 1
- 239000002135 nanosheet Substances 0.000 description 1
- 239000002070 nanowire Substances 0.000 description 1
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 1
- 229910021334 nickel silicide Inorganic materials 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000005368 silicate glass Substances 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 229910003468 tantalcarbide Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- 229910021341 titanium silicide Inorganic materials 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
- ZVWKZXLXHLZXLS-UHFFFAOYSA-N zirconium nitride Chemical compound [Zr]#N ZVWKZXLXHLZXLS-UHFFFAOYSA-N 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28556—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28568—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising transition metals
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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Abstract
本文揭露了半導體結構及其製造方法。根據本揭露,半導體結構的製造方法包括接收工件,其包括第一閘極結構,包括其上的第一蓋層,第一源極/汲極接觸件,鄰近第一閘極結構,第二閘極結構,包括其上的第二蓋層,第二源極/汲極接觸件,蝕刻停止層,在第一源極/汲極接觸件和第二源極/汲極接觸件上方,以及第一介電層,在蝕刻停止層上方;形成抵接(butted)接觸開口,以露出第一蓋層和第一源極/汲極接觸件;在抵接接觸開口中,形成抵接接觸件;在形成抵接接觸件後,沉積第二介電層;形成源極/汲極接觸導孔開口,穿過第二介電層、蝕刻停止層和第一介電層,以露出第二源極/汲極接觸件;以及在源極/汲極接觸導孔開口中,形成源極/汲極接觸導孔。
Description
本發明實施例是關於半導體裝置,特別是關於具有抵接(butted)接觸件之半導體裝置及其製造方法。
半導體積體電路(integrated circuit,IC)工業經歷了指數型成長。IC材料與設計的技術進步已產出數代的IC,其中每一代都比上一代具有更小且更複雜的電路。在IC的發展過程,功能密度(即每單位晶片區域互連裝置的數量)已大量增加,而幾何大小(即可以使用製程產出的最小組件(或線))已縮小。這種微縮化製程一般藉由提高生產效率與降低相關成本以提供效益。這種微縮化也增加了IC製程與製造的複雜性。
隨著積體電路(integrated circuit,IC)持續微縮化,接觸導孔的尺寸例如閘極接觸導孔以及源極/汲極接觸導孔變得越來越小。雖然先進的微影技術允許形成高深寬比(aspect ratio)的接觸導孔開口,但在高深寬比(aspect ratio)的接觸導孔開口中填充導電材料已被證實會面臨挑戰。此外,沉積金屬填充層在不同金屬表面可能會歷經不同的沉積速率,導致並非令人滿意的金屬填充或空隙。儘管現有的形成電晶體接觸件的方法已經大致能滿足其預期目的,但並
非在所有方面都令人滿意。
本發明實施例提供一種半導體裝置的形成方法,包括:接收工件,其包括第一閘極結構,包括其上的第一蓋層,第一源極/汲極接觸件,鄰近第一閘極結構,第二閘極結構,包括其上的第二蓋層,第二源極/汲極接觸件,蝕刻停止層,在第一源極/汲極接觸件和第二源極/汲極接觸件上方,以及第一介電層,在蝕刻停止層上方;形成抵接(butted)接觸開口,以露出第一蓋層和第一源極/汲極接觸件;在抵接接觸開口中,形成抵接接觸件;在形成抵接接觸件後,沉積第二介電層;形成源極/汲極接觸導孔開口,穿過第二介電層、蝕刻停止層和第一介電層,以露出第二源極/汲極接觸件;以及在源極/汲極接觸導孔開口中,形成源極/汲極接觸導孔。
本發明實施例提供一種半導體裝置的形成方法,包括:接收工件,包括第一閘極結構,第一源極/汲極接觸件,鄰近第一閘極結構,第二閘極結構,第二源極/汲極接觸件,蝕刻停止層,在第一源極/汲極接觸件和第二源極/汲極接觸件上方,以及第一介電層,在蝕刻停止層上方;形成抵接(butted)接觸件,以耦接至第一閘極結構和第一源極/汲極接觸件;沉積第二介電層,在第一介電層和抵接(butted)接觸件上方;形成源極/汲極接觸導孔,穿過第二介電層、第一介電層和蝕刻停止層,以耦接第二源極/汲極接觸件;沉積第三介電層,在源極/汲極接觸導孔和第二介電層上方;以及形成閘極接觸件,穿過第三介電層、第二介電層、第一介電層和蝕刻停止層,以耦接第二閘極結構。
本發明實施例提供一種半導體裝置包括:第一閘極結構,包括其
上的第一蓋層;第一源極/汲極接觸件,鄰近第一閘極結構;第二閘極結構,包括其上的第二蓋層;第二源極/汲極接觸件;蝕刻停止層,在第一源極/汲極接觸件和第二源極/汲極接觸件上方;一第一介電層,在蝕刻停止層上方;第二介電層,在第一介電層上方;抵接(butted)接觸件,跨越(span over)第一閘極結構和第一源極/汲極接觸件,抵接(butted)接觸件與第一源極/汲極接觸件和第一蓋層接觸;源極/汲極接觸導孔,設置在第二源極/汲極接觸件上方;以及閘極接觸件,設置在第二蓋層上方,其中第二介電層直接設置在抵接(butted)接觸件的一頂表面上。
100:方法
102,104,106,108,110,112,114,116,118,120,122,124:方框
10:通道區
20:源極/汲極區
200:工件、半導體裝置、半導體結構
202:基板
204:主動區
205-1,205-2:源極/汲極部件
206,206-1,206-2,206-3:閘極結構
208:蓋層
210:閘極間隔物
212:接觸蝕刻停止層
214:層間介電層
216:自對準蓋層
218:矽化物層
222:金屬填充層
224,224-1,224-2:源極/汲極接觸件
226:中間蝕刻停止層
228:層間介電層
230:抵接接觸開口
231:阻障層
232:抵接接觸件
234:層間介電層
236:源極/汲極接觸導孔開口
240:源極/汲極接觸導孔
242:層間介電層
244:閘極接觸開口
248:金屬填充層
250:閘極接觸件
W1,W2:寬度
T:厚度
H1,H2,H3:高度
以下將配合所附圖式詳述本發明實施例。應注意的是,依據在業界的標準做法,各種特徵並未按照比例繪製且僅用以說明例示。事實上,可任意地放大或縮小單元的尺寸,以清楚地表現出本發明實施例的特徵。
第1圖根據本揭露的多個面向,繪示出製造共電源軌接觸件的方法的流程圖。
第2-14圖根據本揭露的多個面向,繪示出在第1圖的方法中各個製造階段期間的工件的局部透剖面圖。
第15圖根據本揭露的多個面向,繪示出包括閘極接觸件、源極/汲極接觸導孔以及抵接(butted)接觸件的半導體裝置的局部上視圖。
以下揭露提供了許多的實施例或範例,用於實施所提供的標的物
之不同元件。各元件和其配置的具體範例描述如下,以簡化本發明實施例之說明。當然,這些僅僅是範例,並非用以限定本發明實施例。舉例而言,敘述中若提及第一元件形成在第二元件之上,可能包含第一和第二元件直接接觸的實施例,也可能包含額外的元件形成在第一和第二元件之間,使得它們不直接接觸的實施例。此外,本發明實施例可能在各種範例中重複參考數值以及/或字母。如此重複是為了簡明和清楚之目的,而非用以表示所討論的不同實施例及/或配置之間的關係。
再者,其中可能用到與空間相對用詞,例如「在......之下」、「下方」、「較低的」、「上方」、「較高的」等類似用詞,是為了便於描述圖式中一個(些)部件或特徵與另一個(些)部件或特徵之間的關係。空間相對用詞用以包括使用中或操作中的裝置之不同方位,以及圖式中所描述的方位。當裝置被轉向不同方位時(旋轉90度或其他方位),其中所使用的空間相對形容詞也將依轉向後的方位來解釋。
另外,當使用「約」、「近似」和類似的用語描述數字或數字範圍時,所屬技術領域中具有通常知識者可以理解,考慮製造中固有產生的變異,此類用語用於涵蓋在合理範圍內的數字,合理範圍內包含所描述的數字。例如,數字的數量或範圍涵蓋了包括所描述數字的合理範圍,例如在所描述數字的+/- 10%之內,此合理範圍是基於製造相關部件已知的製造公差,而該部件具有與該數字相關聯的特徵。例如所屬技術領域中具有通常知識者已知與沉積材料層相關的製造公差為+/- 15%,材料層為「約5nm」涵蓋4.25nm至5.75nm的尺寸範圍。此外,本發明實施例可能在各種範例中重複元件符號以及/或字母。如此重複是為了簡明和清楚之目的,而非用以表示所討論的不同實施例及/或配置之間
的關係。
隨著半導體裝置尺寸的微縮化,以局部互連結構耦接閘極結構和鄰近的源極/汲極接觸是常見的。在一些示例中,閘極結構由不同於源極/汲極接觸件的組成的蓋層覆蓋。在形成局部互連結構的製程中,以化學氣相沉積(chemical vapor deposition,CVD)或選擇性的沉積方法沉積填充層。可以觀察到的是,沉積填充層在源極/汲極接觸件上可以比在蓋層上方更快。此外,在形成局部互連結構的金屬填充製程之前,源極/汲極接觸件和蓋層的表面可以露出於各種氧化或還原氣氛。不同材料之間的還原率差異也可以導致不同的沉積速率。不同表面上不同的沉積速率可以導致局部互連結構具有與閘極結構不良的接觸。
本揭露提供在形成源極/汲極接觸導孔和形成閘極接觸件之前,形成耦接閘極結構與鄰近的源極/汲極接觸件的抵接(butted)接觸件的方法。抵接接觸件的抵接接觸開口具有低深寬比(aspect ratio),且以物理氣相沉積(physical vapor deposition,PVD)和化學氣相沉積(CVD)的組合執行抵接接觸開口中的金屬填充。因此,源極/汲極接觸導孔和閘極接觸件的頂面高於抵接接觸的頂表面。本揭露的實施例可以減少或消除在不同表面上,不同沉積速率相關的問題。本揭露的方法減少形成空隙的可能性。
現在將參照圖式更詳細描述本揭露的各個面向。就此而言,第1圖是根據本揭露的實施例,繪示出形成接觸件結構的方法100的流程圖。方法100僅為示例,且不意圖將本揭露作出除了本揭露方法100中明確說明的內容之外的限制。可以在方法100之前、期間和之後提供額外的步驟,並且可以替換、刪除或移動所描述的一些步驟在上述方法的其他實施例。為簡單起見,本文並未詳
細描述所有步驟。以下結合第2-14圖描述方法100,第2-14圖是根據第1圖中方法100的實施例,在不同製造階段的工件200的局部剖面圖。為避免疑義,第2-14圖中的X、Y和Z方向彼此垂直,且在第2-14圖中一致使用。由於工件200將被製造成半導體裝置或半導體結構,所以根據上下文的需要,工件200在本文中可被稱為半導體裝置200或半導體結構200。在本揭露全文中,除非另有說明,否則相似的元件符號用於代表相似的部件。
參照第1和2圖,方法100包括方框102,接收工件200。工件200包括基板202。在所描繪的實施例中,基板202包括矽(Si)。替代或另外地,基板202可以包括另一種元素半導體,例如鍺(Ge);化合物半導體,例如碳化矽(SiC)、砷化鎵(GaAs)、磷化鎵(GaP)、磷化銦(InP)、砷化銦(InAs)及/或銻化銦(InSb);合金半導體,例如矽鍺(SiGe)、磷化砷化鎵(GaAsP)、砷化鋁銦(AlInAs)、砷化鋁鎵(AlGaAs)、砷化鎵銦(GaInAs)、磷化鎵銦(GaInP)及/或鎵銦砷磷化物(GaInAsP);或其組合。在一些實施方式中,基板202包括一種或多種III-V族材料、一種或多種II-VI族材料或其組合。在一些實施方式中,基板202是絕緣體上半導體基板,例如絕緣體上矽(silicon-on-insulator,SOI)基板、絕緣體上矽鍺(silicon germanium-on-insulator,SGOI)基板或絕緣體上鍺(germanium-on-insulator,GeOI)基板。製造絕緣體上半導體基板可以使用佈植氧(SIMOX)、晶圓接合(wafer bonding)及/或其他合適的方法。基板202可以包括根據半導體裝置200的設計需求所配置的各種摻雜區(未示出),例如p型摻雜區、n型摻雜區或其組合。P型摻雜區(例如p型井)包括p型摻雜劑,例如硼(B)、二氟化硼(BF2)、其他p型摻雜劑或其組合。N型摻雜區(例如n型井)包括n型摻雜劑,例如磷(P)、砷(As)、其他n型摻雜劑或其組合。
可以執行離子布植製程、擴散製程及/或其他合適的摻雜製程以形成各種摻雜區。基板202在第2圖中以虛線示出,並且為簡單起見,在第3-14圖中省略。
如第2圖所示,工件200包括多閘極裝置的主動區204,例如鰭式場效電晶體(fin-type field effect transistors,FinFET)或多橋通道(multi-bridge-channel,MBC)電晶體。當主動區204用於鰭式場效電晶體(FinFET)時,主動區204可以是沿X方向縱向延伸的鰭元件(或鰭結構)。當主動區204用於多橋通道(MBC)電晶體時,主動區可以是垂直堆疊的通道構件,每個通道構件沿X方向縱向延伸。由於多橋通道(MBC)電晶體的閘極結構包繞每個通道區,因此多橋通道(MBC)電晶體也可稱為環繞式閘極電晶體(surrounding gate transistor,SGT)或全繞式閘極(gate-all-around,GAA)電晶體。通道構件以奈米結構的形式出現,例如奈米片、奈米線或奈米棒。形成主動區204可以通過圖案化基板202或沉積在基板202上方的一或多個磊晶層。在所描繪的實施例中,形成主動區204是通過圖案化基板202的一部分且包括矽(Si)。儘管圖中未清楚示出,但是可以在主動區204和鄰近的主動區(未清楚示出)之間形成隔離部件。在一些實施例中,隔離部件可以包括氧化矽、氮化矽、氮氧化矽(silicon oxynitride)、摻氟矽酸鹽玻璃(fluorine-doped silicate glass,FSG)或低介電常數(low-k)介電材料、其組合及/或其他合適的材料。
如第2圖所示,工件200還包括設置在主動區204的通道區10上方的第一閘極結構206-1、第二閘極結構206-2和第三閘極結構206-3。為方便參考,第一閘極結構206-1、第二閘極結構206-2以及第三閘極結構206-3可以統稱為閘極結構206。主動區204的通道區10由源極/汲極區20交錯。每個通道區10插設於兩個源極/汲極區20。閘極結構206包覆主動區204的通道區10。當主動區204包括
垂直疊層的通道構件時,閘極結構206包繞每個通道構件。雖然圖中未清楚示出,但每個閘極結構206包括閘極介電層和閘極介電層上方的閘極電極。閘極介電層可以包括界面層和高介電常數(high-k)介電層。在一些情況下,界面層可以包括氧化矽。高介電常數(high-k)介電層由具有高介電常數的介電材料形成,例如大於氧化矽的介電常數(k3.9)。用於高介電常數(high-k)介電層的示例性高介電常數(high-k)介電材料包括氧化鉿(HfO)、氧化鈦(TiO2)、氧化鉿鋯(HfZrO)、氧化鉭(Ta2O5)、矽酸鉿(HfSiO4)、氧化鋯(ZrO2)、矽酸鋯(ZrSiO2)、氧化鑭(La2O3)、氧化鋁(Al2O3)、氧化鋯(ZrO)、氧化釔(Y2O3)、鈦酸鍶(SrTiO3;TO)、鈦酸鋇(BaTiO3;BTO)、氧化鋇鋯(BaZrO)、氧化鉿鑭(HfLaO)、氧化鑭矽(LaSiO)、氧化矽鋁(AlSiO)、氧化鉿鉭(HfTaO)、氧化鉿鈦(HfTiO)、鈦酸鍶鋇((Ba,Sr)TiO3;BST)、氮化矽(SiN)、氮氧化矽(SiON)、其組合或其他合適的材料。在一實施例中,高介電常數(high-k)介電層由氧化鉿(HfO)形成。閘極電極可以包括多層,例如功函數層、膠/阻障層及/或金屬填充(或主體)層。功函數層包括調整為具有期望的功函數(例如n型功函數或p型功函數)的導電材料,例如n型功函數材料及/或p型功函數材料。P型功函數材料包括TiN、TaN、Ru、Mo、Al、WN、ZrSi2、MoSi2、TaSi2、NiSi2、WN、其他p型功函數材料,或其組合。N型功函數材料包括Ti、Al、Ag、Mn、Zr、TiAl、TiAlC、TaC、TaCN、TaSiN、TaAl、TaAlC、TiAlN、其他n型功函數材料或其組合。膠/阻障層可以包括促進鄰接層之間黏合的材料,例如功函數層和金屬填充層、及/或阻擋及/或減少閘極層之間擴散的材料,例如功函數層和金屬填充層。舉例來說,膠/阻障層包括金屬(例如W、Al、Ta、Ti、Ni、Cu、Co、其他合適的金屬或其組合)、金屬氧化物、金屬氮化物(例如TiN)
或其組合。金屬填充層可以包括合適的導電材料,例如鋁(Al)、銅(Cu)、鎢(W)、釕(Ru)、鈦(Ti)、合適的金屬或其組合。當功函數材料佔據所有的閘極開口時,可以省略金屬填充層。
閘極間隔物210內襯在每個閘極結構206的側壁。閘極間隔物210可以是單層或多層。在一些實施例中,閘極間隔物210可以包括氮碳化矽(silicon carbonitride)、碳氧化矽(silicon oxycarbide)、氮碳氧化矽(silicon oxycarbonitride)或氮化矽。在一些實施例中,可以使用替換閘極或後閘極(gate last)製程形成閘極結構206。在示例性的後閘極(gate last)製程中,虛設閘極堆疊形成在主動區204的通道區10上方。然後在工件200上方沉積閘極間隔物210,包括在虛設閘極堆疊的側壁上方。接著進行非等向性蝕刻製程,凹蝕源極/汲極區20以形成源極/汲極溝槽,留下沿著虛設閘極堆疊側壁延伸的閘極間隔物210。在形成源極/汲極溝槽之後,在源極/汲極區20中的源極/汲極溝槽沉積第一源極/汲極部件205-1以及第二源極/汲極部件205-2。第一源極/汲極部件205-1以及第二源極/汲極部件205-2可以形成通過氣相磊晶(vapor-phase epitaxy,VPE)、超高真空化學氣相沉積(ultra-high vacuum CVD,UHV-CVD)、低壓化學氣相沉積(low pressure CVD,LPCVD)製程、及/或PECVD、分子束磊晶製程(molecular beam epitaxy process)或其他合適的磊晶製程、或其組合。源極/汲極部件也可以稱為磊晶部件。根據半導體裝置200的設計,第一源極/汲極部件205-1和第二源極/汲極部件205-2可以是n型或p型。當它們是n型時,它們可以包括摻雜有n型摻雜劑例如磷(P)或砷(As)的矽(Si)。當它們是p型時,它們可以包括摻雜有p型摻雜劑的矽鍺(SiGe),例如硼(B)或二氟化硼(BF2)。在一些實施方式中,可以執行退火製程以活化第一源極/汲極部件205-1和第二源極/汲極部件205-2中的摻
雜劑。在所描繪的實施例中,第一源極/汲極部件205-1和第二源極/汲極部件205-2可以包括摻雜磷的矽(Si:P)或摻雜硼的矽鍺(SiGe:B)。
在形成源極/汲極部件(例如第一源極/汲極部件205-1和第二源極/汲極部件205-2)之後,沉積接觸蝕刻停止層(contact etch stop layer,CESL)212和第一層間介電(interlayer dielectric,ILD)層214在工件200上方。在一些實施例中,接觸蝕刻停止層(CESL)212可以包括氮化矽、氮氧化矽(silicon oxynitride)及/或本領域已知的其他材料。沉積接觸蝕刻停止層(contact etch stop layer,CESL)212可以使用原子層沉積(atomic layer deposition,ALD)、電漿增強型原子沉積(plasma-enhanced chemical vapor deposition,PEALD)、電漿化學氣相沉積(plasma-enhanced chemical vapor deposition,PECVD)及/或其他合適的沉積製程。第一層間介電(ILD)層214可以包括例如四乙氧基矽烷(TEOS)氧化物、未摻雜矽玻璃、摻雜矽氧化物例如硼磷矽玻璃(BoroPhosphoSilicate Glass,BPSG)、氟矽玻璃(Fluorinated Silica Glass,FSG)、磷矽玻璃(PhosphoSilicate Glass,PSG)、硼摻雜矽酸玻璃(boron doped silicon glass,BSG)及/或其他合適的介電材料。第一層間介電(ILD)層214可以沉積在接觸蝕刻停止層(CESL)212上通過CVD、流動式化學氣相沉積(flowable CVD,FCVD)、旋轉塗佈或其他合適的沉積技術。然後使用化學機械拋光(chemical mechanical polishing,CMP)製程平坦化工件200以露出虛設閘極堆疊。然後去除虛設閘極堆疊並以閘極結構206取代,閘極結構206的組成如上所述。
閘極結構206被蓋層208覆蓋。在一些實施例中,蓋層208可以包括無氟鎢(fluorine-free tungsten,FFW),沉積使用化學氣相沉積(CVD)或金屬有機化學氣相沉積(metal organic chemical vapor deposition,MOCVD)。如第
2圖所示,工件200還可以包括蓋層208上方的自對準蓋(self-aligned capping,SAC)層216。在一些實施例中,自對準蓋(self-aligned capping,SAC)層216可以包括氧化矽、氮化矽、碳化矽、氮碳化矽(silicon carbonitride)、氮氧化矽(silicon oxynitride)、氮碳氧化矽(silicon oxycarbonitride)、氧化鋁、氮化鋁、氮氧化鋁(aluminum oxynitride)、氧化鋯、氮化鋯、氧化鋁鋯(zirconium aluminum oxide)、氧化鉿或合適的介電材料。沉積自對準蓋(self-aligned capping,SAC)層216可以使用化學氣相沉積(CVD)、原子層沉積(ALD)、電漿增強型原子沉積(PEALD)或合適的方法。
現在參照第1和3圖,方法100包括方框104,形成第一源極/汲極接觸件224-1以耦接到第一源極/汲極部件205-1且形成第二源極/汲極接觸件224-2以耦接到第二源極/汲極部件205-2。方框104包括在源極/汲極區20上方穿過第一層間介電(ILD)層214和接觸蝕刻停止層(CESL)212,形成源極/汲極接觸開口,以及在源極/汲極接觸開口中形成第一源極/汲極接觸件224-1和第二源極/汲極接觸件224-2。源極/汲極接觸開口的形成可以包括使用微影製程及/或蝕刻製程。在一些實施方式中,微影製程包括在工件200上方形成阻抗層,露出阻抗層以輻射圖案,並對露出的阻抗層顯影,而形成圖案化的阻抗層。然後對工件200進行乾蝕刻製程,使用圖案化的阻抗層作為遮罩元件以露出第一源極/汲極部件205-1的一部分以及第二源極/汲極部件205-2的一部分。方框104的乾蝕刻製程可以包括使用含氟氣體(例如CF4、SF6、CH2F2、CHF3及/或C2F6)、含氯氣體(例如Cl2、CHCl3、CCl4及/或BCl3)、烴類物質(例如CH4)、含溴氣體(例如HBr和/或CHBr3)、含碘氣體、其他合適的氣體及/或電漿、及/或其組合。在形成源極/汲極接觸開口之後,在源極/汲極接觸開口中形成矽化物層218。在一些情況
下,矽化物層218可以包括鈦矽化物、鈷矽化物、鎳矽化物、鉭矽化物或鎢矽化物。之後,使用自下而上選擇性化學氣相沉積(CVD)在矽化物層218上方沉積金屬填充層222以在第一源極/汲極部件205-1上方形成第一源極/汲極接觸件224-1以及在第二源極/汲極部件205-2上方形成第二源極/汲極接觸件224-2。需要注意的是,由於使用自下而上選擇性的化學氣相沉積(CVD),因此在沉積金屬填充層222之前沒有沉積阻障層。自下而上選擇性的化學氣相沉積(CVD)提供金屬對金屬的選擇性沉積,其沉積速率比常規化學氣相沉積(CVD)慢。金屬填充層222可以包括釕(Ru)、鈷(Co)、鎳(Ni)或銅(Co)。在所描繪的實施例中,金屬填充層222包括鈷(Co)。在沉積金屬填充層222之後,可以執行化學機械拋光(CMP)製程以去除多餘的材料並限定第一源極/汲極接觸件224-1和第二源極/汲極接觸件224-2的最終形狀。在化學機械拋光(CMP)製程之後,工件200的頂表面大致上是平坦的。
現在參照第1和4圖。方法100包括方框106,其中在工件200上方沉積中間蝕刻停止層(middle etch stop layer,MESL)226和第二層間介電(ILD)層228。在方框106處,中間蝕刻停止層(MESL)226和第二層間介電(ILD)層228依序沉積在工件200上方。在一些實施例中,中間蝕刻停止層(MESL)226的成分及形成製程可以類似於接觸蝕刻停止層(CESL)212的成分及形成製程,且第二層間介電(ILD)層228的成分及形成製程可以類似於第一層間介電(ILD)層214的。
參照第1和5圖,方法100包括方框108,其中形成抵接(butted)接觸開口230以露出第一源極/汲極接觸件224-1和第一閘極結構206-1上方的蓋層208。在一示例製程中,可以在工件200上方形成圖案化的光阻層以露出位於
第一閘極結構206-1和第一源極/汲極接觸件224-1正上方的區域。然後非等向性蝕刻工件200,使用圖案化的光阻層作為蝕刻遮罩。由於方框108處的非等向性蝕刻對第二層間介電(ILD)層228、中間蝕刻停止層(MESL)226和自對準蓋(self-aligned capping,SAC)層216是選擇性的,抵接接觸開口230的端點可以落在第一源極/汲極接觸件224-1的頂表面,蓋層208的頂表面位於第一閘極結構206-1上方。因此,形成抵接接觸開口230,如第5圖所示。抵接接觸開口230不僅露出第一源極/汲極接觸件224-1且也露出第一閘極結構206-1上方的蓋層208。方框108的非等向性蝕刻製程可以為乾蝕刻,使用氧氣(O2)、氮氣(N2)、含氟氣體(例如CF4、SF6、NF3、BF3、CH2F2、CHF3及/或C2F6)、含氯氣體(例如Cl2、CHCl3、CCl4及/或BCl3)、烴類(例如CH4)、含溴氣體(例如HBr及/或CHBr3)、含碘氣體、其他合適的氣體及/或電漿及/或其組合。在一些實施例中,在形成抵接接觸開口230之後,可以執行預清潔製程,以從第一源極/汲極接觸件224-1以及蓋層208去除氧化物。
參照第1和6圖,方法100包括方框110,其中在抵接(butted)接觸開口230中形成抵接(butted)接觸件232。方框110的操作包括在抵接接觸開口230中沉積阻障層231和金屬填充層以平坦化工件200,去除多餘的金屬材料。在方框110處,可以使用物理氣相沉積(PVD)沉積阻障層231,並且可以使用化學氣相沉積(CVD)在阻障層231上方沉積金屬填充層。在一些實施例中,阻障層231可以包括金屬氮化物,例如氮化鈦(TiN),且阻障層231上方的金屬填充層可以包括鎢(W)。值得注意的是,抵接接觸件232的沉積製程不同於源極/汲極接觸件的沉積製程。如上所述,沉積源極/汲極接觸件(例如第一源極/汲極接觸件224-1)使用自下而上選擇性化學氣相沉積(CVD),並且是無阻障的,
而沉積抵接接觸件232,使用化學氣相沉積(CVD),並且包括阻障層231。在沉積金屬材料之後,通過例如化學機械拋光(CMP)製程平坦化工件200,直到第二層間介電(ILD)層228上方的所有金屬材料被去除。在平坦化之後,在抵接接觸開口230中形成抵接接觸件232。抵接接觸件232(或者,精確的說,抵接接觸件232的阻障層231)與第二層間介電(ILD)層228、中間蝕刻停止層(MESL)226、第一源極/汲極接觸件224-1的金屬填充層222、閘極間隔物210、自對準蓋(self-aligned capping,SAC)層216以及第一閘極結構206-1上方的蓋層208直接接觸。由於蓋層208是導電的,所以位於第一源極/汲極接觸件224-1和蓋層208上的抵接接觸件232電性耦接到第一源極/汲極接觸件224-1和第一閘極結構206-1。
參照第1和7圖,方法100包括方框112,其中在工件200上方沉積第三層間介電(ILD)層234。類似於第一層間介電(ILD)層214和第二層間介電(ILD)層228,第三層間介電(ILD)層234可以包括材料例如(TEOS)氧化物、未摻雜矽玻璃、摻雜矽氧化物例如硼磷矽玻璃(BoroPhosphoSilicate Glass,BPSG)、氟矽玻璃(Fluorinated Silica Glass,FSG)、磷矽玻璃(PhosphoSilicate Glass,PSG)、硼摻雜矽酸玻璃(boron doped silicon glass,BSG)及/或其他合適的介電材料。第三層間介電(ILD)層234可以沉積在第二層間介電(ILD)層228和抵接(butted)接觸件232上方,通過化學氣相沉積(CVD)、流動式化學氣相沉積(FCVD)、旋轉塗佈或其他合適的沉積技術。
參照第1和8圖,方法100包括方框114,其中形成源極/汲極接觸導孔開口236以露出第二源極/汲極接觸件224-2。源極/汲極接觸導孔開口236的形成可以包括微影製程和蝕刻製程。微影製程形成蝕刻遮罩,上述蝕刻遮罩包括位於第二源極/汲極接觸件224-2正上方的開口。參照第8圖,然後進行乾蝕刻製程
以完全蝕刻穿過第三層間介電(ILD)層234、第二層間介電(ILD)層228和中間蝕刻停止層(MESL)226以露出第二源極/汲極接觸件224-2的金屬填充層222的頂表面。在方框114的示例乾蝕刻製程可以包括使用氧氣(O2)、氮氣(N2)、氫氣(H2)、含氟氣體(例如CF4、SF6、NF3、BF3、CH2F2、CHF3及/或C2F6)、含氯氣體(例如Cl2、CHCl3、CCl4及/或BCl3)、含溴氣體(例如HBr及/或CHBr3)、含碘氣體、其他合適的氣體及/或電漿及/或其組合。在一實施例中,蝕刻源極/汲極接觸導孔開口236使用電漿氮、電漿氫或兩者。
參照第1和9圖,方法100包括方框116,其中凹蝕第二源極/汲極接觸件224-2。可以執行選擇性濕蝕刻製程以選擇性凹蝕第二源極/汲極接觸件224-2的金屬填充層222以延伸源極/汲極接觸導孔開口236進入到第二源極/汲極接觸件224-2中。在一些實施方式中,選擇性濕蝕刻製程包括使用去離子(DI)水、硝酸(HNO3)、過氧化氫(H2O2)、鹽酸(HCl)或異丙醇(isopropyl alcohol,IPA)。在一實施例中,金屬填充層222由鈷(Co)形成且方框116處的凹蝕使用過氧化氫(H2O2)執行。如第9圖所示,由於濕蝕刻製程的等向性特性,第二源極/汲極接觸件224-2的金屬填充層222的頂表面成為凹的或火山口狀。在第9圖所示的一些實施例中,在凹蝕之後,源極/汲極接觸導孔開口236的一部分可以底切第二源極/汲極接觸件224-2周圍的中間蝕刻停止層(MESL)226。方框116處的凹槽可以改善黏合並增加待形成的源極/汲極接觸導孔240的界面表面積(將在下面描述)。
參照第1和10圖,方法100包括方框118,其中在源極/汲極接觸導孔開口236中形成源極/汲極接觸導孔240。方框118的操作可以包括金屬沉積和表面平坦化。在示例製程中,沉積金屬填充層在工件200上方,包括在源極/汲極接
觸導孔開口236中。在一些實施例中,金屬填充層可以包括鎢(W)或釕(Ru)。在所描繪的實施例中,金屬填充層包括鎢(W)。在一些實施方式中,沉積金屬填充層可以使用自下而上選擇性化學氣相沉積(CVD)或合適的沉積技術。在沉積金屬填充層之後,進行化學機械拋光(CMP)製程以平坦化工件200,去除多餘材料並形成源極/汲極接觸導孔240。如第10圖所示,源極/汲極接觸導孔240延伸穿過第三層間介電(ILD)層234、第二層間介電(ILD)層228和中間蝕刻停止層(MESL)226。由於方框116處的凹蝕製程,源極/汲極接觸導孔240部分延伸進入到第二源極/汲極接觸件224-2的金屬填充層222中並且可以在第二源極/汲極接觸件224-2的邊緣周圍底切中間蝕刻停止層(MESL)226。在第10圖所示的一些實施例中,源極/汲極接觸導孔240的頂表面比抵接(butted)接觸件232的頂表面高出大致上等於第三層間介電(ILD)層234的厚度差。
參照第1和11圖,方法100包括方框120,其中在工件200上方沉積第四層間介電(ILD)層242。類似於第一層間介電(ILD)層214和第二層間介電(ILD)層228,第四層間介電(ILD)層242可以包括例如(TEOS)氧化物、未摻雜矽玻璃、摻雜矽氧化物例如硼磷矽玻璃(BoroPhosphoSilicate Glass,BPSG)、氟矽玻璃(Fluorinated Silica Glass,FSG)、磷矽玻璃(PhosphoSilicate Glass,PSG)、硼摻雜矽酸玻璃(boron doped silicon glass,BSG)及/或其他合適的介電材料。第四層間介電(ILD)層242可以沉積在第三層間介電(ILD)層234和源極/汲極接觸導孔240的頂表面上方,通過化學氣相沉積(CVD)、流動式化學氣相沉積(FCVD)、旋轉塗佈或其他合適的沉積技術。
參照第1和12圖,方法100包括方框122,其中形成閘極接觸開口244以露出第二閘極結構206-2上方的蓋層208。在第二閘極結構206-2或第三閘極
結構206-3上方形成穿過第四層間介電(ILD)層242、第三層間介電(ILD)層234、第二層間介電(ILD)層228、中間蝕刻停止層(MESL)226和自對準蓋(SAC)層216的閘極接觸開口244,可以包括使用微影製程及/或蝕刻製程。微影製程包括在第四層間介電(ILD)層242上方形成阻抗層,暴露阻抗層於圖案化輻射,並顯影暴露的阻抗層進行,而形成圖案化的阻抗層。接著蝕刻工件200在乾蝕刻製程中使用圖案化的阻抗層作為蝕刻遮罩。方框122的示例乾蝕刻製程可以包括使用氧氣(O2)、氮氣(N2)、氫氣(H2)、含氟氣體(例如CF4、SF6、NF3、BF3、CH2F2、CHF3及/或C2F6)、含氯氣體(例如Cl2、CHCl3、CCl4及/或BCl3)、含溴氣體(例如HBr及/或CHBr3)、含碘氣體、其他合適的氣體及/或電漿及/或其組合。在乾蝕刻製程之後,可以通過灰化(ashing)去除圖案化的阻抗層。可以執行濕式清潔(wet clean)製程以去除第二閘極結構206-2和第三閘極結構206-3上方蓋層208上的碎屑(debris)。在一些實施方式中,濕式清潔製程可以包括使用去離子(DI)水或異丙醇(IPA)。
參照第1、13和14圖,方法100包括方框124,其中在閘極接觸開口244中形成閘極接觸件250。閘極接觸件250可以包括金屬填充層248。用於閘極接觸件250的金屬填充層248可以包括鎢(W)或釕(Ru)並且可以使用自下而上選擇性化學氣相沉積(CVD)沉積。在工件200上方沉積金屬填充層248,如第13圖所示之後,以化學機械拋光(CMP)製程平坦化工件200,形成如第14圖所示的閘極接觸件250。執行方框124的平坦化直到頂部閘極接觸件250、源極/汲極接觸導孔240和第三層間介電(ILD)層234的表面是共平面。頂閘極接觸件250、源極/汲極接觸導孔240和第三層間介電(ILD)層234的頂表面都比抵接(butted)接觸件232的頂表面高出第三層間介電(ILD)層234的厚度T。在一些
情況下,第14圖中的第三層間介電(ILD)層234的厚度T可以在約5nm至約45nm之間。當第三層間介電(ILD)層234的厚度大於45nm時,閘極接觸開口244或源極/汲極接觸導孔開口236的深寬比(aspect ratio)可能太大而無法滿足金屬填充。當第三層間介電(ILD)層234的厚度小於5nm時,抵接接觸件232可能無法與上覆(overlying)金屬線或接觸結構充分絕緣。
仍然參照第14圖。根據本揭露,抵接(butted)接觸件232包括延伸進入到第一閘極結構206-1上方的自對準蓋(SAC)層216中的下部和設置在第一源極/汲極接觸件224-1以及下部上方的上部。抵接接觸件232的下部設置在兩個鄰近的閘極間隔物210之間並且與第一閘極結構206-1上的蓋層208接觸。抵接接觸件232的上部設置在中間蝕刻停止層(MESL)226和第二層間介電(ILD)層228中。如第14圖所示,沿著Z方向垂直於基板202(如第2圖所示),下部具有第一高度H1且上部具有第二高度H2。在所描繪的實施例中,第一高度H1基本上對應於自對準蓋(SAC)層216的厚度且落在約10nm至約25nm之間的範圍內。當自對準蓋(SAC)層216的厚度大於25nm時,形成抵接(butted)接觸開口230時,破壞自對準蓋(SAC)層216所需的額外蝕刻可能會貫穿第一源極/汲極接觸件224-1。如果自對準蓋(SAC)層216小於10nm,抵接接觸開口230可能橫向擴展,導致與鄰近閘極接觸件不期望的耦合。上部的第二高度H2大致上對應於中間蝕刻停止層(MESL)226和第二層間介電(ILD)層228的總厚度並且可以在約30nm至約40nm之間。當第二高度H2小於30nm時,抵接接觸開口230的形成可能會損壞第一閘極結構206-1和蓋層208。當第二高度H2大於40nm時,抵接接觸開口230可能在露出第一閘極結構206-1上方的蓋層208不令人滿意。抵接接觸件232具有第三高度H3,第三高度是下部的第一高度H1和上部的第二高度H2的總
和。在一些情況下,第三高度H3可以在約40nm至60nm之間。下部具有沿X方向的第一頂部開口寬度W1,上部具有沿X方向的第二頂部開口寬度W2。在一些情況下,第一頂部開口寬度W1可以介於約10nm至約25nm之間且第二頂部開口寬度W2可以介於約14nm至約40nm之間。當第二頂部開口寬度W2小於14nm時,抵接接觸件232在第一源極/汲極接觸件224-1上可能具有較差的著陸(landing)。當第二頂部開口寬度W2大於40nm時,抵接接觸件232可能與鄰近的閘極接觸件接觸,導致不期望的電性連接。整體而言,本揭露的抵接接觸件232的標稱深寬比(aspect ratio)(即第三高度H3除以第二頂部開口寬度W2或H3/W2)介於約0.9至約2之間。可以看出的是,如果假設的抵接接觸件也延伸穿過具有厚度T的第三ILD層234,其深寬比將計算為第三高度H3和厚度T的總和除以第二頂部開口寬度W2。這種假設的抵接接觸件具有約1.5至3之間的標稱深寬比(aspect ratio),這將阻礙其下部令人滿意的金屬填充,並可能導致空隙和缺陷。這種空隙和缺陷可能會增加接觸電阻。
第14圖描繪出抵接(butted)接觸件232、源極/汲極接觸導孔240以及閘極接觸件250,沿著相同剖面。在一些實施例中,雖然形狀、深度和相對垂直位置可以保持相同,但是抵接接觸件232、源極/汲極接觸導孔240和閘極接觸件250可以不在相同的剖面上。第15圖提供一示例,其中半導體裝置200的抵接接觸件232、源極/汲極接觸導孔240和閘極接觸件250不一定出現在一剖面上。第15圖中的半導體裝置200包括沿Y方向縱向延伸的多個閘極結構206、沿X方向縱向延伸的多個主動區204以及沿Y方向縱向延伸的多個源極/汲極接觸件224。半導體裝置200包括多個抵接接觸件232、多個源極/汲極接觸導孔240以及多個閘極接觸件250。每個抵接接觸件232跨越(span over)並電性耦接至閘極結構206
和鄰近的源極/汲極接觸件224。每個源極/汲極接觸導孔240設置在源極/汲極接觸件224正上方。每個閘極接觸件250設置在閘極結構206正上方並電性耦接至閘極結構206。如第15圖所示,穿過抵接接觸件232沿X方向的剖面並未穿過任何源極/汲極接觸導孔240或任何閘極接觸件250。
本揭露的抵接(butted)接觸件和方法提供了多個好處。舉例來說,露出閘極結構和鄰近的源極/汲極接觸件的抵接(butted)接觸開口沒有比源極/汲極接觸導孔或閘極接觸件開口深。因此,抵接接觸開口具有較小的深寬比(aspect ratio),有利於令人滿意的金屬填充。抵接接觸件可以由鎢(W)形成且可以沉積使用物理氣相沉積(PVD)和化學氣相沉積(CVD)的組合。較小的深寬比(aspect ratio)和兩階段金屬填充提高抵接接觸件的完整性並降低對於閘極結構的接觸電阻。
本揭露提供許多不同的實施例。在一實施例中,提供一種半導體裝置的形成方法。上述方法包括:接收工件,其包括第一閘極結構,包括其上的第一蓋層,第一源極/汲極接觸件,鄰近第一閘極結構,第二閘極結構,包括其上的第二蓋層,第二源極/汲極接觸件,蝕刻停止層,在第一源極/汲極接觸件和第二源極/汲極接觸件上方,以及第一介電層,在蝕刻停止層上方;形成抵接(butted)接觸開口,以露出第一蓋層和第一源極/汲極接觸件;在抵接接觸開口中,形成抵接(butted)接觸件;在形成抵接接觸件後,沉積第二介電層;形成源極/汲極接觸導孔開口,穿過第二介電層、蝕刻停止層和第一介電層,以露出第二源極/汲極接觸件;以及在源極/汲極接觸導孔開口中,形成源極/汲極接觸導孔。
在一些實施例中,半導體裝置的形成方法更包括:在形成源極/
汲極接觸導孔之後,沉積第三介電層在源極/汲極接觸導孔上方;形成閘極接觸導孔開口,以露出第二蓋層;以及在閘極接觸導孔開口中,形成閘極接觸導孔。在一些實施例中,上述方法更包括:在形成源極/汲極接觸導孔之前,凹蝕第二源極/汲極接觸件。在一些實施方式中,凹蝕第二源極/汲極接觸件包括使用過氧化氫。在一些情況下,第一蓋層和第二蓋層包括無氟鎢(fluorine-free tungsten)。在一些實施例中,第一源極/汲極接觸件和第二源極/汲極接觸件包括鈷且沒有阻障層。在一些實施例中,形成抵接(butted)接觸件包括:以物理氣相沉積在抵接(butted)接觸開口上沉積阻障層;以化學氣相沉積在阻障層上方沉積金屬填充層;以及平坦化所沉積的金屬填充層。在一些實施例中,在上述平坦化之後,抵接接觸件的頂表面與第一介電層的頂表面共平面。在一些實施例中,金屬填充層包括鎢。
在另一實施例中,提供一種半導體裝置的形成方法。上述方法包括:接收工件,包括第一閘極結構,第一源極/汲極接觸件,鄰近第一閘極結構,第二閘極結構,第二源極/汲極接觸件,蝕刻停止層,在第一源極/汲極接觸件和第二源極/汲極接觸件上方,以及第一介電層,在蝕刻停止層上方;形成抵接(butted)接觸件,以耦接至第一閘極結構和第一源極/汲極接觸件;沉積第二介電層,在第一介電層和抵接接觸件上方;形成源極/汲極接觸導孔,穿過第二介電層、第一介電層和蝕刻停止層,以耦接第二源極/汲極接觸件;沉積第三介電層,在源極/汲極接觸導孔和第二介電層上方;以及形成閘極接觸件,穿過第三介電層、第二介電層、第一介電層和蝕刻停止層,以耦接第二閘極結構。
在一些實施例中,半導體裝置的形成方法更包括:在形成閘極接觸件之後,平坦化工件,直到閘極接觸件的頂表面與源極/汲極接觸導孔的頂表
面共平面。在一些實施例中,工件更包括:第一蓋層,在第一閘極結構上方;第二蓋層,在第二閘極結構上方;第一自對準蓋層,在第一蓋層上方;以及第二自對準蓋層,在第二蓋層上方。在一些實施例中,一部分的抵接(butted)接觸件延伸穿過第一自對準蓋層,以坐落在第一蓋層上。在一些實施例中,閘極接觸件延伸穿過第二自對準蓋層,以坐落在第二蓋層上。在一些實施例中,形成抵接接觸件包括:形成抵接(butted)接觸開口,以露出第一源極/汲極接觸件的頂表面和第一蓋層;以物理氣相沉積在抵接接觸開口上沉積阻障層;以化學氣相沉積在阻障層上方沉積金屬填充層;以及平坦化所沉積的金屬填充層。在一些實施例中,金屬填充層包括鎢。
在又另一實施例中,提供一種半導體結構,包括:第一閘極結構,包括其上的第一蓋層;第一源極/汲極接觸件,鄰近第一閘極結構;第二閘極結構,包括其上的第二蓋層;第二源極/汲極接觸件;蝕刻停止層,在第一源極/汲極接觸件和第二源極/汲極接觸件上方;第一介電層,在蝕刻停止層上方;第二介電層,在第一介電層上方;抵接(butted)接觸件,跨越(span over)第一閘極結構和第一源極/汲極接觸件,抵接接觸件與第一源極/汲極接觸件和第一蓋層接觸。源極/汲極接觸導孔,設置在第二源極/汲極接觸件上方;以及閘極接觸件,設置在第二蓋層上方,其中第二介電層直接設置在抵接接觸件的頂表面上。
在一些實施例中,第一源極/汲極接觸件和第二源極/汲極接觸件包括鈷且沒有阻障層。在一些情況下,第一蓋層和第二蓋層包括無氟鎢(fluorine-free tungsten)。在一些實施例中,抵接(butted)接觸件包括鎢。
以上概述數個實施例之特徵,以使本發明所屬技術領域中具有通常知識者可以更加理解本發明實施例的觀點。本發明所屬技術領域中具有通常
知識者應理解,可輕易地以本發明實施例為基礎,設計或修改其他製程和結構,以達到與在此介紹的實施例相同之目的及/或優勢。在本發明所屬技術領域中具有通常知識者也應理解,此類等效的製程和結構並無悖離本發明的精神與範圍,且可在不違背本發明之精神和範圍下,做各式各樣的改變、取代和替換。因此,本發明之保護範圍當視後附之申請專利範圍所界定為準。
10:通道區
20:源極/汲極區
200:工件、半導體裝置、半導體結構
204:主動區
205-1,205-2:源極/汲極部件
206-1,206-2,206-3:閘極結構
208:蓋層
210:閘極間隔物
212:接觸蝕刻停止層
216:自對準蓋層
218:矽化物層
222:金屬填充層
224-1,224-2:源極/汲極接觸件
226:中間蝕刻停止層
228:層間介電層
231:阻障層
232:抵接接觸件
234:層間介電層
240:源極/汲極接觸導孔
248:金屬填充層
250:閘極接觸件
W1,W2:寬度
T:厚度
H1,H2,H3:高度
Claims (15)
- 一種半導體結構的形成方法,包括:接收一工件,包括:一第一閘極結構,包括其上的一第一蓋層,一第一源極/汲極接觸件,鄰近該第一閘極結構,一第二閘極結構,包括其上的一第二蓋層,一第二源極/汲極接觸件,一蝕刻停止層,在該第一源極/汲極接觸件和該第二源極/汲極接觸件上方,以及一第一介電層,在該蝕刻停止層上方;形成一抵接(butted)接觸開口,以露出該第一蓋層和該第一源極/汲極接觸件;在該抵接(butted)接觸開口中,形成一抵接(butted)接觸件;在形成該抵接(butted)接觸件後,沉積一第二介電層;形成一源極/汲極接觸導孔開口,穿過該第二介電層、該蝕刻停止層和該第一介電層,以露出該第二源極/汲極接觸件;以及在該源極/汲極接觸導孔開口中,形成一源極/汲極接觸導孔。
- 如請求項1之半導體結構的形成方法,更包括:在形成該源極/汲極接觸導孔之後,沉積一第三介電層在該源極/汲極接觸導孔上方;形成一閘極接觸導孔開口,以露出該第二蓋層;以及在該閘極接觸導孔開口中,形成一閘極接觸導孔。
- 如請求項1之半導體結構的形成方法,更包括:在形成該源極/汲極接觸導孔之前,凹蝕該第二源極/汲極接觸件。
- 如請求項1之半導體結構的形成方法,其中該第一蓋層和該第二蓋層包括無氟鎢(fluorine-free tungsten)。
- 如請求項1之半導體結構的形成方法,其中該第一源極/汲極接觸件和該第二源極/汲極接觸件包括鈷且沒有阻障層。
- 如請求項1-5中任一項之半導體結構的形成方法,其中形成該抵接(butted)接觸件包括:以物理氣相沉積在該抵接(butted)接觸開口上沉積一阻障層;以化學氣相沉積在該阻障層上方沉積一金屬填充層;以及平坦化所沉積的該金屬填充層。
- 如請求項6之半導體結構的形成方法,其中在上述平坦化之後,該抵接(butted)接觸件的一頂表面與該第一介電層的一頂表面共平面。
- 如請求項6之半導體結構的形成方法,其中該金屬填充層包括鎢。
- 一種半導體結構的形成方法,包括:接收一工件,包括:一第一閘極結構,一第一源極/汲極接觸件,鄰近該第一閘極結構,一第二閘極結構,一第二源極/汲極接觸件,一蝕刻停止層,在該第一源極/汲極接觸件和該第二源極/汲極接觸件上方, 以及一第一介電層,在該蝕刻停止層上方;形成一抵接(butted)接觸件,以耦接至該第一閘極結構和該第一源極/汲極接觸件;沉積一第二介電層,在該第一介電層和該抵接(butted)接觸件上方;形成一源極/汲極接觸導孔,穿過該第二介電層、該第一介電層和該蝕刻停止層,以耦接該第二源極/汲極接觸件;沉積一第三介電層,在該源極/汲極接觸導孔和該第二介電層上方;以及形成一閘極接觸件,穿過該第三介電層、該第二介電層、該第一介電層和該蝕刻停止層,以耦接該第二閘極結構。
- 如請求項9之半導體結構的形成方法,更包括:在形成該閘極接觸件之後,平坦化該工件,直到該閘極接觸件的一頂表面與該源極/汲極接觸導孔的一頂表面共平面。
- 如請求項9之半導體結構的形成方法,其中該工件更包括:一第一蓋層,在該第一閘極結構上方;一第二蓋層,在該第二閘極結構上方;一第一自對準蓋層,在該第一蓋層上方;以及一第二自對準蓋層,在該第二蓋層上方。
- 如請求項11之半導體結構的形成方法,其中一部分的該抵接(butted)接觸件延伸穿過該第一自對準蓋層,以坐落在該第一蓋層上。
- 如請求項11之半導體結構的形成方法,其中該閘極接觸件延伸穿過該第二自對準蓋層,以坐落在該第二蓋層上。
- 一種半導體結構,包括:一第一閘極結構,包括其上的一第一蓋層;一第一源極/汲極接觸件,鄰近該第一閘極結構;一第二閘極結構,包括其上的一第二蓋層;一第二源極/汲極接觸件;一蝕刻停止層,在該第一源極/汲極接觸件和該第二源極/汲極接觸件上方;一第一介電層,在該蝕刻停止層上方;一第二介電層,在該第一介電層上方;一抵接(butted)接觸件,跨越(span over)該第一閘極結構和該第一源極/汲極接觸件,該抵接(butted)接觸件與該第一源極/汲極接觸件和該第一蓋層接觸,其中該抵接(butted)接觸件在該第一源極/汲極接觸件上方的高度小於在該第一蓋層上方的高度;一源極/汲極接觸導孔,設置在該第二源極/汲極接觸件上方;以及一閘極接觸件,設置在該第二蓋層上方,其中該第二介電層直接設置在該抵接(butted)接觸件的一頂表面上。
- 如請求項14之半導體結構,其中該抵接(butted)接觸件的下部延伸至該第一源極/汲極接觸件的頂表面下方以接觸該第一蓋層。
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