TWI719562B - 空間轉換器及其製造方法 - Google Patents

空間轉換器及其製造方法 Download PDF

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TWI719562B
TWI719562B TW108126902A TW108126902A TWI719562B TW I719562 B TWI719562 B TW I719562B TW 108126902 A TW108126902 A TW 108126902A TW 108126902 A TW108126902 A TW 108126902A TW I719562 B TWI719562 B TW I719562B
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circuit board
conductive
redistribution structure
space converter
pad
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TW108126902A
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TW202007981A (zh
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胡迪群
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胡迪群
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    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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Abstract

提供一種用於連接訊號源和針測半導體晶圓的空間轉換器及其製造方法。空間轉換器包括包含線路結構的電路板、接合到所述電路板並包括配置為針測所述半導體晶圓的多個第二接墊的重佈線結構、貫穿所述電路板並在所述電路板和重佈線結構之間提供垂直導電路徑的導電穿孔。線路結構的多個第一接墊配置為連接訊號源。重佈線結構比電路板薄，其中相鄰的第二接墊的間距比相鄰的第一接墊精細。

Description

空間轉換器及其製造方法
本發明是有關於一種空間轉換器，且特別是有關於一種用於連接訊號源和針測半導體晶圓的空間轉換器。
隨著電子工業的快速發展，半導體晶粒的發展趨勢已逐步走向小型化和整合化。高度整合的半導體晶粒的測試墊間距變得更窄，而用於針測(probing)或測試(testing)這種高度整合的半導體晶粒的裝置可具有精細間距的程度是有限的。在這方面，本領域需要一種空間轉換器以支持高度整合的半導體晶粒的精細測試墊間距。
本發明提供一種空間轉換器及其製造方法。配置成連接訊號源並針測半導體晶圓的空間轉換器提供用於與探針配合的精細電路側和用於與訊號源配合的粗電路側，從而簡化測試探針設備的結構並提高空間轉換器的製造效率。
本發明提供一種空間轉換器。所述空間轉換器包括包含線路結構的電路板、接合到所述電路板並包括配置為針測所述半導體晶圓的多個第二接墊的重佈線結構、貫穿所述電路板並在所述電路板和重佈線結構之間提供垂直導電路徑的導電穿孔。線路結構的多個第一接墊配置為連接訊號源。重佈線結構比電路板薄，其中相鄰的第二接墊的間距比相鄰的第一接墊精細。
在一些實施例中，重佈線結構還包括圖案化介電層，其具有與第二接墊的外表面基本上齊平的外表面。在一些實施例中，電路板的線路結構包括連接到第一接墊的第一導電通孔，重佈線結構包括連接到第二接墊的第二導電通孔，以及電路板的第一導電通孔的尺寸大於重佈線結構的第二導電通孔的尺寸。在一些實施例中，重佈線結構的第二導電通孔的寬度在朝向電路板的方向上增加。在一些實施例中，空間轉換器還包括接合層，其設置在電路板和重佈線結構之間，其中電路板的第一接墊和重佈線結構的第二接墊設置在遠離接合層的相對兩側。在一些實施例中，導電穿孔延伸穿過接合層以與重佈線結構接觸。在一些實施例中，導電穿孔延伸穿過重佈線結構。
本發明還提供了一種用於連接訊號源和針測半導體晶圓的空間轉換器的製造方法。所述方法至少包括以下步驟。藉由接合層將電路板接合到重佈線結構上，其中根據第一設計規則形成電路板的多個第一接墊，並且根據第二設計規則形成重佈線結構的多個第二接墊，第一接墊中的每一者的尺寸大於所述第二接墊 中的每一者的尺寸，電路板的第一接墊配置為連接訊號源，並且重佈線結構的第二接墊配置為針測所述半導體晶圓。藉由電路板和重佈線結構之間的垂直導電路徑將重佈線結構電性耦合到電路板。
在一些實施例中，將重佈線結構電性耦合到電路板的步驟包括：在將電路板接合到重佈線結構之後，在電路板、接合層和重佈線結構上形成通孔；在通孔中形成導電材料以形成電路板與重佈線結構之間的垂直導電路徑。在一些實施例中，將重佈線結構電性耦合到電路板的步驟包括：在將電路板接合到重佈線結構之後，在電路板和接合層上形成盲孔以暴露出重佈線結構的至少一部分、在盲孔中形成導電材料以與重佈線結構的一部分接觸，從而在電路板和重佈線結構之間形成垂直導電路徑。在一些實施例中，將重佈線結構電性耦合到電路板的步驟包括：在將電路板接合到重佈線結構之前，提供電路板，電路板中形成有導電穿孔，其中在將電路板接合到重佈線結構之後，導電穿孔電性連接到重佈線結構。在一些實施例中，所述方法還包括在臨時載體上形成重佈線結構的第二接墊和重佈線結構的圖案化介電層、在將電路板接合到重佈線結構之後，移除臨時載體以暴露出第二接墊和圖案化介電層，其中第二接墊和圖案化介電層的暴露表面基本上是齊平的。
基於上述，空間轉換器包括根據IC設計規則形成的重佈線結構的精細接墊，使得空間轉換器的探針側可以滿足用於針測 或測試半導體晶圓的探針設備的精細間距的要求。空間轉換器還包括根據PCB設計規則形成的電路板的粗接墊，使空間轉換器的訊號源側可與測試用的PCB配合，以將訊號傳輸到探針側。此外，導電穿孔在空間轉換器中提供垂直導電路徑，從而縮短訊號長度並使操作之間的雜訊最小化，從而改善測試設備的訊號性能。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
10:訊號源載體
12:加強件
14:測試用印刷電路板
20:探針頭
22:安裝環
24:測試探針
50:臨時載體
51:離型層
100、200、300、ST:空間轉換器
110:重佈線結構
110b、130b、230b、330b:底表面
110t、130t、230t、330t:頂表面
120:接合層
130、230、320、330:電路板
132:介電層
134:圖案化佈線層
136:導電通孔
140、240、340:導電穿孔
220:圖案化接合層
350:導電特徵
CP1:精細接墊
CP2:粗接墊
CS:粗電路側
FD:精細介電層
FP:精細導電圖案
FS:精細電路側
FV:精細導電通孔
OP:開口
PC:測試設備
TH、TH’:穿孔
W:半導體晶圓
圖1A至圖1D是示出根據本發明的一些實施例的空間轉換器的製造方法的示意性剖視圖。
圖2A至圖2C是示出根據本發明的一些實施例的空間轉換器的製造方法的示意性剖視圖。
圖3A和圖3B是示出根據本發明的一些實施例的空間轉換器的製造方法的示意性剖視圖。
圖4是示出根據本發明的一些實施例的空間轉換器的應用的示意性剖視圖。
圖1A至圖1D是示出根據本發明的一些實施例的空間轉換器的製造方法的示意性剖視圖。參照圖1A，在臨時載體50上 形成重佈線結構110，並在重佈線結構110上形成接合層120。臨時載體50可由玻璃、塑料、矽、金屬或其他合適的材料製成，只要該材料能夠承受後續製程並同時承載在其上形成的結構。在一些實施例中，可在臨時載體50的頂表面上塗覆離型層51(例如光熱轉換膜或其他合適的剝離層)，以增強在後續製程中重佈線結構110從臨時載體的可剝離性。
在一些實施例中，在臨時載體50上形成包括精細導電圖案FP、精細介電層FD和精細導電通孔FV的重佈線結構110。精細介電層FD的材料可包括聚酰亞胺(polyimide，PI)、苯並環丁烯(benzocyclobutene，BCB)、聚苯並噁唑(polybenzoxazole，PBO)、無機介電材料(如氧化矽、氮化矽等)或其他合適的電性絕緣材料。精細導電圖案FP和精細導電通孔FV的材料可包括銅、金、鎳、鋁、鉑、錫、其組合、其合金或其他合適的導電材料。
舉例來說，可使用沉積製程、微影製程和蝕刻製程或其他合適的製程在臨時載體50上形成精細導電圖案FP。精細導電圖案FP可以是具有精細的線距/間距(line/spacing，L/S)佈線的圖案化導電層。接下來，可在臨時載體50上形成包括多個開口的精細介電層FD，以使用例如塗覆製程、微影蝕刻製程或其他合適的製程覆蓋精細導電圖案FP。精細介電層FD的開口可暴露出精細導電圖案FP的至少一部分以用於電性連接。在其他實施例中，在形成精細導電圖案FP之前形成精細介電層FD。可在精細介電層FD的開口內部形成導電材料，以使用合適的沉積製程形成精細 導電通孔FV。用語“導電通孔(conductive via)”可以是在層跟層之間提供電性連接並穿過一個或多個相鄰的層的平面的元件。導電材料也可形成在精細介電層FD的頂表面上，然後被圖案化以形成另一層的精細導電圖案FP。可多次執行上述步驟，使精細導電圖案FP和精細介電層FD交替堆疊且精細導電通孔FV嵌入在精細介電層FD中。精細導電通孔FV可形成為在不同層中的導電圖案FP之間電性連接和物理連接。在一些實施例中，重佈線結構110是具有精細線距/間距佈線的層的堆疊。應注意的是，圖1A中所示的重佈線結構僅為示例性的，可根據電路設計的要求形成更多層或更少層的重佈線結構。
重佈線結構110包括彼此相對的頂表面110t和底表面110b，其中底表面110b面向臨時載體50。在重佈線結構110的底表面110b處的精細導電圖案FP和精細介電層FD可以是基本上齊平的。精細導電通孔FV可以朝向臨時載體50逐漸變細。舉例來說，精細導電通孔FV包括傾斜側壁並且每個精細導電通孔FV的寬度(或直徑)在從底表面110b到頂表面110t的方向上逐漸增加。作為另一選擇，精細導電通孔FV包括相應於底表面110b的垂直側壁。
繼續參考圖1A，接合層120形成在重佈線結構110的頂表面110t上。舉例來說，接合層120形成在精細介電層FD上並覆蓋形成在精細介電層FD的頂表面上的精細導電圖案FP。在一些實施例中，在形成接合層120之前，形成另一層精細介電層FD 以覆蓋導電圖案FP的最頂層，使得接合層120形成在精細介電層FD上，而並不物理連接精細導電圖案FP。接合層120的材料可以是或包括Ajinomoto積層膜(Ajinomoto build-up，film ABF)、聚丙烯(polypropylene，PP)、環氧樹脂(epoxy resin)或其他合適的接合材料。在一些實施例中，與重佈線結構110暫時接合到臨時載體50的離型層51相比，接合層120包括永久接合層。
參照圖1B，電路板130藉由接合層120設置在重佈線結構110上並與重佈線結構110接合。舉例來說，可以將熱及/或壓力施加到接合層120，以將電路板130的底表面130b接合到重佈線結構110。在一些其他實施例中，接合層120最初形成在電路板130上而不是重佈線結構110上。電路板130可以是或可以包括單層板、雙層板、多層電路板等，並可藉由層壓法(laminated method)、增層法(build-up method)或其他合適的方法製造。在一些實施例中，電路板130包括線路結構，所述線路結構具有多個介電層132、與介電層132堆疊的多個圖案化佈線層134、以及多個導電通孔136，所述導電通孔136在不同層中物理和電性連接圖案化佈線層並嵌入在介電層132中。在一些實施例中，介電層132的最頂層覆蓋圖案化佈線層134的最頂層。
介電層132的材料可以是或可包括預浸材料(prepreg)、玻璃纖維(例如FR4)、纖維樹脂預浸材料(例如雙馬來酰亞胺三嗪(bismaleimide triazine，BT)樹脂和玻璃纖維的混合物、環氧樹脂和玻璃纖維(例如FR4)的混合物)或其他合適的電性絕緣 材料。在一些實施例中，電路板130的頂表面130t處的介電層132的最頂層及/或電路板130的底表面130b處的介電層132的最底層的材料可以不同於介電層132的中間層的材料。舉例來說，頂表面130t及/或底表面130b處的介電層132可以由抗蝕材料(resist material)製成。在一些實施例中，頂表面130t處的介電層132和圖案化佈線層134的最頂層基本上是齊平的。
在其他實施例中，頂表面130t處的介電層132的最頂層可包括多個凹槽(未示出)，所述凹槽暴露出下面的圖案化佈線層134的最頂層(例如接墊)以用於進一步連接訊號源。介電層132的材料特性可包括剛性、高可靠性、小的熱膨脹係數(coefficient of thermal expansion，CTE)等。在一些實施例中，介電層132的材料比重佈線結構110的精細介電層FD的材料更硬。圖案化佈線層134和導電通孔136的材料可包括銅、鎳、鋁或任何其他金屬或合金。舉例來說，圖案化佈線層134是圖案化的銅箔。在一些實施例中，電路板130是印刷電路板(printed circuit board，PCB)。
圖案化佈線層134包括導電圖案(或導線、接墊等)，所述導電圖案比重佈線結構110的精細導電圖案FP更粗和更厚。舉例來說，重佈線結構110的精細導電圖案FP具有比圖案化佈線層134的導電圖案更精細的線距/間距(L/S)間距。在一些實施例中，每一個導電通孔136的尺寸(例如高度、深度、寬度、外徑等)大於重佈線結構110的精細導電通孔FV的尺寸。導電通孔136可在與重佈線結構110的精細導電通孔FV相同的方向上逐漸變細。 做為另一種選擇，導電通孔136相對於重佈線結構110的精細導電通孔FV在相反方向上逐漸變細，或導電通孔136可包括基本垂直的側壁。
介電層132中的任一層的厚度可以大於重佈線結構110的精細介電層FD的厚度。電路板130和重佈線結構110可單獨製造，並可允許不同的設計規則。舉例來說，根據積體電路(integrated circuit，IC)設計規則製造重佈線結構110，並根據PCB設計規則製造電路板130。設計規則包括寬度規則、間距規則、封閉規則(enclosure rule)等。舉例來說，IC設計中任何形狀的最小寬度遠小於PCB設計中任何形狀的最小寬度。重佈線結構110的佈線密度(layout density)比電路板130的佈線密度更精細和更密集。在一些實施例中，重佈線結構110的精細導電圖案FP(如圖1A所示)的線寬(line width)小於電路板130的圖案化佈線層134的線寬。重佈線結構110的精細導電圖案FP的線距/間距(L/S)可比電路板130的圖案化佈線層134的線距/間距更精細。應注意的是，圖1B中示出的電路板130僅為示例性的，可以在電路板130中設置更多元件(例如核心層、盲孔、穿孔(through via))。
參照圖1C和圖1D，移除臨時載體50並形成多個導電穿孔(conductive through via)140，以提供重佈線結構110與電路板130之間的電性連接。舉例來說，可藉由將外部能量施加到位於重佈線結構110和臨時載體50之間的離型層51，從而剝離離型層51，以從重佈線結構110的底表面110b移除臨時載體50。可 使用其他合適的製程來移除臨時載體50和離型層51。可選擇性地在重佈線結構110的底表面110b上執行清潔製程，以去除離型層51的殘留物。
在一些實施例中，在移除臨時載體50之後，移除部分的重佈線結構110、接合層120和電路板130以形成多個穿孔(through ho1e)TH。舉例來說，執行鑽孔製程以形成穿孔TH，所述穿孔TH延伸穿過如圖1B所示的重佈線結構的底表面110b和電路板130的頂表面130t。在一些實施例中，重佈線結構110的精細導電圖案FP和電路板130的圖案化佈線層134的至少一部分被穿孔TH側向暴露出來。
隨後，可使用電鍍、濺射或其他合適的沉積製程在穿孔TH內部形成導電材料(例如銅、金、鎳、鋁、鉑、錫、其組合、其合金等)，以形成導電穿孔140。做為另一種選擇，如稍後在其他實施例中描述的在形成導電穿孔140後，移除臨時載體50，。在形成導電穿孔140之後，重佈線結構110藉由導電穿孔140電性耦合到電路板130。在一些實施例中，導電材料共形地(conformally)鍍在穿孔TH的內側壁上，使得導電穿孔140是中空的。做為另一種選擇，穿孔TH內填充導電材料，使導電穿孔140為實心柱。至此，空間轉換器100的製程基本完成。
空間轉換器100包括彼此相對的精細電路側FS和粗電路側CS。具有精細導電圖案FP的重佈線結構110位於精細電路側FS，具有圖案化佈線層134的電路板130位於粗電路側CS。提供 垂直導電路徑的導電穿孔140與重佈線結構110和電路板130互連，並在精細電路側FS和粗電路側CS之間延伸。精細導電圖案FP可包括分佈在底表面110b處的精細接墊CP1，並且圖案化佈線層134可包括分佈在頂表面130t處的粗接墊CP2。由於在臨時載體50上形成精細導電圖案FP，所以精細接墊CP1是平坦的。
重佈線結構110的精細接墊CP1的分佈(distribution layout)可比粗接墊CP2的分佈更密集。舉例來說，空間轉換器的給定區域中，相鄰的精細接墊CP1之間的間距比粗接墊CP2之間的間距更精細。在一些實施例中，重佈線結構110的精細接墊CP1能夠與用於針測(probing)半導體晶圓的精細間距探針(probing pin)吻合，並且電路板130的粗接墊CP2能夠對應於訊號源載體(如PCB)。
圖2A至圖2C是示出根據本發明的一些實施例的空間轉換器的製造方法的示意性剖視圖。在所有圖式中，相同或相似的標號表示相同或相似的元件並且不再重複其細節。參照圖2A，使用接合層120將電路板230接合到重佈線結構110，臨時載體50設置在重佈線結構110下面用於支撐。電路板230類似於圖1B中描述的電路板，它們之間的區別在於電路板230中形成有多個穿孔TH'。舉例來說，在將電路板230接合到重佈線結構110之前預先鑽出穿孔TH'。穿孔TH'可穿透介電層132並從電路板230的頂表面230t延伸到電路板230的底表面230b。在一些實施例中，圖案化佈線層134的至少一部分被穿孔TH'側向暴露出來。由於穿孔 TH'沒有延伸穿過重佈線結構110，所以穿孔TH'可被稱為盲孔(blind hole)。在一些實施例中，當執行接合製程時，可將熱及/或壓力施加到接合層120。在接合電路板230之後，接合層120的部分被穿孔TH'暴露出來。
參照圖2B，在接合電路板230之後，移除臨時載體50以暴露出重佈線結構110的底表面110b。舉例來說，可以將諸如UV雷射、可見光或熱的外部能量施加到離型層51，使重佈線結構110和臨時載體50彼此分離。可使用其他合適的製程來移除臨時載體50和離型層51。可選擇性地在重佈線結構110的底表面110b上執行清潔製程，以去除離型層51的殘留物。
在一些實施例中，移除接合層120的與穿孔TH'對應的部分，以形成具有多個開口OP的圖案化接合層220。舉例來說，可在接合層120上執行電漿蝕刻、化學蝕刻或其他合適的去除製程，直到暴露出重佈線結構110的頂表面110t處的精細導電圖案FP及/或精細介電層FD。在一些實施例中，電路板230的穿孔TH'與圖案化接合層220的開口OP連通並且精細導電圖案FP的至少一部分藉由開口OP和相應的穿孔TH'被暴露出來，以用於進一步的電氣連接。在其他實施例中，在形成圖案化接合層220的開口OP之後便移除臨時載體50。
參照圖2C，多個導電穿孔240可形成在電路板230的穿孔TH'和圖案化接合層220的對應開口OP內。導電穿孔240的形成過程類似於圖1D中描述的導電穿孔140的形成過程。至此，空 間轉換器200的製程基本完成。
空間轉換器200包括彼此相對的精細電路側FS和粗電路側CS。具有精細導電圖案FP的重佈線結構110位於精細電路側FS，具有圖案化佈線層134的電路板230位於粗電路側CS，導電穿孔240提供垂直導電路徑以互連重佈線結構110和電路板230並在精細電路側FS和粗略電路側CS之間延伸。在一些實施例中，導電穿孔240不穿透重佈線結構110，而是連接到重佈線結構110的頂表面處的精細導電圖案FP。導電穿孔240可稱為導電盲孔。在一些實施例中，導電穿孔240的一部分可形成在圖案化接合層220的開口OP的內側壁上。
圖3A和圖3B是示出根據本發明的一些實施例的空間轉換器的製造方法的示意性剖視圖。在所有圖式中，相同或相似的標號表示相同或相似的元件且不再重複其細節。參照圖3A，重佈線結構110形成在臨時載體50上方且接合層120形成在重佈線結構110上。電路板330設置有預先形成在穿孔中的多個導電穿孔340。舉例來說，在接合之前，如圖1B所描述的使用鑽孔、電鍍或其他合適的製程在電路板330上形成導電穿孔340，使導電穿孔340從電路板330的頂表面330t延伸至電路板330的底表面330b。在一些實施例中，提供有導電穿孔340的電路板330可與重佈線結構110和形成在重佈線結構110上的接合層120分開製造。
參照圖3B，提供有導電穿孔340的電路板330可藉由接合層120接合到重佈線結構110。在一些實施例中，接合層120的 對應於導電穿孔340的部分被去除，以形成圖案化接合層220，其中開口暴露出下面的重佈線結構110的精細導電圖案FP。導電材料可形成在圖案化接合層220的開口內部，以形成導電特徵350，導電特徵350物理地和電氣地連接到導電穿孔340和重佈線結構110的精細導電圖案FP。舉例來說，重佈線結構110和電路板330藉由導電穿孔340和導電特徵350電性耦合。在一些實施例中，導電穿孔340預先形成在電路板330上，而有助於藉由電鍍形成導電特徵350。
在其他實施例中，在接合電路板330之前形成具有開口的圖案化接合層220，並可在圖案化接合層220的開口中形成導電膏(conductive paste)以形成導電特徵350，然後有導電穿孔340的電路板330設置在導電特徵350和圖案化接合層220上。做為另一種選擇，在接合電路板330之前形成具有開口的圖案化接合層220，並由導電膏製成的導電特徵350可設置在電路板330的底表面上並對應於導電穿孔340，使得在接合電路板330之後，導電特徵350連接到導電穿孔340並藉由導電特徵350將導電穿孔340連接到重佈線結構110。至此，具有精細電路側FS和粗電路側CS的空間轉換器300的製程基本完成。
圖4是示出根據本發明的一些實施例的空間轉換器的應用的示意性剖視圖。參考圖4，提供包括設置在其中的空間轉換器ST的測試設備PC。在一些實施例中，測試設備PC是用於針測和測試半導體晶圓W的探針卡(probe card)。舉例來說，測試設備 PC包括訊號源載體10、包括安裝環22和多個測試探針24的探針頭20、以及插入在訊號源載體10和探針頭20之間的空間轉換器ST。在一些實施例中，訊號源載體10包括加強件(stiffener)12和由加強件12承載的測試用印刷電路板(PCB)14。測試用PCB14可作為提供訊號的訊號源。來自測試用PCB14的訊號可藉由空間轉換器ST傳輸到測試探針24。
空間轉換器ST包括位於精細電路側FS的精細接墊CP1和位於粗電路側CS的粗接墊CP2。空間轉換器ST的精細電路側FS面向半導體晶圓W，並且空間轉換器ST的粗電路側CS面向訊號源載體10。舉例來說，位於精細電路側FS的精細接墊CP1連接到探針頭20的測試探針24並且位於粗電路側CS的粗接墊CP2連接到訊號源載體10的測試用PCB14。空間轉換器ST的精細電路側FS可被視為探針頭側，空間轉換器ST的粗電路側CS可被視為訊號源側。設置在訊號源載體10和探針頭20之間的空間轉換器ST可以是上述空間轉換器中的任何一個(例如圖1D所描述的空間轉換器100、圖2C所描述的空間轉換器200、圖3B所描述的空間轉換器300)。應注意的是，圖4中所示的測試設備PC僅僅為示例性的。在一些實施例中，位於空間轉換器ST的粗電路側CS的粗接墊CP2藉由焊球(未示出)連接到測試PCB14。測試探針24可設置有精細間距以針測設置在半導體晶圓W上的測試接墊(未示出)。
基於上述，空間轉換器包括根據IC設計規則形成的重佈 線結構的精細接墊，使得空間轉換器的探針頭側可滿足用於針測或測試半導體晶圓的探針設備的精細間距的要求。空間轉換器包括根據PCB設計規則形成的電路板的粗接墊，使空間轉換器的訊號源側可與測試用PCB配合，以將訊號傳輸到探針側。此外，導電穿孔在空間轉換器中提供垂直導電路徑，從而縮短訊號長度並使操作之間的雜訊最小化，從而改善測試設備的訊號性能。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100‧‧‧空間轉換器
110‧‧‧重佈線結構
110b‧‧‧底表面
120‧‧‧接合層
130‧‧‧電路板
130t‧‧‧頂表面
134‧‧‧圖案化佈線層
140‧‧‧導電穿孔
CP1‧‧‧精細接墊
CP2‧‧‧粗接墊
CS‧‧‧粗電路側
FP‧‧‧精細導電圖案
FS‧‧‧精細電路側

Claims (9)

  1. 一種空間轉換器，用於連接訊號源和針測半導體晶圓，所述空間轉換器包括：電路板，包括線路結構，所述線路結構的多個第一接墊配置為連接所述訊號源；重佈線結構，接合到所述電路板並包括多個第二接墊，所述第二接墊配置為針測所述半導體晶圓，所述重佈線結構比所述電路板薄，其中相鄰的所述第二接墊的間距比相鄰的所述第一接墊精細，其中所述重佈線結構還包括圖案化介電層，所述圖案化介電層具有與所述第二接墊的外表面基本上齊平的外表面；以及導電穿孔，貫穿所述電路板並在所述電路板和所述重佈線結構之間提供垂直導電路徑，其中所述導電穿孔延伸穿過所述重佈線結構。
  2. 如申請專利範圍第1項所述的空間轉換器，其中所述電路板的所述線路結構包括連接到所述第一接墊的第一導電通孔，所述重佈線結構包括連接到所述第二接墊的第二導電通孔，所述電路板的所述第一導電通孔的尺寸大於所述重佈線結構的所述第二導電通孔的尺寸。
  3. 如申請專利範圍第2項所述的空間轉換器，其中所述重佈線結構的所述第二導電通孔的寬度在朝向所述電路板的方向上增加。
  4. 如申請專利範圍第1項所述的空間轉換器，還包括： 接合層，設置在所述電路板和所述重佈線結構之間，其中所述電路板的所述第一接墊和所述重佈線結構的所述第二接墊設置在遠離所述接合層的相對兩側。
  5. 如申請專利範圍第4項所述的空間轉換器，其中所述導電穿孔延伸穿過所述接合層以與所述重佈線結構接觸。
  6. 一種空間轉換器的製造方法，所述空間轉換器用於連接訊號源和針測半導體晶圓，所述製造方法包括：藉由接合層將電路板接合到重佈線結構上，其中根據第一設計規則形成所述電路板的多個第一接墊，並且根據第二設計規則形成所述重佈線結構的多個第二接墊，所述第一接墊中的每一者的尺寸大於所述第二接墊中的每一者的尺寸，所述電路板的所述第一接墊配置為連接所述訊號源，並且所述重佈線結構的所述第二接墊配置為針測所述半導體晶圓，將所述電路板接合到所述重佈線結構後，在所述電路板和所述接合層上形成盲孔，以暴露出所述重佈線結構的至少一部分；以及藉由所述電路板和所述重佈線結構之間的垂直導電路徑將所述重佈線結構電性耦合到所述電路板，其中在所述盲孔中形成導電材料以與所述重佈線結構的所述部分接觸，從而在所述電路板與重佈線結構之間形成所述垂直導電路徑。
  7. 如申請專利範圍第6項所述的空間轉換器的製造方法，其中將所述重佈線結構電性耦合到所述電路板包括：在將所述電路板接合到所述重佈線結構之後，在所述電路板 上形成穿孔，所述穿孔穿過所述接合層和所述重佈線結構；以及在所述穿孔中形成導電材料，在所述電路板和重佈線結構之間形成所述垂直導電路徑。
  8. 如申請專利範圍第6項所述的空間轉換器的製造方法，其中將所述重佈線結構電性耦合到所述電路板包括：在將所述電路板接合到所述重佈線結構之前，提供所述電路板，所述電路板中形成有導電穿孔，其中在將所述電路板接合到所述重佈線結構之後，所述導電穿孔電性連接到所述重佈線結構。
  9. 如申請專利範圍第6項所述的空間轉換器的製造方法，還包括：在臨時載體上形成所述重佈線結構的所述第二接墊和所述重佈線結構的圖案化介電層；以及在將所述電路板接合到所述重佈線結構之後，移除所述臨時載體以暴露出所述第二接墊和所述圖案化介電層，其中所述第二接墊和所述圖案化介電層的暴露表面基本上是齊平的。
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