TWI719160B - 電漿蝕刻方法 - Google Patents

電漿蝕刻方法 Download PDF

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Publication number
TWI719160B
TWI719160B TW106107824A TW106107824A TWI719160B TW I719160 B TWI719160 B TW I719160B TW 106107824 A TW106107824 A TW 106107824A TW 106107824 A TW106107824 A TW 106107824A TW I719160 B TWI719160 B TW I719160B
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TW
Taiwan
Prior art keywords
gas
etching
processing
film
processed
Prior art date
Application number
TW106107824A
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English (en)
Chinese (zh)
Other versions
TW201801178A (zh
Inventor
松浦豪
Original Assignee
日商日本瑞翁股份有限公司
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Publication date
Application filed by 日商日本瑞翁股份有限公司 filed Critical 日商日本瑞翁股份有限公司
Publication of TW201801178A publication Critical patent/TW201801178A/zh
Application granted granted Critical
Publication of TWI719160B publication Critical patent/TWI719160B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
TW106107824A 2016-03-17 2017-03-09 電漿蝕刻方法 TWI719160B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016054317 2016-03-17
JP2016-054317 2016-03-17

Publications (2)

Publication Number Publication Date
TW201801178A TW201801178A (zh) 2018-01-01
TWI719160B true TWI719160B (zh) 2021-02-21

Family

ID=59851953

Family Applications (1)

Application Number Title Priority Date Filing Date
TW106107824A TWI719160B (zh) 2016-03-17 2017-03-09 電漿蝕刻方法

Country Status (7)

Country Link
US (1) US10629447B2 (ko)
EP (1) EP3432346A4 (ko)
JP (1) JPWO2017159512A1 (ko)
KR (1) KR102411668B1 (ko)
CN (1) CN108780748B (ko)
TW (1) TWI719160B (ko)
WO (1) WO2017159512A1 (ko)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102172031B1 (ko) * 2018-01-31 2020-10-30 주식회사 히타치하이테크 플라스마 처리 방법, 및 플라스마 처리 장치
JP6874778B2 (ja) * 2019-01-09 2021-05-19 ダイキン工業株式会社 シクロブタンの製造方法
EP3985714A4 (en) * 2019-06-13 2023-07-19 Tokyo Electron Limited ETCHING PROCESS AND ETCHING DEVICE

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080085605A1 (en) * 2006-10-04 2008-04-10 Nobuyuki Negishi Dry etching method of insulating film
US20090233450A1 (en) * 2008-02-07 2009-09-17 Tokyo Electron Limited Plasma etchimg method and plasma etching apparatus
US20150235861A1 (en) * 2012-09-18 2015-08-20 Tokyo Electron Limited Plasma etching method and plasma etching apparatus

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4241045C1 (de) 1992-12-05 1994-05-26 Bosch Gmbh Robert Verfahren zum anisotropen Ätzen von Silicium
DE10246063A1 (de) * 2002-10-02 2004-04-22 Robert Bosch Gmbh Verfahren zum anisotropen Ätzen eines Siliziumsubstrates
JP2007012819A (ja) 2005-06-29 2007-01-18 Toshiba Corp ドライエッチング方法
WO2008020267A2 (en) * 2006-08-16 2008-02-21 Freescale Semiconductor, Inc. Etch method in the manufacture of an integrated circuit
EP2235742B1 (en) * 2007-12-21 2020-02-12 Solvay Fluor GmbH Process for the production of microelectromechanical systems
US20090191711A1 (en) * 2008-01-30 2009-07-30 Ying Rui Hardmask open process with enhanced cd space shrink and reduction
JP5398315B2 (ja) 2009-03-13 2014-01-29 富士フイルム株式会社 圧電素子及びその製造方法並びにインクジェットヘッド
WO2011057047A2 (en) 2009-11-09 2011-05-12 3M Innovative Properties Company Process for anisotropic etching of semiconductors
US8617411B2 (en) 2011-07-20 2013-12-31 Lam Research Corporation Methods and apparatus for atomic layer etching
US8691698B2 (en) * 2012-02-08 2014-04-08 Lam Research Corporation Controlled gas mixing for smooth sidewall rapid alternating etch process
JP2015032597A (ja) 2013-07-31 2015-02-16 日本ゼオン株式会社 プラズマエッチング方法
JP6207947B2 (ja) * 2013-09-24 2017-10-04 東京エレクトロン株式会社 被処理体をプラズマ処理する方法
JP6235981B2 (ja) * 2014-07-01 2017-11-22 東京エレクトロン株式会社 被処理体を処理する方法
JP6315809B2 (ja) * 2014-08-28 2018-04-25 東京エレクトロン株式会社 エッチング方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080085605A1 (en) * 2006-10-04 2008-04-10 Nobuyuki Negishi Dry etching method of insulating film
US20090233450A1 (en) * 2008-02-07 2009-09-17 Tokyo Electron Limited Plasma etchimg method and plasma etching apparatus
US20150235861A1 (en) * 2012-09-18 2015-08-20 Tokyo Electron Limited Plasma etching method and plasma etching apparatus

Also Published As

Publication number Publication date
EP3432346A4 (en) 2019-10-16
EP3432346A1 (en) 2019-01-23
CN108780748A (zh) 2018-11-09
CN108780748B (zh) 2023-02-17
KR102411668B1 (ko) 2022-06-20
TW201801178A (zh) 2018-01-01
KR20180123668A (ko) 2018-11-19
US20190096689A1 (en) 2019-03-28
US10629447B2 (en) 2020-04-21
JPWO2017159512A1 (ja) 2019-01-24
WO2017159512A1 (ja) 2017-09-21

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