TWI705530B - 形成金屬矽化物層的方法和由此形成的金屬矽化物層 - Google Patents

形成金屬矽化物層的方法和由此形成的金屬矽化物層 Download PDF

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TWI705530B
TWI705530B TW108111883A TW108111883A TWI705530B TW I705530 B TWI705530 B TW I705530B TW 108111883 A TW108111883 A TW 108111883A TW 108111883 A TW108111883 A TW 108111883A TW I705530 B TWI705530 B TW I705530B
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metal
substrate
silicon
processing space
target
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TW202002171A (zh
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河 任
麥克斯米利安 克雷蒙斯
美儀 石
于敏銳
班雀奇 梅保奇
美荷B 那克
正操 殷
史林尼法斯D 奈馬尼
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美商應用材料股份有限公司
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Abstract

本文中描述用於使用物理氣相沉積(PVD)製程和退火製程中的一種或物理氣相沉積製程和退火製程的組合形成低電阻率的金屬矽化物互連的方法。在一個實施方式中,一種形成多個導線互連的方法包含使濺射氣體流入處理腔室的處理空間中,向設置在該處理空間中的靶施加電力,在靠近該靶的濺射表面的區域中形成電漿,和在基板的表面上沉積金屬和矽層。本文中,該第一靶包括金屬矽合金,並且該第一靶的濺射表面相對於基板的表面成在約10°與約50°之間的角度。

Description

形成金屬矽化物層的方法和由此形成的金屬矽化物層
本文所述實施方式大體上涉及半導體元件製造設備和製程的領域,並且更特定地涉及使用物理氣相沉積(PVD)和高壓退火製程形成金屬矽化物互連的方法。
隨著下一代元件的電路密度增加並且電晶體尺寸繼續縮小,用於導線互連(wire interconnect)的材料的特性開始在主要效能指標(包含功耗、電阻-電容(RC)延遲和可靠性)方面主導元件效能。在過去的二十年中,銅已用於先進的USLI和VSLI技術中的導線互連,因為銅大體表現出相對低的電阻率,並且因此具有高導電性。然而,當元件的互連佈線的寬度縮小到互連佈線材料的電子平均自由程(eMFP)的尺寸或更小的尺寸時,材料的有效電阻率由於在互連佈線的表面處和互連佈線的晶界介面處不希望的側壁電子散射而增加。因此,對於具有銅的39nm的eMFP以下的寬度的銅互連,銅(通常用於互連的材料)的有效電阻率開始增加,並且對於具有20nm或更小的寬度的互連而言銅的有效電阻率顯著增加。另外,與銅互連一起使用的阻擋層(以防止銅材料不希望地擴散到周圍的介電質材料中)進一步促使增加導線互連的總電阻率。銅作為導線互連材料的一種有希望的替代品是矽化鎳,矽化鎳具有相對低的電阻率和小於10nm的eMFP(取決於鎳與矽的材料組成),使矽化鎳成為用於具有20nm或更小並且甚至為10nm或更小的溝槽臨界尺寸(CD)的導線互連的合適材料。
金屬矽化物(諸如矽化鎳)廣泛用於需要低電阻率和熱穩定導體材料的前端(FEOL)半導體元件製造製程中。例如,金屬矽化物通常用於形成與源極、汲極和柵極元件特徵的歐姆接觸。不幸的是,形成金屬矽化物的傳統方法(諸如退火金屬和矽的交替層以引起金屬和矽的交替層的相互擴散和金屬與矽原子之間的固態反應)一般與後端(BEOL)半導體元件製造製程(包含形成導線互連的製程)的較低熱預算要求不相容。
因此,本領域需要在較低溫度下形成金屬矽化物和金屬矽化物導線互連的改進的方法。
本文中的實施方式涉及半導體元件製造,並且更特定地涉及使用物理氣相沉積(PVD)和高壓退火的製程順序形成金屬矽化物互連的方法。
在一個實施方式中,一種在基板上形成金屬和矽層的方法包含使氣體流入處理腔室的處理空間中,向設置在所述處理空間中的靶施加電力,在靠近所述靶的濺射表面的區域中形成電漿,和在基板的表面上沉積金屬和矽層。本文中,所述靶包括金屬矽合金,並且所述靶的濺射表面相對於基板的表面成在約10°與約50°之間的角度。
在另一實施方式中,一種使多個互連特徵退火的方法包含使用輸送到第一處理空間中的氣體將第一處理空間加壓到大於大氣壓力的約1倍的壓力,將設置在第一處理空間中的基板加熱到不大於約400°C的退火溫度,和將所述基板維持在所述退火溫度約30秒或更長時間。在這個實施方式中,第一處理空間是第一處理腔室的處理空間,並且基板包括介電質層,所述介電質層具有形成在所述介電質層中的多個互連特徵。所述多個互連特徵是使用包含以下步驟的方法形成的:使氣體流入第二處理空間中,向設置在第二處理空間中的靶施加電力,在靠近第一靶的濺射表面的區域中形成電漿,和在基板的表面上和在形成於介電質層中的多個開口中沉積金屬和矽層。在這個實施方式中,第二處理空間是第二處理腔室的處理空間,靶包括金屬-矽合金,並且靶的濺射表面相對於基板的表面成在約10°與約50°之間的角度。
在另一實施方式中,一種元件的特徵在於圖案化基板,所述圖案化基板具有形成在設置於所述圖案化基板上的介電質層中的多個開口;和金屬矽化物,所述金屬矽化物設置在所述多個開口中以形成對應的多個互連。
在另一實施方式中,圖案化基板的特徵在於基板;設置在基板上的介電質層,所述介電質層具有形成於所述介電質層中的多個開口;和沉積在多個開口中和沉積在介電質層的場表面上的金屬和矽層,其中如所沉積的金屬和矽層包括金屬和矽的混合物,所述混合物具有MX Si(1-X) 的原子組成,其中X在約0.4與約0.6之間。
在另一實施方式中,提供一種圖案化基板。所述圖案化基板包含基板;設置在基板上的介電質層,所述介電質層包含形成在介電質層中的多個開口;和沉積在多個開口中和沉積在介電質層的場表面上的鎳和矽層。本文中,如所沉積的鎳和矽層包括金屬和矽的混合物,所述混合物具有NiX Si(1-X) 的原子組成,其中X在約0.4與約0.6之間。
本文中的實施方式涉及半導體元件製造,並且更特定地涉及使用物理氣相沉積(PVD)和高壓退火的製程順序形成金屬矽化物互連的方法。在一些實施方式中,所述製程順序包含在基板(所述基板上形成有多個開口)上沉積金屬和矽的混合物的層,在金屬和矽層上沉積諸如金屬氮化物層的鈍化層,和在高壓氣氛中使基板退火。通常,多陰極PVD腔室用於沉積金屬和矽層與鈍化層兩者,並且高壓退火腔室用於使金屬和矽層退火以形成低電阻率金屬矽化物互連。
使用多陰極(即,多濺射靶)PVD腔室來實踐本文所述的方法允許比通常用於傳統單靶PVD腔室的靶直徑小的靶直徑。一些靶材料(諸如,氮化物、氧化物、金屬和矽合金,和金屬矽化物)的較小靶直徑有益地減少由這些靶材料形成的靶由於在靶的壽命期間來自靶表面的材料的不均勻侵蝕而破裂的機會。靶材料的不均勻磨損引起靶內機械應力,所述靶內機械應力在沉積製程期間引起靶材料彎曲和撓曲。靶的這種彎曲和撓曲導致不希望的破裂。然而,因為與較小直徑的靶相關聯的彎曲小於與較大直徑的靶相關聯的彎曲,所以本文中使用的較小直徑的靶理想地較不易破裂。另外,使用多靶PVD腔室允許沉積鈍化層而不使基板和沉積在基板上的金屬和矽層暴露於大氣條件或者需要到第二處理腔室的耗時的傳送順序。使用高壓(例如,高於大氣壓力)處理腔室來使金屬和矽層退火使得能夠通過金屬和矽層的低溫高壓退火在與BEOL熱預算要求相容的退火溫度下(本文中是在400°C或更低的退火溫度下)形成結晶相金屬矽化物層。如本文中所使用,大氣壓力為約1巴。
圖1A是根據一個實施方式的用於實踐本文所述方法的示例性多陰極物理氣相沉積(PVD)腔室的示意性橫截面圖。PVD腔室100的特徵在於一個或多個側壁101、腔室蓋102和腔室底座103,它們一起限定處理空間104。處理空間104流體地耦接到真空,諸如一個或多個專用真空泵,所述真空泵將處理空間104維持在低於大氣壓力的條件下並從處理空間104中排出處理氣體和其他氣體。
設置在處理空間104中的基板支撐件105設置在可移動的支撐軸106上,所述可移動的支撐軸106密封地延伸穿過腔室底座103,諸如,在腔室底座103下方的區域中被波紋管(未示出)環繞。本文中,PVD腔室100通常被配置為便於通過一個或多個側壁101中的一個側壁中的開口108將基板400傳送到基板支撐件105和從基板支撐件105傳送基板400,所述開口108通常在基板處理期間由門或閥(未示出)密封。在一些實施方式中,支撐軸106進一步耦接到致動器(未示出),所述致動器在基板處理期間圍繞軸線A旋轉支撐軸106並且因此旋轉設置在基板支撐件105上的基板400,這在某些處理條件下改善基板400的表面上的沉積層的厚度均勻性。
本文中,PVD腔室100的特徵在於多個陰極109。陰極109中的一個或多個陰極的特徵在於設置在處理空間104中的靶組件110、耦接靶組件110的陰極殼111(其中陰極殼111和靶組件限定殼空間112)和設置在殼空間112中的磁體組件113。在一些實施方式中,靶組件110包含設置在靶背板115上並與靶背板115接合的濺射靶114。在其他實施方式中,靶組件110包括由待濺射的靶材料形成的單塊主體。在一些實施方式中,磁體組件113耦接到可旋轉軸116,可旋轉軸116使磁體組件113圍繞軸線B在靶組件110的後非濺射側之上旋轉。本文中陰極109中的每一個均耦接到電源117,諸如,RF頻率電源、DC電源或脈衝DC電源。在一些實施方式中,通過與殼空間112流體連通的冷卻流體源(未示出)將具有相對高電阻率的冷卻流體提供到殼空間112,以冷卻磁體組件113和相鄰的靶組件110。
通常,PVD腔室100包含設置在處理空間104中並在相鄰的靶組件110之間延伸的遮罩組件(未示出),所述遮罩組件定位成防止串擾(在共同濺射製程期間一個陰極電源對另一個陰極電源的不希望的電干擾))和交叉靶污染(在共同濺射、順序濺射或單濺射製程期間材料從一個陰極的靶到另一個陰極的靶上的不希望的沉積)。
本文中,陰極109中的每一個均包含波紋管120和耦接到腔室蓋102外部和耦接到陰極殼111的角度調整機構(未示出)。波紋管120用於通過防止大氣氣體進入處理空間104和處理氣體從處理空間104洩漏到周圍環境來維持處理空間104的真空條件,同時允許陰極殼111相對於腔室主體的角度調整。角度調整機構用於改變和接著固定陰極殼111的位置並且因此改變和接著固定耦接至陰極殼111的靶114的濺射表面,所述濺射表面相對於基板400的表面成某個角度,這將參考圖1B進一步詳細描述。
圖1B圖示根據一個實施方式的當基板400處於升高的基板處理位置時陰極109中的任何一個陰極的靶114與基板400的相對位置。靶114以從靶114的最靠近基板的表面的平面的一部分測量的垂直距離Z與基板400的表面的平面間隔開。本文中,垂直距離Z在約100mm與約400mm之間,諸如在約150mm與約250mm之間,諸如在約200mm與約300mm之間,例如在約225mm與約275mm之間。靶114的濺射表面相對於基板400的表面成角度θ,角度θ在約10度與約50度之間,諸如在約20度與約40度之間,例如在約20度與約30度之間或者在約30度與約40度之間。
通常,基板400具有300mm或更大的直徑,並且靶114具有小於基板400的直徑的直徑,諸如小於300mm,諸如為200mm或更小,或者150mm或更小,例如,在約50mm與約200mm之間,諸如在約50mm與約150mm之間,或者為約100mm。在一些實施方式中,靶的厚度(例如形成靶的金屬-矽合金的厚度)在約2mm與約5mm之間。
圖2是根據一個實施方式的用於實踐本文所述方法的示例性高壓退火腔室的示意性橫截面圖。退火腔室200的特徵在於限定處理空間202的腔室主體201和設置在處理空間202中的基板支撐件203。本文中,退火腔室為單個基板處理腔室,單個基板處理腔室被配置為使用嵌入基板支撐件203中的熱源(諸如電阻式加熱器204)將設置在基板支撐件203上的基板400加熱到所需溫度。在一些實施方式中,基板支撐件為熱板。在一些其他實施方式中,熱源是輻射熱源,諸如位於基板400上方、下方或者在基板400上方和基板400下方的多個燈,以向基板400輻射熱量。在一些其他實施方式中,退火腔室是批次處理腔室,批次處理腔室被配置為在單個退火製程順序中加熱多個基板。
本文中,處理空間202流體地耦接到高壓氣源205和真空源(諸如一個或多個專用真空泵)或者耦接到共同的製造排放裝置。本文中,高壓氣源205包含一個或多個高壓氣瓶(未示出),所述高壓氣瓶具有大於處理空間中的所需處理壓力的壓力。在其他實施方式中,高壓氣源205包含一個或多個泵(未示出),所述一個或多個泵對輸送到所述泵中的一種或多種退火氣體加壓。在基板處理期間,通過分別操作流體地耦接到高壓氣體源205和真空源的閥206a和206b,處理空間202理想地被維持在高於大氣壓力的壓力下,諸如,在大氣壓力的約1倍與約100倍之間。本文中,退火腔室200能夠將基板加熱到並維持在高至800℃的溫度,通常在200℃與800℃之間。本文中,退火腔室200是獨立的腔室或者是多個連接的腔室中的一個,退火腔室200不耦接到圖1A中所描述的多陰極PVD腔室100。在其他實施方式(未示出)中,退火腔室200和PVD腔室100是多腔室(即,群集工具)處理系統的部分並且通過傳送腔室耦接,傳送腔室允許將基板從PVD腔室100傳送到退火腔室200而不使基板暴露於大氣條件。
圖3A是根據一個實施方式的在基板上形成金屬和矽層的方法的流程圖。圖3B是根據一個實施方式的使金屬和矽層退火以形成低電阻率的金屬矽化物導線互連的方法的流程圖。圖4A至4D圖示根據一個實施方式使用圖3A至圖3B中所述的組合方法形成金屬矽化物互連。
在活動301處,方法300包含使濺射氣體流入處理空間,此處是第一處理空間,所述第一處理空間是第一處理腔室的處理空間,諸如圖1A中所述的多陰極PVD腔室的處理空間。通常,濺射氣體包括惰性氣體,例如Ar、He、Ne、Kr、Xe或上述項的組合。在一些實施方式中,在沉積製程期間,第一處理空間理想地被維持在小於約10毫托的壓力下,諸如小於約5毫托,諸如小於約1毫托,例如在約0.5毫托與約1毫托之間。
在活動302處,方法300包含向設置在第一處理空間中的第一靶施加電力。在此,第一靶包括金屬-矽合金,例如TiSi、NiSi、PtSi或CoSi。在一些實施方式中,第一靶包括具有NiX Si(1-X) 原子組成的非晶鎳矽合金,其中X在約0.4與約0.6之間,例如約0.5。此處,第一靶接合到背板,例如,銅背板。在一些實施方式中,在沉積製程期間,第一靶理想地被維持在約15℃與約30℃之間的溫度。
在一些實施方式中,第一靶進一步包括碳,例如TiSiC。在其他實施方式中,第一靶包括金屬-金屬-矽合金或者金屬-金屬-碳合金,例如TiAlSi或TiAlC。在本文中的實施方式中,第一靶的濺射表面相對於基板的表面成在約10°與約50°之間的角度,諸如,在約20°與約40°之間。在一些實施方式中,第一靶的直徑小於基板的直徑,諸如在基板的直徑為300mm或更大的實施方式中。在一些實施方式中,第一靶的直徑在約50mm與約200mm之間,或者例如為約200mm或更小,諸如約150mm或更小。通常,取決於腔室配置,從第一靶濺射的材料可覆蓋基板表面的約60%與約80%之間。因此,在一些實施方式中,所述方法進一步包含在沉積製程期間旋轉基板。
通常,施加到第一靶的電力是從RF頻率(或其他交流頻率)電源、DC電源或者脈衝DC電源輸送的。本文中,電源耦接到第一靶,耦接到背板,所述背板使第一靶接合到背板並因此電耦接到背板。通常,當使用時,施加到靶的RF電力在約100瓦特與約1000瓦特之間,或者施加到靶的DC電力在約600瓦特與約1200瓦特之間。在一些實施方式中,施加到靶的脈衝DC電力具有在約25kHz與約250kHz之間的脈衝頻率和在約10%與約90%之間的導通時間工作週期(on-time duty cycle)。
在活動303處,方法300包含在靠近第一靶的濺射表面的區域中形成第一電漿。
在活動304處,方法300包含將金屬和矽層沉積在基板的表面上,諸如圖4A中所圖示的圖案化基板400。在一些實施方式中,方法300進一步包含在將金屬和矽層沉積在基板的表面上的同時旋轉基板。
在一些實施方式中,方法300進一步包含在金屬和矽層上沉積鈍化層,諸如圖4C中所示的鈍化層405。鈍化層的示例包含金屬-氮化物層或者金屬-氧化物層(其中金屬為Al、Cr、Zn、Ti中的一種或上述項的組合)或者氧化矽或氮化矽層。在一些實施方式中,鈍化層405在用於沉積金屬和矽層404a的相同多陰極PVD腔室中沉積,並且因此在基板不破壞真空的情況下沉積。在一些實施方式中,鈍化層405包括在與金屬和矽層相同的處理腔室中沉積的TiN,並且因此基板不破壞真空。在一些實施方式中,靶包括TiN,並且濺射氣體包括惰性氣體,例如Ar、He、Ne、Kr、Xe或上述項的組合。使用TiN靶和沉積TiN鈍化層的惰性濺射氣體理想地避免將基板(基板上沉積有金屬和矽層)暴露於由通常用於形成TiN層的氮源氣體形成的電漿,所述電漿可能潛在地損壞先前沉積的鎳和矽層,例如,通過在所述鎳和矽層中形成不希望的氮化矽。因此,在一些實施方式中,用於沉積TiN層的濺射氣體是無氮的,這意味著用於形成濺射氣體的氣體不具有氮部分。
在其他實施方式中,通過以下操作來沉積TiN層:使包括惰性氣體和含氮氣體(諸如N2 、NH3 或這兩者的組合)的濺射氣體流入處理腔室,將RF電力施加到第二靶(本文中是鈦靶),在第二靶的濺射表面前面形成濺射氣體的電漿,和將TiN層沉積在金屬和矽層上。在一些實施方式中,鈍化層具有約5nm或更大的厚度T,諸如約10nm或更大,或者約15nm或更大。通常,第二靶相對於基板支撐件的表面並且因此相對於定位在基板支撐件上的基板的活性表面(active surface)成在約10°與約50°之間的角度,諸如在約20°與約40°之間。
圖3B是根據一個實施方式的使金屬和矽層退火以形成低電阻率的金屬矽化物導線互連的方法的流程圖。在活動311處,方法310包含將第一處理空間加壓至大於大氣壓力的1倍的所需壓力,例如在大氣壓力的約1倍與約10倍之間的壓力,諸如大於大氣壓力的約2倍,大於大氣壓力的約3倍、大於大氣壓力的約4倍或者大於大氣壓力的約5倍。在此,第一處理空間是第一處理腔室的處理空間,諸如圖2中所描述的高壓退火腔室200。通常,通過向第一空間輸送高壓氣體來對第一空間加壓。本文所使用的高壓氣體(例如,退火氣體)的示例包含Ar、He、形成氣體(H2 和N2 的混合物)、N2 、O2 、CO、CO2 和上述項的組合。在一些實施方式中,退火氣體為Ar、He或N2 中的一種或組合。本文中,在活動312和313的持續時間內或者至少在活動313的持續時間內第一處理空間被維持在所需壓力下。
在活動312處,方法310包含將基板加熱到不大於約400℃的退火溫度。在一些實施方式中,退火溫度不高於約350℃,或者在約300℃與約400℃之間,例如在約300℃與約350℃之間。在其他實施方式中,在於活動311處對第一處理空間加壓之前,將基板加熱至退火溫度。
在活動313處,方法310包含將基板維持在退火溫度約30秒或更長時間,諸如在約30秒與約3小時之間,諸如在約30秒與約60分鐘之間、在約30秒與約10分鐘之間,例如在約30秒與約5分鐘之間,以形成金屬矽化物層404b。
在一些實施方式中,基板是圖案化基板,諸如圖4D中所示的圖案化基板400b,基板400b包括介電質層402(介電質層402中形成有多個開口(諸如圖4A中所示的開口403)),和設置在開口中以形成多個互連特徵(例如,導線互連)的金屬和矽層404a。
本文中,使用包含以下步驟的方法形成多個互連特徵:使第一濺射氣體流入第二處理空間(諸如,圖1A中所描述的多陰極PVD腔室100的處理空間),向設置在第二處理空間中的第一靶施加電力,在靠近第一靶的濺射表面的區域中形成第一電漿,和在基板的表面上並且在形成於介電質層中的多個開口中沉積金屬和矽層。
方法310的另外的實施方式包含圖3A中所描述的方法300中所述的實施方式中的任一個。在一些實施方式中,使用方法300和310中的一個或兩個形成多個鎳單矽化物互連,所述互連具有小於約20nm的寬度、2倍於寬度或更大的高度和小於約30 ohm-cm的電阻率,諸如在約10 ohm-cm與約30 ohm-cm之間。
上述方法300和310有益地允許使用與後端(BOEL)熱預算要求相容的處理溫度來形成低電阻率的結晶金屬矽化物互連,諸如適用於低於20nm範圍的鎳單矽化物互連。
圖4A圖示根據一個實施方式的示例性圖案化基板400a。本文中,圖案化基板400a包含由諸如矽的半導體材料形成的基板401,基板401上設置有介電質層402。通常,介電質層402由氮化物、碳化物或低介電常數聚合物材料形成,諸如SiO2 、SiN、SiOC、SiC、聚醯胺或上述項的組合,並且具有形成在介電質層402中的多個開口403。在一些實施方式中,開口403中每一個開口的寬度W小於約20nm,諸如小於約15nm,小於約10nm,小於約8nm,小於約7nm,例如小於約5nm。通常,開口403中的每一個開口的高度H等於或大於寬度W的約2倍。
在此,圖案化基板400a不包含阻擋層(防止一些互連材料(例如銅)不希望地擴散到介電質層402中的材料層)。在其他實施方式中,圖案化基板400a進一步包含設置在介電質層402上並充當開口403中的襯墊的阻擋層(未示出),諸如,Ta、TaN、It、W、WN或上述項的組合的層。在一些實施方式中,在與隨後沉積的金屬和矽層相同的處理腔室中沉積阻擋層,並且因此基板不破壞阻擋層與待沉積的金屬和矽層的沉積之間的真空。
圖4B圖示使用方法300沉積在圖4A中所示的圖案化基板400a上的金屬和矽層404a,諸如,鎳和矽層。通常,如所沉積的金屬和矽層404a包括具有大體上均勻的化學計量成分的金屬和矽的混合物,例如均質混合物。本文中大體上均勻的化學計量成分至少意味著當在跨金屬和矽層404a的表面的位置處或者在金屬和矽層404a內的位置處這兩處(諸如,靠近介電質層402的表面的位置、遠離介電質層402的表面的位置和位於這兩個位置之間的位置)測量時,混合物中金屬與矽的原子比變化小於5%。在一些實施方式中,金屬和矽的混合物的化學計量成分變化小於約4%,諸如小於3%,小於2%,例如小於1%。
在一些實施方式中,如所沉積的金屬和矽層404a包括具有NiX Si(1-X) 的大體上均勻的化學計量成分的非晶鎳矽合金,其中X在約0.4與約0.6之間,例如為約0.5。在一些實施方式中,如所沉積的金屬和矽層404a包括非晶鎳矽合金與結晶矽化鎳的組合,所述組合具有NiX Si(1-X) 的大體上均勻的化學計量成分,其中X在約0.4與約0.6之間,例如為約0.5。在一些實施方式中,如所沉積的金屬和矽層404a包括金屬和矽的不飽和並且熱不穩定的混合物。因此,本文的實施方式提供如所沉積的金屬和矽層404a的低溫高壓退火,以通過固態反應形成結晶相金屬矽化物。如所沉積的金屬和矽層404a的低溫高壓退火確保否則會懸掛的矽鍵的完全飽和,以提供適合於用作半導體元件中的低電阻率導線互連的熱穩定的結晶相金屬矽化物,諸如,結晶鎳單矽化物(NiSi)。本文中,低電阻率至少意味著金屬矽化物層的薄層電阻小於約60 µohm-cm,諸如小於約50 µohm-cm,小於約40 µohm-cm,例如小於約30 µohm-cm。
雖然前文針對本公開內容的實施方式,但是可以在不脫離本公開內容的基本範疇的情況下設計本公開內容的其他和另外的實施方式,並且本公開內容的範圍額由隨附的申請專利範圍決定。
100‧‧‧PVD腔室 101‧‧‧側壁 102‧‧‧腔室蓋 104‧‧‧處理空間 105‧‧‧基板支撐件 106‧‧‧支撐軸 108‧‧‧開口 109‧‧‧陰極 110‧‧‧靶組件 111‧‧‧陰極殼 112‧‧‧殼空間 113‧‧‧磁體組件 114‧‧‧濺射靶 115‧‧‧靶背板 116‧‧‧可旋轉軸 117‧‧‧電源 120‧‧‧波紋管 200‧‧‧退火腔室 201‧‧‧腔室主體 202‧‧‧處理空間 203‧‧‧基板支撐件 204‧‧‧電阻式加熱器 205‧‧‧高壓氣源 206‧‧‧閥 300‧‧‧方法 310‧‧‧方法 400‧‧‧基板 401‧‧‧基板 402‧‧‧介電質層 403‧‧‧開口 405‧‧‧鈍化層 300‧‧‧方法 301-304‧‧‧活動 311-313‧‧‧活動 400a‧‧‧圖案化基板 400b‧‧‧圖案化基板 404a‧‧‧金屬和矽層 404b‧‧‧金屬矽化物層
因此,可以詳細地理解本公開內容的上述特徵的方式,可以通過參考實施方式獲得以上簡要概述的本公開內容的更具體描述,實施方式中的一些在附圖中進行圖示。然而,應注意,附圖僅僅圖示本公開內容的典型實施方式,並且因此不應被視為對本公開內容的範圍的限制,因為本公開內容可以允許其他同等有效的實施方式。
圖1A是根據一個實施方式的用於實踐本文所述方法的示例性多陰極物理氣相沉積(PVD)腔室的示意性橫截面圖。
圖1B圖示根據一個實施方式的在基板處理期間設置在圖1A的PVD腔室中的靶和基板的相對位置。
圖2是根據一個實施方式的用於實踐本文所述方法的示例性高壓退火腔室的示意性橫截面圖。
圖3A是根據一個實施方式的在基板上形成金屬和矽層的方法的流程圖。
圖3B是根據一個實施方式的退火多個互連特徵的方法的流程圖。
圖4A至圖4D圖示根據一個實施方式的使用圖3A至圖3B中所述的組合方法來形成金屬矽化物互連。
國內寄存資訊 (請依寄存機構、日期、號碼順序註記) 無
國外寄存資訊 (請依寄存國家、機構、日期、號碼順序註記) 無
300‧‧‧方法
301-304‧‧‧活動

Claims (20)

  1. 一種處理一基板的方法,包括以下步驟:在一基板上形成一金屬和矽層,包括以下步驟:使一第一濺射氣體流入一第一處理空間,其中該第一處理空間是一第一處理腔室的一處理空間;向設置在該第一處理空間中的一第一靶施加一電力,其中該第一靶包括一金屬-矽合金,並且該第一靶的一濺射表面相對於一基板的一表面成在約10°與約50°之間的角度;在靠近該第一靶的該濺射表面的一區域中形成一第一電漿;和在該基板的該表面上沉積該金屬和矽層。
  2. 如請求項1所述的方法,進一步包括以下步驟:在一第二處理空間中使該金屬和矽層退火,其中該第二處理空間是一第二處理腔室的一處理空間,並且其中使該金屬和矽層退火之步驟包括以下步驟:使用輸送到該第二處理空間中的一加壓氣體將該第二處理空間加壓到大於大氣壓力的約1倍的一壓力;將該基板加熱到不大於約400℃的一退火溫度;和 將該基板維持在該退火溫度約30秒或更長時間。
  3. 如請求項1所述的方法,其中該金屬-矽合金的金屬是Ti、Ni、Pt、Co或上述項的一組合。
  4. 如請求項3所述的方法,其中該金屬-矽合金是具有NiXSi(1-X)原子組成的一非晶鎳-矽合金,並且其中X在約0.4與約0.6之間。
  5. 如請求項4所述的方法,其中該基板包括一介電質層,該介電質層具有形成於該介電質層中的多個開口,並且其中在該基板上沉積該金屬和矽層之步驟包含以下步驟:在該多個開口中沉積該金屬和矽層以形成多個NiSi互連。
  6. 如請求項5所述的方法,其中該第一靶的一直徑為約200mm或更小。
  7. 如請求項5所述的方法,進一步包括以下步驟:在該金屬和矽層上沉積一鈍化層,該鈍化層包括金屬氧化物、金屬氮化物、氧化矽、氮化矽或上述項的一組合中的一種。
  8. 如請求項5所述的方法,進一步包括以下步驟:在一第二處理空間中使該金屬和矽層退火,其中該第二處理空間為一第二處理腔室的一處理空間,並且 其中使該金屬和矽層退火之步驟包括以下步驟:使用輸送到該第二處理空間中的一加壓氣體將該第二處理空間加壓到在大於1倍與約10倍的大氣壓之間的一壓力;將該基板加熱到不大於約400℃的一退火溫度;和將該基板維持在該退火溫度約30秒或更長時間。
  9. 如請求項8所述的方法,其中該多個NiSi互連具有約200μohm-cm或更小的一電阻率。
  10. 一種圖案化基板,包括:一基板;設置在該基板上的一介電質層,該介電質層具有形成於該介電質層中的多個開口;和沉積在該多個開口中和沉積在該介電質層的一場表面上的一金屬和矽層,其中如所沉積的該金屬和矽層包括具有MXSi(1-X)的一原子組成的金屬和矽的一混合物,其中X在約0.4與約0.6之間,且其中如所沉積的該金屬和矽層具有一大體上均勻的化學計量成分。
  11. 如請求項10所述的圖案化基板,其中該金屬和矽層的金屬包括Ti、Ni、Pt、Co或上述項的一 組合。
  12. 如請求項11所述的圖案化基板,其中如所沉積的該金屬和矽層係根據請求項1所述之方法而形成。
  13. 如請求項12所述的圖案化基板,其中該金屬和矽層的金屬包括Ni。
  14. 如請求項13所述的圖案化基板,其中如所沉積的該金屬和矽層包括非晶鎳-矽合金與結晶矽化鎳的一組合。
  15. 一種半導體製造元件,包括:一圖案化基板,該圖案化基板具有形成在設置於該圖案化基板上的一介電質層中的多個開口;和一結晶金屬矽化物,該結晶金屬矽化物設置在該多個開口中以形成一對應的多個互連,其中該結晶金屬矽化物係由一金屬和矽層形成,該金屬和矽層係根據請求項1所述之方法而形成。
  16. 如請求項15所述的元件,其中該金屬矽化物包括Ti、Ni、Pt、Co或上述項的一組合。
  17. 如請求項15所述的元件,其中該多個互連中的單獨一個互連具有小於約20nm的一寬度和約2倍於該寬度的或者更大的一高度。
  18. 如請求項17所述的元件,其中該多個互連 由鎳單矽化物形成並且具有約200μohm-cm或更小的一電阻率。
  19. 如請求項17所述的元件,其中該多個互連由鎳單矽化物形成並且具有約60μohm-cm或更小的一電阻率。
  20. 如請求項17所述的元件,其中該多個互連由鎳單矽化物形成並且具有約30μohm-cm或更小的一電阻率。
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