TWI695458B - 底部塡充材料及使用其之半導體裝置的製造方法 - Google Patents

底部塡充材料及使用其之半導體裝置的製造方法 Download PDF

Info

Publication number
TWI695458B
TWI695458B TW103131082A TW103131082A TWI695458B TW I695458 B TWI695458 B TW I695458B TW 103131082 A TW103131082 A TW 103131082A TW 103131082 A TW103131082 A TW 103131082A TW I695458 B TWI695458 B TW I695458B
Authority
TW
Taiwan
Prior art keywords
melt viscosity
temperature
underfill material
solder
semiconductor wafer
Prior art date
Application number
TW103131082A
Other languages
English (en)
Other versions
TW201523809A (zh
Inventor
齋藤崇之
小山太一
森山浩伸
Original Assignee
日商迪睿合股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商迪睿合股份有限公司 filed Critical 日商迪睿合股份有限公司
Publication of TW201523809A publication Critical patent/TW201523809A/zh
Application granted granted Critical
Publication of TWI695458B publication Critical patent/TWI695458B/zh

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09DCOATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D163/00Coating compositions based on epoxy resins; Coating compositions based on derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08GMACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G59/00Polycondensates containing more than one epoxy group per molecule; Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups
    • C08G59/18Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing
    • C08G59/40Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing characterised by the curing agents used
    • C08G59/42Polycarboxylic acids; Anhydrides, halides or low molecular weight esters thereof
    • CCHEMISTRY; METALLURGY
    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08LCOMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L63/00Compositions of epoxy resins; Compositions of derivatives of epoxy resins
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09DCOATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D133/00Coating compositions based on homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Coating compositions based on derivatives of such polymers
    • C09D133/04Homopolymers or copolymers of esters
    • C09D133/06Homopolymers or copolymers of esters of esters containing only carbon, hydrogen and oxygen, the oxygen atom being present only as part of the carboxyl radical
    • C09D133/062Copolymers with monomers not covered by C09D133/06
    • C09D133/066Copolymers with monomers not covered by C09D133/06 containing -OH groups
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J133/00Adhesives based on homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Adhesives based on derivatives of such polymers
    • C09J133/04Homopolymers or copolymers of esters
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J133/00Adhesives based on homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Adhesives based on derivatives of such polymers
    • C09J133/04Homopolymers or copolymers of esters
    • C09J133/06Homopolymers or copolymers of esters of esters containing only carbon, hydrogen and oxygen, the oxygen atom being present only as part of the carboxyl radical
    • C09J133/062Copolymers with monomers not covered by C09J133/06
    • C09J133/066Copolymers with monomers not covered by C09J133/06 containing -OH groups
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J163/00Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
    • C09J163/08Epoxidised polymerised polyenes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3142Sealing arrangements between parts, e.g. adhesion promotors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68377Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/1302Disposition
    • H01L2224/13025Disposition the bump connector being disposed on a via connection of the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H01L2224/16146Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked the bump connector connecting to a via connection in the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16238Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/27003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/271Manufacture and pre-treatment of the layer connector preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H01L2224/29191The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H01L2224/29291The principal constituent being an elastomer, e.g. silicones, isoprene, neoprene
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29386Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2224/29387Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/731Location prior to the connecting process
    • H01L2224/73101Location prior to the connecting process on the same surface
    • H01L2224/73103Bump and layer connectors
    • H01L2224/73104Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • H01L2224/81203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H01L2224/81204Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8138Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/81399Material
    • H01L2224/814Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/81438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/81444Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/81815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/832Applying energy for connecting
    • H01L2224/83201Compression bonding
    • H01L2224/83203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • H01L2224/83204Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding with a graded temperature profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83855Hardening the adhesive by curing, i.e. thermosetting
    • H01L2224/83862Heat curing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9211Parallel connecting processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/94Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06513Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06517Bump or bump-like direct electrical connections from device to substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/94Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Medicinal Chemistry (AREA)
  • Polymers & Plastics (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Materials Engineering (AREA)
  • Wood Science & Technology (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Adhesive Tapes (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

本發明提供一種可實現寬廣之構裝容限之底部填充材料、及使用其之半導體裝置之製造方法。本發明使用底部填充材料(20),其含有環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,於5℃/min以上50℃/min以下之升溫速度條件下測量熔融黏度時之最低熔融黏度到達溫度為100℃以上150℃以下,最低熔融黏度為100Pa.s以上5000Pa.s以下。於不同升溫溫度條件下進行測量時之最低熔融黏度到達溫度之變化小,因此即便不嚴密地控制熱壓接時之溫度分佈,亦可實現無空隙構裝及良好焊接性,可實現寬廣之構裝容限。

Description

底部填充材料及使用其之半導體裝置的製造方法
本發明係關於一種用於構裝半導體晶片之底部填充材料、及使用其之半導體裝置之製造方法。
近年來,於半導體晶片之構裝方法中,為了縮短步驟,業界正研究使用在半導體IC(Integrated Circuit,積體電路)電極上貼附底部填充膜之「預供給型底部填充膜(PUF:Pre-applied Underfill Film)」。
使用該預供給型底部填充膜之構裝方法例如藉由如下方式進行(例如參照專利文獻1)。
步驟A:於晶圓上貼附底部填充膜,進行切割而獲得半導體晶片。
步驟B:於貼合有底部填充膜之狀態下,將半導體晶片位置對準而搭載。
步驟C:將半導體晶片熱壓接,藉由焊點凸塊之金屬鍵而確保傳導,及藉由底部填充膜之硬化而進行接著。
底部填充材料係隨著溫度上升,於開始反應之前黏度下降(液狀化),以反應開始點為分界點黏度上升,而成為硬化物。藉由此種黏度變化而容易消除空隙,反之,若弄錯改變壓力之時機,則容易殘留空隙。為了時機良好地施加壓力,通常根據構裝之分佈進行調整。根據施加壓力 之時機與底部填充材料之黏度而決定最佳條件,因此需要在實際使用晶片之構裝等中找出最佳構裝條件。
於對該等進行研究時,通常使用流變儀之資料。例如,於圖10所示之熔融黏度曲線中,NCF1適合於低溫短時間之構裝,NCF3適合於高溫長時間構裝。然而,流變儀之升溫速度與構裝時之升溫速度大不相同,因此難以僅利用流變儀資料來判斷是否適合無空隙構裝。
無空隙構裝會對實際之構裝品之形狀/熱傳導等產生影響,因此實現無空隙之底部填充材料容易成為各式各樣。又,底部填充材料無法僅以通常確定之構裝分佈進行良好之構裝,而使構裝容限狹窄。
[專利文獻1]日本特開2005-28734號公報
本發明係鑒於此種習知之實際情況而提出者,提供一種可實現寬廣之構裝容限之底部填充材料、及使用其之半導體裝置之製造方法。
為了解決上述課題,本發明係一種於將形成有附焊料電極之半導體晶片搭載於形成有與附焊料電極對向之對向電極的電子零件之前,被預先貼合於半導體晶片的底部填充材料,其特徵在於:含有環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,於5℃/min以上50℃/min以下之升溫速度條件下測量熔融黏度時之最低熔融黏度到達溫度為100℃以上150℃以下,最低熔融黏度為100Pa.s以上5000Pa.s以下。
又,本發明之半導體裝置之製造方法的特徵在於具有:搭載步驟:將形成有附焊料電極且於該電極面貼合有底部填充材料之半導體晶片搭載於形成有與上述附焊料電極對向之對向電極的電子零件;及熱壓接步驟:將上述半導體晶片與上述電子零件熱壓接, 上述底部填充材料含有環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,於5℃/min以上50℃/min以下之升溫速度條件下測量熔融黏度時之最低熔融黏度到達溫度為100℃以上150℃以下,最低熔融黏度為100Pa.s以上5000Pa.s以下。
根據本發明,於不同升溫溫度條件下進行測量時之最低熔融黏度到達溫度之變化小,因此即便不嚴密地控制熱壓接時之溫度分佈,亦可實現無空隙構裝及良好焊接性,可實現寬廣之構裝容限。
1‧‧‧晶圓
2‧‧‧底部填充膜
3‧‧‧治具
4‧‧‧刀片
10‧‧‧半導體晶片
11‧‧‧半導體
12‧‧‧電極
13‧‧‧焊料
20‧‧‧底部填充材料
21‧‧‧接著劑層
30‧‧‧電路基板
31‧‧‧基材
32‧‧‧對向電極
圖1係示意地表示搭載前之半導體晶片與電路基板之剖面圖。
圖2係示意地表示搭載時之半導體晶片與電路基板之剖面圖。
圖3係示意地表示熱壓接後之半導體晶片與電路基板之剖面圖。
圖4係表示各升溫溫度條件下之熔融黏度曲線之曲線圖。
圖5係表示本實施形態之半導體裝置之製造方法的流程圖。
圖6係示意地表示在晶圓上貼附底部填充膜之步驟之立體圖。
圖7係示意地表示切割晶圓之步驟之立體圖。
圖8係示意地表示拾取半導體晶片之步驟之立體圖。
圖9係表示構裝時之溫度分佈之曲線圖。
圖10係表示熔融黏度曲線之一例之曲線圖。
以下,按照下述順序對本發明之實施形態進行詳細說明。
1.底部填充材料
2.半導體裝置之製造方法
3.實施例
<1.底部填充材料>
本實施形態之底部填充材料係於將形成有附焊料電極之半導體晶片搭載於形成有與附焊料電極對向之對向電極的電子零件之前,預先貼合於半導體晶片者。
圖1係示意地表示搭載前之半導體晶片與電路基板之剖面圖,圖2係示意地表示搭載時之半導體晶片與電路基板之剖面圖,及圖3係示意地表示熱壓接後之半導體晶片與電路基板之剖面圖。
如圖1~圖3所示,本實施形態之底部填充材料20係預先貼合於形成有附焊料電極之半導體晶片10的電極面而使用,利用底部填充材料20硬化而成之接著層21將半導體晶片10與形成有與附焊料電極對向之對向電極之電路基板30進行接合。
半導體晶片10於矽等半導體11表面形成有積體電路,並具有稱為凸塊之連接用附焊料電極。附焊料電極係於由銅等構成之電極12上接合有焊料13者,且具有將電極12厚度與焊料13厚度合計之厚度。
作為焊料,可使用Sn-37Pb共晶焊料(熔點183℃)、Sn-Bi焊料(熔點139℃)、Sn-3.5Ag(熔點221℃)、Sn-3.0Ag-0.5Cu(熔點217℃)、Sn-5.0Sb(熔點240℃)等。
電路基板30於例如硬質基板、可撓性基板等基材31上形成電路。又,於搭載半導體晶片10之構裝部形成有對向電極32,該對向電極32在與半導體晶片10之附焊料電極對向之位置具有既定厚度。
底部填充材料20含有膜形成樹脂、環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物。
膜形成樹脂相當於平均分子量為10000以上之高分子量樹脂,就膜形成性之觀點而言,較佳為10000~100000左右之平均分子量。作 為膜形成樹脂,可使用苯氧基樹脂、環氧樹脂、改質環氧樹脂、胺基甲酸酯樹脂、丙烯酸橡膠等各種樹脂。該等膜形成樹脂可單獨使用1種,亦可組合2種以上而使用。該等之中,就膜形成狀態、連接可靠性等觀點而言,本實施形態較佳使用苯氧基樹脂。
作為環氧樹脂,例如可列舉:倍環戊二烯型環氧樹脂、縮水甘油醚型環氧樹脂、縮水甘油胺型環氧樹脂、雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂、螺環型環氧樹脂、萘型環氧樹脂、聯苯型環氧樹脂、萜烯型環氧樹脂、四溴雙酚A型環氧樹脂、甲酚酚醛清漆型環氧樹脂、苯酚酚醛清漆型環氧樹脂、α-萘酚酚醛清漆型環氧樹脂、溴化苯酚酚醛清漆型環氧樹脂等。該等環氧樹脂可單獨使用1種,亦可組合2種以上而使用。該等之中,就高接著性、耐熱性之方面而言,本實施形態較佳使用倍環戊二烯型環氧樹脂。
酸酐具有去除焊料表面之氧化膜之助熔功能,因此可獲得優異之連接可靠性。作為酸酐,例如可列舉:四丙烯基琥珀酸酐、十二烯基琥珀酸酐等脂肪族酸酐,六氫鄰苯二甲酸酐、甲基四氫鄰苯二甲酸酐等脂環式酸酐,鄰苯二甲酸酐、偏苯三甲酸酐、均苯四甲酸二酐等芳香族酸酐等。該等環氧硬化劑可單獨使用1種,亦可組合2種以上而使用。該等環氧硬化劑之中,就該等中之焊料連接性之方面而言,較佳使用脂肪族酸酐。
又,較佳添加硬化促進劑。作為硬化促進劑之具體例,可列舉:2-甲基咪唑、2-乙基咪唑、2-乙基-4-甲基咪唑等咪唑類、1,8-二氮雙環(5,4,0)十一烯-7鹽(DBU鹽)、2-(二甲基胺基甲基)苯酚等三級胺類、三苯基膦等膦類、辛酸錫等金屬化合物等。
作為丙烯酸樹脂,可使用單官能(甲基)丙烯酸酯、2官能以上之(甲基)丙烯酸酯。作為單官能(甲基)丙烯酸酯,可列舉:(甲基)丙烯酸甲酯、(甲基)丙烯酸乙酯、(甲基)丙烯酸正丙酯、(甲基)丙烯酸異丙酯、(甲基) 丙烯酸正丁酯等。作為2官能以上之(甲基)丙烯酸酯,可列舉:雙酚F-EO改質二(甲基)丙烯酸酯、雙酚A-EO改質二(甲基)丙烯酸酯、三羥甲基丙烷PO改質(甲基)丙烯酸酯、多官能(甲基)丙烯酸胺基甲酸酯等。該等丙烯酸樹脂可單獨使用,亦可組合2種以上而使用。該等之中,本實施形態較佳使用2官能(甲基)丙烯酸酯。
作為有機過氧化物,例如可列舉:過氧化酯、過氧縮酮、過氧化氫、過氧化二烷基、過氧化二醯基、過氧化二碳酸酯等。該等有機過氧化物可單獨使用,亦可組合2種以上而使用。該等之中,本實施形態較佳使用過氧化酯。
又,作為其他添加組成物,較佳含有無機填料。藉由含有無機填料,可調整壓接時之樹脂層的流動性。作為無機填料,可使用矽石、滑石、氧化鈦、碳酸鈣、氧化鎂等。
亦可進而視需要添加環氧系、胺基系、巰基-硫醚系、脲基系等之矽烷偶合劑。
藉由如此併用硬化反應相對較慢之環氧系、與硬化反應相對較快之丙烯酸,可縮小於不同升溫溫度條件下進行測量時之最低熔融黏度到達溫度之變化,可實現寬廣之構裝容限。
具體而言,如圖4所示般於5℃/min以上50℃/min以下之升溫速度條件下測量熔融黏度時之最低熔融黏度到達溫度為100℃以上150℃以下,最低熔融黏度為100Pa.s以上5000Pa.s以下。藉此,即便不嚴密地控制熱壓接時之溫度分佈,亦可實現無空隙構裝及良好之焊接性。
又,最低熔融黏度較佳為1000Pa.s以上2000Pa.s以下。藉此,可抑制熱壓接時之空隙產生。
又,丙烯酸樹脂與有機過氧化物之合計質量和環氧樹脂與酸酐之合計質量的比較佳為7:3~4:6。藉此,可獲得實現無空隙構裝及良 好焊接性之底部填充材料。
其次,對上述底部填充材料形成為膜狀之預供給型底部填充膜之製造方法進行說明。首先,使含有膜形成樹脂、環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物之接著劑組成物溶解於溶劑中。作為溶劑,可使用甲苯、乙酸乙酯等、或該等之混合溶劑。於製備樹脂組成物後,利用棒式塗佈機、塗佈裝置等塗佈於剝離基材上。
剝離基材例如係由如下積層構造構成,而防止組成物之乾燥,並且維持組成物之形狀,上述積層構造係將聚矽氧等剝離劑塗佈於PET(Poly Ethylene Terephthalate,聚對苯二甲酸乙二酯)、OPP(Oriented Polypropylene,延伸聚丙烯)、PMP(Poly-4-methylpentene-1,聚-4-甲基戊烯-1)、PTFE(Polytetrafluoroethylene,聚四氟乙烯)等而成。
其次,藉由熱烘箱、加熱乾燥裝置等使塗佈於剝離基材上之樹脂組成物乾燥。藉此,可獲得既定厚度之預供給型底部填充膜。
<2.半導體裝置之製造方法>
其次,對使用上述預供給型底部填充膜之半導體裝置之製造方法進行說明。
圖5係表示本實施形態之半導體裝置之製造方法之流程圖。如圖5所示,本實施形態之半導體裝置之製造方法含有:底部填充膜貼附步驟S1、切割步驟S2、半導體晶片搭載步驟S3、及熱壓接步驟S4。
圖6係示意地表示在晶圓上貼附底部填充膜之步驟的立體圖。如圖6所示,底部填充膜貼附步驟S1係藉由具有大於晶圓1直徑之直徑且具有環狀或框狀框架的治具3以固定晶圓1,於晶圓1上貼附底部填充膜2。底部填充膜2係於切割晶圓1時保護並固定晶圓1,於拾取時作為保持之切割膠帶發揮功能。再者,於晶圓1內嵌製作有大量IC(Integrated Circuit),於晶圓1之接著面對每個如圖1所示般藉由劃線劃分之半導體晶 片10設置附焊料電極。
圖7係示意地表示切割晶圓之步驟之立體圖。如圖7所示,切割步驟S2係沿劃線按壓刀片4來切削晶圓1,而分割成各個半導體晶片。
圖8係示意地表示拾取半導體晶片之步驟之立體圖。如圖8所示,各附底部填充膜之半導體晶片10係於保持底部填充膜之狀態下被拾取。
如圖2所示,半導體晶片搭載步驟S3係將附底部填充膜之半導體晶片10與電路基板30經由底部填充膜進行配置。又,將附底部填充膜之半導體晶片10以附焊料電極與對向電極32對向之方式進行位置對準而配置。然後,藉由加熱接合機,於使底部填充膜產生流動性但未發生正式硬化之程度的既定溫度、壓力、時間之條件下進行加熱按壓而搭載。
搭載時之溫度條件較佳為30℃以上155℃以下。又,壓力條件較佳為50N以下,更佳為40N以下。又,時間條件較佳為0.1秒以上10秒以下,更佳為0.1秒以上1.0秒以下。藉此,可成為不使附焊料電極熔融而與電路基板30側之電極接觸之狀態,可成為底部填充膜未完全硬化之狀態。又,由於在低溫下進行固定,故可抑制空隙之產生,減少對半導體晶片10之損壞。
以下之熱壓接步驟S4例如係於以既定升溫速度自第1溫度升溫至第2溫度之接合條件下,使附焊料電極之焊料熔融而形成金屬鍵,並且使底部填充膜完全硬化。
又,接合頭至搭載後之底部填充膜的開始熔融溫度為止係藉由樹脂之彈性模數而保持為一定高度,其後因升溫所伴隨之樹脂熔融而瞬間下降,到達頭之最低點。該最低點係根據頭之下降速度與樹脂之硬化速度之關係而決定。樹脂硬化進一步進行後,隨著樹脂及頭之熱膨脹而緩慢地上升。
第1溫度較佳與底部填充材料之最低熔融黏度到達溫度大致相同,較佳為50℃以上150℃以下。藉此,可使底部填充材料之硬化行為與接合條件吻合,可抑制空隙之產生。又,升溫速度較佳為50℃/sec以上150℃/sec以下。又,第2溫度亦取決於焊料之種類,較佳為200℃以上280℃以下,更佳為220℃以上260℃以下。藉此,可使附焊料電極與基板電極進行金屬鍵結,並且使底部填充膜完全硬化,而將半導體晶片10之電極與電路基板30之電極電性地、機械性地連接。
如此,本實施形態之半導體裝置之製造方法係將底部填充材料20預先貼合於形成有附焊料電極之半導體晶片10,藉此即便不嚴密地控制熱壓接時之溫度分佈,亦可實現無空隙構裝及良好之焊接性,上述底部填充材料20含有環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,於5℃/min以上50℃/min以下之升溫速度條件下測量熔融黏度時之最低熔融黏度到達溫度為100℃以上150℃以下,最低熔融黏度為100Pa.s以上5000Pa.s以下。
再者,上述實施形態係使底部填充膜作為切割膠帶發揮功能,但並不限定於此,亦可另外使用切割膠帶,於切割後使用底部填充膜進行覆晶構裝。
[其他實施形態]
又,本技術亦可應用於藉由向設置於半導體晶片之小孔內填充金屬,而電連接堆積成夾層狀之多個晶片基板的TSV(Through Silicon Via,矽穿孔)技術。
即,亦可應用於將具有形成有附焊料電極之第一面、及於第一面之相反側形成有與附焊料電極對向之對向電極的第二面之多個晶片基板積層的半導體裝置之製造方法。
於此情形時,於第一晶片基板之第一面側貼附有底部填充膜 之狀態下,搭載於第二晶片基板之第二面。其後,可藉由在附焊料電極之焊料的熔點以上之溫度將第一晶片基板之第一面與第二晶片基板之第二面熱壓接,而獲得積層有多個晶片基板之半導體裝置。
[實施例]
<3.實施例>
以下,對本發明之實施例進行說明。於本實施例中,製作預供給型底部填充膜,於5℃/min以上50℃/min以下之升溫速度條件下測量熔融黏度。然後,使用底部填充膜將具有附焊料電極之IC晶片、及具有與其對向之電極的IC基板連接而製作構裝體,對空隙及焊接進行評價。再者,本發明並不限定於該等實施例。
熔融黏度之測量、構裝體之製作、空隙之評價、及焊接之評價係以如下方式進行。
[熔融黏度之測量]
針對各底部填充膜,利用流變儀(TA公司製造之ARES)於5℃/min、1Hz之條件A,10℃/min、1Hz之條件B,20℃/min、1Hz之條件C,30℃/min、1Hz之條件D,40℃/min、1Hz之條件E及50℃/min、1Hz之條件F下測量樣品之最低熔融黏度及最低熔融黏度到達溫度。
[構裝體之製作]
於50℃、0.5MPa之條件下利用壓製機將底部填充膜貼合於晶圓上,進行切割而獲得具有附焊料電極之IC晶片。
IC晶片係大小為6mm□,厚度為200μm,且具有周邊配置之凸塊(75μm間距、384針)者,該周邊配置之凸塊於厚度20μm之由Cu構成之電極前端形成有厚度16μm之焊料(Sn-3.5Ag、熔點221℃)。
又,與其對向之IC基板同樣具有大小為8mm□、厚度100μm且對由厚度20μm之Cu構成之電極實施了Ni/Au鍍敷的周邊配置之 凸塊(75μm間距、384針)。
其次,於60℃、0.5秒、30N之條件下利用覆晶接合機將IC晶片搭載於IC基板上。
其後,以圖9所示之溫度分佈1~3利用覆晶接合機進行熱壓接。溫度分佈1係以150℃/sec之升溫速度自60℃進行壓接至150℃,其後以150℃/sec之升溫速度自150℃進行壓接至250℃的2階段壓接(20N之一定荷重)。溫度分佈2係以150℃/sec之升溫速度自60℃進行壓接至250℃的1階段壓接(20N之一定荷重)。溫度分佈3係以50℃/sec之升溫速度自60℃進行壓接至250℃的1階段壓接(20N之一定荷重)。
於熱壓接後,進而於150℃、2小時之條件下進行硬化(cure),而獲得構裝體。再者,使用覆晶接合機時之溫度係藉由熱電偶測量樣品之實際溫度而得者。
[空隙之評價]
利用SAT(Scanning Acoustic Tomograph,超音波影像裝置)觀察以溫度分佈1~3進行熱壓接之構裝體。將空隙為IC晶片面積之5%以下者評價為「○」,將空隙超過IC晶片面積之5%者評價為「×」。通常,若產生空隙,則對長期可靠性造成不良影響之可能性變高。
[焊接之評價]
對以溫度分佈1~3進行熱壓接之構裝體的傳導電阻進行測量。將傳導電阻為65Ω以上70Ω以下者評價為「○」,將其以外之情況評價為「×」。
[綜合評價]
將空隙之評價及焊接之評價兩者為「○」之情況評價為「○」,將其以外之情況評價為「×」。
<實施例>
如表1所示,調配苯氧基樹脂(品名:PKHH,聯合碳業公司製造)13.7 質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)15.1質量份、酸酐(品名:MH-700,新日本理化公司製造)8.9質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.1質量份、丙烯酸樹脂(品名:DCP,新中村化學公司製造)11.6質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.6質量份、填料A(品名:SO-E5,Admatechs公司製造)44.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.5質量份,而製備底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度50μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(50μm)/基底剝離PET(50μm))。
於表2中表示以各升溫速度測得之最低熔融黏度及最低熔融黏度到達溫度。以5℃/min測得之最低熔融黏度為1300Pa.s,最低熔融黏度到達溫度為100℃。以10℃/min測得之最低熔融黏度為1330Pa.s,最低熔融黏度到達溫度為105℃。以20℃/min測得之最低熔融黏度為1360Pa.s,最低熔融黏度到達溫度為110℃。以30℃/min測得之最低熔融黏度為1400Pa.s,最低熔融黏度到達溫度為114℃。以40℃/min測得之最低熔融黏度為1440Pa.s,最低熔融黏度到達溫度為123℃。以50℃/min測得之最低熔融黏度為1480Pa.s,最低熔融黏度到達溫度為130℃。
又,於表3中表示以溫度分佈1~3獲得之構裝體的空隙之評價及焊接之評價。以溫度分佈1獲得之構裝體的空隙相對於IC晶片面積之比率為0%,傳導電阻為68.5Ω,綜合評價為○。以溫度分佈2獲得之構裝體的空隙相對於IC晶片面積之比率為0%,傳導電阻為68.2Ω,綜合評價為○。以溫度分佈3獲得之構裝體的空隙相對於IC晶片面積之比率為0%,傳導電阻為68.1Ω,綜合評價為○。
<比較例>
如表1所示,調配苯氧基樹脂(品名:PKHH,聯合碳業公司製造)13.7質量份、環氧樹脂(品名:HP7200H,大日本油墨化學公司製造)20.6質量份、酸酐(品名:MH-700,新日本理化公司製造)12.1質量份、咪唑(品名:2MZ-A,四國化成工業公司製造)0.1質量份、丙烯酸樹脂(品名:DCP,新中村化學公司製造)3.3質量份、起始劑(品名:Perbutyl Z,日本油脂公司製造)0.2質量份、填料A(品名:SO-E5,Admatechs公司製造)44.5質量份、及填料B(品名:艾羅技RY200,日本艾羅技公司製造)5.5質量份,而製備底部填充膜之樹脂組成物。利用棒式塗佈機將其塗佈於經剝離處理之PET(Polyethylene terephthalate),利用80℃之烘箱乾燥3分鐘,製作厚度50μm之底部填充膜(保護剝離PET(25μm)/底部填充膜(50μm)/基底剝離PET(50μm))。
於表2中表示以各升溫速度測得之最低熔融黏度及最低熔融黏度到達溫度。以5℃/min測得之最低熔融黏度為1300Pa.s,最低熔融黏度到達溫度為80℃。以10℃/min測得之最低熔融黏度為1350Pa.s,最低熔融黏度到達溫度為100℃。以20℃/min測得之最低熔融黏度為1400Pa.s,最低熔融黏度到達溫度為120℃。以30℃/min測得之最低熔融黏度為1450Pa.s,最低熔融黏度到達溫度為140℃。以40℃/min測得之最低熔融黏度為1500Pa.s,最低熔融黏度到達溫度為160℃。以50℃/min測得之最低熔融黏度為1550Pa.s,最低熔融黏度到達溫度為180℃。
又,於表3中表示以溫度分佈1~3獲得之構裝體的空隙之評價及焊接之評價。以溫度分佈1獲得之構裝體的空隙相對於IC晶片面積之比率為0%,傳導電阻為開路,綜合評價為×。以溫度分佈2獲得之構裝體的空隙相對於IC晶片面積之比率為30%,傳導電阻為67.5Ω,綜合評價為×。以溫度分佈3獲得之構裝體的空隙相對於IC晶片面積之比率為10%,傳導電阻為69.2Ω,綜合評價為×。
Figure 103131082-A0202-12-0014-1
Figure 103131082-A0202-12-0014-2
Figure 103131082-A0202-12-0014-3
於比較例中,5℃/min之測量時之最低熔融黏度到達溫度低,40℃/min及50℃/min之測量時之最低熔融黏度到達溫度高,相對於升溫速度之變化,最低熔融黏度到達溫度之變化大,因此無法對應不同溫度分佈之構裝。另一方面,於實施例中,相對於升溫速度之變化,最低熔 融黏度到達溫度之變化小,因此即便不嚴密地控制熱壓接時之溫度分佈,亦可實現無空隙構裝及良好之焊接性,可實現寬廣之構裝容限。

Claims (7)

  1. 一種底部填充材料,係於將形成有附焊料電極之半導體晶片搭載於形成有與附焊料電極對向之對向電極的電子零件之前,被預先貼合於半導體晶片,該底部填充材料含有環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,於5℃/min以上50℃/min以下之升溫速度條件下測量熔融黏度時之最低熔融黏度到達溫度為100℃以上150℃以下,最低熔融黏度為100Pa.s以上5000Pa.s以下。
  2. 如申請專利範圍第1項之底部填充材料,其中,該最低熔融黏度為1000Pa.s以上2000Pa.s以下。
  3. 如申請專利範圍第1或2項之底部填充材料,其中,該環氧樹脂為倍環戊二烯型環氧樹脂,該酸酐為脂肪族酸酐。
  4. 如申請專利範圍第1或2項之底部填充材料,其中,該丙烯酸樹脂為2官能(甲基)丙烯酸酯,該有機過氧化物為過氧化酯。
  5. 如申請專利範圍第3項之底部填充材料,其中,該丙烯酸樹脂為2官能(甲基)丙烯酸酯,該有機過氧化物為過氧化酯。
  6. 一種半導體裝置之製造方法,其具有:搭載步驟:將形成有附焊料電極且於該電極面貼合有底部填充材料之半導體晶片搭載於形成有與該附焊料電極對向之對向電極的電子零件;及熱壓接步驟:將該半導體晶片與該電子零件熱壓接,該底部填充材料含有環氧樹脂、酸酐、丙烯酸樹脂、及有機過氧化物,於5℃/min以上50℃/min以下之升溫速度條件下測量熔融黏度時之最低熔融黏度到達溫度為100℃以上150℃以下,最低熔融黏度 為100Pa.s以上5000Pa.s以下。
  7. 如申請專利範圍第6項之半導體裝置之製造方法,其中,該熱壓接步驟係以50℃/sec以上150℃/sec以下之升溫速度自第1溫度升溫至第2溫度。
TW103131082A 2013-09-11 2014-09-10 底部塡充材料及使用其之半導體裝置的製造方法 TWI695458B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013188683A JP6129696B2 (ja) 2013-09-11 2013-09-11 アンダーフィル材、及びこれを用いた半導体装置の製造方法
JPJP2013-188683 2013-09-11

Publications (2)

Publication Number Publication Date
TW201523809A TW201523809A (zh) 2015-06-16
TWI695458B true TWI695458B (zh) 2020-06-01

Family

ID=52665735

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103131082A TWI695458B (zh) 2013-09-11 2014-09-10 底部塡充材料及使用其之半導體裝置的製造方法

Country Status (6)

Country Link
US (1) US9957411B2 (zh)
JP (1) JP6129696B2 (zh)
KR (1) KR101712046B1 (zh)
CN (1) CN105518842B (zh)
TW (1) TWI695458B (zh)
WO (1) WO2015037633A1 (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6069142B2 (ja) * 2013-09-11 2017-02-01 デクセリアルズ株式会社 アンダーフィル材、及びこれを用いた半導体装置の製造方法
CN110582841B (zh) * 2017-05-16 2023-08-22 迪睿合株式会社 底部填充材料、底部填充薄膜及使用其的半导体装置的制备方法
KR102353013B1 (ko) * 2017-09-28 2022-01-20 가부시키가이샤 신가와 본딩시의 반도체 칩의 가열 조건 설정 방법, 비도전성 필름의 점도 측정 방법 및 본딩 장치
JP7287647B2 (ja) * 2019-03-05 2023-06-06 株式会社新川 接合条件評価装置
JP7390824B2 (ja) * 2019-08-28 2023-12-04 デクセリアルズ株式会社 半導体装置の製造方法
KR20210060732A (ko) 2019-11-18 2021-05-27 삼성디스플레이 주식회사 표시 장치의 제조 방법
KR102696450B1 (ko) * 2019-12-05 2024-08-16 주식회사 두산 반도체 패키지용 언더필 필름 및 이를 이용하는 반도체 패키지의 제조방법
CN113053833A (zh) * 2019-12-26 2021-06-29 财团法人工业技术研究院 一种半导体装置及其制作方法
TWI717170B (zh) * 2019-12-26 2021-01-21 財團法人工業技術研究院 半導體裝置及其製作方法
TWI736093B (zh) * 2019-12-31 2021-08-11 財團法人工業技術研究院 封裝結構
KR102485700B1 (ko) * 2020-12-23 2023-01-06 주식회사 두산 반도체 패키지용 언더필 필름 및 이를 이용하는 반도체 패키지의 제조방법

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3572994B2 (ja) * 1999-04-23 2004-10-06 松下電工株式会社 固体装置接合用シートの製造方法および固体装置の基板搭載方法
US20050008873A1 (en) * 2003-07-11 2005-01-13 Hiroshi Noro Laminated sheet
US20110006419A1 (en) * 2008-02-07 2011-01-13 Sumitomo Bakelite Company Limited Film for use in manufacturing semiconductor device, method for producing semiconductor device and semiconductor device
JP2011243786A (ja) * 2010-05-19 2011-12-01 Sony Chemical & Information Device Corp 接続構造体の製造方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3736611B2 (ja) * 2000-02-01 2006-01-18 信越化学工業株式会社 フリップチップ型半導体装置用封止材及びフリップチップ型半導体装置
JP5417729B2 (ja) * 2008-03-28 2014-02-19 住友ベークライト株式会社 半導体用フィルム、半導体装置の製造方法および半導体装置
WO2010024087A1 (ja) * 2008-08-27 2010-03-04 日立化成工業株式会社 感光性接着剤組成物、並びにそれを用いたフィルム状接着剤、接着シート、接着剤パターン、接着剤層付半導体ウェハ及び半導体装置
KR101232409B1 (ko) 2009-02-27 2013-02-12 데쿠세리아루즈 가부시키가이샤 반도체 장치의 제조 방법
US8582198B2 (en) * 2009-06-17 2013-11-12 Bridgestone Corporation Information display panel
CN102549091A (zh) * 2009-09-16 2012-07-04 住友电木株式会社 粘合膜、多层电路基板、电子部件和半导体装置
WO2011058997A1 (ja) * 2009-11-13 2011-05-19 日立化成工業株式会社 半導体用接着剤組成物、半導体装置及び半導体装置の製造方法
JP5631054B2 (ja) * 2010-05-12 2014-11-26 キヤノン株式会社 液体吐出ヘッドおよびその製造方法
JP2012124244A (ja) * 2010-12-07 2012-06-28 Sony Chemical & Information Device Corp 半導体素子の実装方法、及び実装体
JP6009860B2 (ja) * 2011-11-09 2016-10-19 積水化学工業株式会社 半導体装置の製造方法
JP5965185B2 (ja) * 2012-03-30 2016-08-03 デクセリアルズ株式会社 回路接続材料、及びこれを用いた半導体装置の製造方法
JP6069142B2 (ja) * 2013-09-11 2017-02-01 デクセリアルズ株式会社 アンダーフィル材、及びこれを用いた半導体装置の製造方法
JP6069143B2 (ja) * 2013-09-11 2017-02-01 デクセリアルズ株式会社 アンダーフィル材、及びこれを用いた半導体装置の製造方法
JP6069153B2 (ja) * 2013-09-27 2017-02-01 デクセリアルズ株式会社 アンダーフィル材、及びこれを用いた半導体装置の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3572994B2 (ja) * 1999-04-23 2004-10-06 松下電工株式会社 固体装置接合用シートの製造方法および固体装置の基板搭載方法
US20050008873A1 (en) * 2003-07-11 2005-01-13 Hiroshi Noro Laminated sheet
US20110006419A1 (en) * 2008-02-07 2011-01-13 Sumitomo Bakelite Company Limited Film for use in manufacturing semiconductor device, method for producing semiconductor device and semiconductor device
JP2011243786A (ja) * 2010-05-19 2011-12-01 Sony Chemical & Information Device Corp 接続構造体の製造方法

Also Published As

Publication number Publication date
TW201523809A (zh) 2015-06-16
JP6129696B2 (ja) 2017-05-17
KR20160036062A (ko) 2016-04-01
JP2015056500A (ja) 2015-03-23
US9957411B2 (en) 2018-05-01
KR101712046B1 (ko) 2017-03-03
WO2015037633A1 (ja) 2015-03-19
CN105518842A (zh) 2016-04-20
CN105518842B (zh) 2019-10-22
US20160194517A1 (en) 2016-07-07

Similar Documents

Publication Publication Date Title
TWI695458B (zh) 底部塡充材料及使用其之半導體裝置的製造方法
JP5965185B2 (ja) 回路接続材料、及びこれを用いた半導体装置の製造方法
JP6438790B2 (ja) 半導体装置の製造方法、及びアンダーフィルフィルム
TWI637021B (zh) 底部塡充材料及使用其之半導體裝置的製造方法
US10062625B2 (en) Underfill material and method for manufacturing semiconductor device using the same
JP6069142B2 (ja) アンダーフィル材、及びこれを用いた半導体装置の製造方法
TWI649842B (zh) 底部塡充材料及使用其之半導體裝置的製造方法
WO2015045878A1 (ja) アンダーフィル材、及びこれを用いた半導体装置の製造方法