TWI692802B - 線路載板結構及其製作方法與晶片封裝結構 - Google Patents

線路載板結構及其製作方法與晶片封裝結構 Download PDF

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TWI692802B
TWI692802B TW108115003A TW108115003A TWI692802B TW I692802 B TWI692802 B TW I692802B TW 108115003 A TW108115003 A TW 108115003A TW 108115003 A TW108115003 A TW 108115003A TW I692802 B TWI692802 B TW I692802B
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layer
circuit
opening
glass substrate
conductive
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TW108115003A
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TW202042285A (zh
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林建辰
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欣興電子股份有限公司
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Priority to TW108115003A priority Critical patent/TWI692802B/zh
Priority to US16/445,242 priority patent/US10575397B1/en
Priority to CN201910699564.1A priority patent/CN111867232B/zh
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Publication of TWI692802B publication Critical patent/TWI692802B/zh
Publication of TW202042285A publication Critical patent/TW202042285A/zh

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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009—Reinforced areas, e.g. for a specific part of a flexible printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/061—Lamination of previously made multilayered subassemblies
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material

Abstract

一種線路載板結構，包括玻璃基板、抗翹層、導電層、 增層線路層以及導電通孔。玻璃基板具有第一表面、與第一表面相對的第二表面以及貫穿玻璃基板的第一開口。抗翹層配置於玻璃基板的第一表面上，具有至少一開孔以及第二開口。導電層配置於抗翹層的開孔內。增層線路層配置於玻璃基板的第二表面上。導電通孔貫穿玻璃基板，以使導電層透過導電通孔與增層線路層電性連接。導電通孔對應於抗翹層的開孔設置，第一開口對應於抗翹層的第二開口設置，且第一開口暴露出部分增層線路層。

Description

線路載板結構及其製作方法與晶片封裝結構
本發明是有關於一種線路載板結構及其製作方法，且特別是有關於一種具有抗翹層的線路載板結構及其製作方法。
目前，在電路板的線路載板結構中，線路載板結構通常會包括多層的線路層及介電層。然而，當於線路載板的單面進行增層時，容易造成線路載板有翹曲的問題。此外，當線路載板的材質(例如是BT樹脂)的平整性不佳且剛性不足時，也不適合在線路載板上進行細線路的製作。另外，當以雷射加工的方式在線路載板中製作凹槽時，也常會因為熱效應而導致線路剝離的問題。
本發明提供一種線路載板結構及其製作方法，其可改善線路載板有翹曲、平整性不佳、剛性不足的問題，具有較佳的可靠度。
本發明提供一種晶片封裝結構，包括上述的線路載板結構，具有較佳的封裝良率。
本發明的線路載板結構包括玻璃基板、抗翹層、導電層、增層線路層以及導電通孔。玻璃基板具有第一表面、與第一表面相對的第二表面以及貫穿玻璃基板的第一開口。抗翹層配置於玻璃基板的第一表面上，具有至少一開孔以及第二開口。導電層配置於抗翹層的開孔內。增層線路層配置於玻璃基板的第二表面上。導電通孔貫穿玻璃基板，以使導電層透過導電通孔與增層線路層電性連接。導電通孔對應於抗翹層的開孔設置，第一開口對應於抗翹層的第二開口設置，且第一開口暴露出部分增層線路層。
在本發明的一實施例中，上述的增層線路層至少包括第一線路層、至少一介電層、至少一第二線路層以及多個導通孔。 第一線路層配置於玻璃基板的第二表面上。介電層配置於第一線路層上。第二線路層配置於介電層上。導通孔貫穿介電層，並電性連接第一線路層與第二線路層。玻璃基板與第二線路層分別位於介電層的相對兩側。
在本發明的一實施例中，上述的第一開口暴露出增層線路層的第一線路層的部分線路。
在本發明的一實施例中，上述的抗翹層的材料為感光型介電材料(Photoimageable dielectric，PID)。
在本發明的一實施例中，上述的第一開口連接玻璃基板的第一表面與第二表面。
本發明的晶片封裝結構包括上述的線路載板結構以及晶片。晶片配置於線路載板結構的第一開口內。焊球配置於晶片上。
本發明的線路載板結構的製作方法包括以下步驟。提供玻璃基板。玻璃基板具有第一表面以及與第一表面相對的第二表面。形成增層線路層於玻璃基板的第二表面上。形成抗翹層於玻璃基板的第一表面上。抗翹層具有至少一開孔以及第二開口。形成導電通孔，且導電通孔貫穿玻璃基板。形成導電層於抗翹層的開孔內，以使導電層透過導電通孔與增層線路層電性連接。形成第一開口，且第一開口貫穿玻璃基板並暴露出部分增層線路層。導電通孔對應於抗翹層的開孔設置，且第一開口對應於抗翹層的第二開口設置。
在本發明的一實施例中，上述形成增層線路層的步驟包括以下步驟。形成第一線路層於玻璃基板的第二表面上。形成介電層於第一線路層上。形成第二線路層於介電層上。形成多個導通孔。導通孔貫穿介電層，並電性連接第一線路層與第二線路層。玻璃基板與第二線路層分別位於介電層的相對兩側。
基於上述，本發明的線路載板結構包括玻璃基板線、抗翹層、導電層、增層線路層以及導電通孔。抗翹層配置於玻璃基板的第一表面上，導電層配置於抗翹層的開孔內。增層線路層配置於玻璃基板的第二表面上。導電通孔貫穿玻璃基板，以使導電層透過導電通孔與增層線路層電性連接。其中，抗翹層可用以對抗製作增層線路層時所產生的應力，玻璃基板可提供較佳的平整 性以及剛性，玻璃基板可以蝕刻的方式形成第一開口。藉此，使得本發明的線路載板結構及其製作方法，可改善線路載板有翹曲、平整性不佳、剛性不足的問題，具有較佳的可靠度。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
10:晶片封裝結構
100:線路載板結構
110:玻璃基板
111:第一表面
112:第二表面
113:通孔
120:增層線路層
121:第一線路層
121a:部分線路
122、122a:介電層
123、123a:導通孔
124、124a:第二線路層
130:抗翹層
131:開孔
132:第二開口
133:上表面
140、140a:光阻層
141:開口
150:導電通孔
160:導電層
161:頂表面
170:第一防焊層
171、171a:開口
172:第二防焊層
180:第一開口
200:晶片
200a:主動表面
210:焊球
圖1A至圖1G繪示為本發明一實施例的一種線路載板結構的製作方法的剖面示意圖。
圖2繪示為本發明一實施例的一種晶片封裝結構的剖面示意圖。
圖1A至圖1G繪示為本發明一實施例的一種線路載板結構的製作方法的剖面示意圖。
請參照圖1A，在本實施例中，先提供玻璃基板110。其中，玻璃基板110具有第一表面111以及與第一表面111相對的第二表面112。
接著，請同時參照圖1A與圖1B，形成增層線路層120於玻璃基板110的第二表面112上。詳細來說，在本實施例中，形成增層線路層120的步驟包括以下步驟：首先，在玻璃基板110 的第二表面112上形成第一線路層121。在一些實施例中，形成第一線路層121的方法例如是，先在玻璃基板110的第二表面112上形成晶種層，且晶種層例如是包括鈦層及位於鈦層之上的銅層。接著，在晶種層上形成圖案化光阻層，以暴露出部分的晶種層。接著，例如是以電鍍的方式在暴露出的晶種層上形成導電材料。其中，導電材料可為金屬或金屬合金，例如是銅、鈦、鎢、鋁等或其組合。接著，移除光阻以及部分晶種層，以形成第一線路層121。在另一些實施例中，第一線路層121可直接接觸玻璃基板110。
然後，在形成第一線路層121於玻璃基板110的第二表面112上之後，將介電層122壓合於第一線路層121上。介電層122覆蓋第一線路層121以及玻璃基板110的第二表面112，並使第一線路層121內埋於介電層122中。接著，再形成多個導通孔123以及第二線路層124。具體來說，在介電層122中形成導通孔123，以使導通孔123貫穿介電層122。在介電層122上形成第二線路層124，以使玻璃基板110與第二線路層124分別位於介電層122的相對兩側。其中，導通孔123電性連接第一線路層121與第二線路層124。
特別要說明的是，由於玻璃基板110的平整性佳，因而使得形成在玻璃基板110上的第一線路層121以及第二線路層124可以是細線路。此外，雖然本實施例的增層線路層120至少包括一個第一線路層121、一個介電層122、一個第二線路層124以及 多個導通孔123，但本發明並不以此為限。也就是說，在其他實施例中，增層線路層還可包括一個以上的介電層(例如是介電層122a)以及一個以上的第二線路層(例如是第二線路層124a)，如圖1E所示。
而後，請參照圖1C，形成抗翹層130於玻璃基板110的第一表面111上，並壓合介電層122a於第二線路層124上。其中，抗翹層130具有至少一開孔131(圖1C中示意地繪示為四個)以及第二開口132。開孔131與第二開口132分別暴露出部分的玻璃基板110。在本實施例中，抗翹層130的材料例如是感光型介電材料(Photoimageable dielectric，PID)或其他適合的高收縮材料，但不以此為限。在一些實施例中，抗翹層130的材料不包括導電材料。在另一些實施例中，抗翹層130可直接接觸玻璃基板110。此外，介電層122a覆蓋介電層122，並暴露出部分第二線路層124。
特別要說明的是，由於抗翹層130形成在玻璃基板110的第一表面111上，使得抗翹層130可用以對抗增層線路層120在玻璃基板110的第二表面112上所產生的應力，進而可避免本實施例的線路載板結構100有翹曲的問題。此外，由於對習知的介電層材料進行圖案化時需要以雷射加工的方式，因而會有易損傷玻璃的問題，然而，在本實施例中，抗翹層130的材料為感光型介電材料，因而使得在對抗翹層130進行圖案化時可利用微影蝕刻的方式，藉此可避免對玻璃基板110造成損傷。
然後，請參照圖1D，在玻璃基板110上形成光阻層140， 並在介電層122a上形成光阻層140a。其中，光阻層140覆蓋抗翹層130。光阻層140具有多個開口141(圖1D中示意地繪示為四個)，且開口141對應於抗翹層130的開孔131設置。此外，光阻層140a覆蓋介電層122a以及由介電層122a暴露出的部分第二線路層124。在本實施例中，光阻層140、140a例如是乾膜，但不以此為限。
請繼續參照圖1D，在玻璃基板110中形成多個通孔113，以使通孔113貫穿玻璃基板110。其中，通孔113可對應於光阻層140的開口141以及抗翹層130的開孔131設置。通孔113可連接玻璃基板110的第一表面111與第二表面112，並暴露出增層線路層120的部分第一線路層121。在本實施例中，形成通孔113的方式例如是使用玻璃蝕刻劑對玻璃基板110進行蝕刻，但不以此為限。
接著，請參照圖1E，移除光阻層140、140a，並形成導電通孔150、導電層160、導通孔123a以及第二線路層124a。詳細來說，將導電材料填入於玻璃基板110的通孔113中以及抗翹層130的開孔131內，以分別形成導電通孔150以及導電層160。其中，導電通孔150貫穿玻璃基板110，且導電通孔150對應於抗翹層130的開孔131設置。導電層160可透過導電通孔150與增層線路層120的第一線路層121電性連接。此外，導電層160具有背向玻璃基板110的頂表面161，且抗翹層130具有背向玻璃基板110的上表面133。在本實施例中，導電層160的頂表面161可 高於抗翹層130的上表面133，但不以此為限。在其他實施例中，導電層160的頂表面161也可以低於抗翹層130的上表面133。
然後，請參照圖1F，在抗翹層130上形成第一防焊層170，並在增層線路層120上形成第二防焊層172。詳細來說，第一防焊層170覆蓋抗翹層130，以使第一防焊層170與玻璃基板110分別位於抗翹層130的相對兩側。第一防焊層170具有開口171、171a。其中，開口171暴露出部分的玻璃基板110，且開口171a暴露出部分的導電層160。第一防焊層170的開口171對應於抗翹層130的第二開口132設置。此外，第二防焊層172覆蓋介電層122a，以使第二防焊層172與玻璃基板110分別位於增層線路層120的相對兩側。第二防焊層172暴露出部分的第二線路層124a。
而後，請參照圖1G，在玻璃基板110中形成第一開口180。詳細來說，在對應於第一防焊層170的開口171以及抗翹層130的第二開口132的玻璃基板110中形成第一開口180。其中，第一開口180貫穿玻璃基板110並連接玻璃基板110的第一表面111與第二表面112。第一開口180暴露出增層線路層120的第一線路層121的部分線路121a。在本實施例中，形成第一開口180的方式例如是使用玻璃蝕刻劑對玻璃基板110進行蝕刻，但不以此為限。此時，以製作完成本實施例的線路載板結構100。
在本實施例中，由於玻璃基板110可以蝕刻的方式形成第一開口180，進而可避免雷射加工的熱效應而導致第一線路層 121有剝離的問題。因此，本實施例線路載板結構100可在第一開口180的底部進行佈線(例如是第一線路層121的部分線路121a)，以增加線路利用面積。
雖然本實施例是在玻璃基板110的第二表面112上設置增層線路層120，但不以此為限。也就是說，在其他未繪示的實施例中，也可在玻璃基板110的第一表面111上設置增層線路層，以使所述增層線路層堆疊於抗翹層130的上表面133上。
簡言之，本實施例的線路載板結構100包括玻璃基板110、抗翹層130、導電層160、增層線路層120以及導電通孔150。玻璃基板110具有第一表面111、與第一表面111相對的第二表面112以及貫穿玻璃基板110的第一開口180。抗翹層130配置於玻璃基板110的第一表面111上，具有至少一開孔131以及第二開口132。導電層160配置於抗翹層130的開孔131內。增層線路層120配置於玻璃基板110的第二表面112上。導電通孔150貫穿玻璃基板110，以使導電層160透過導電通孔150與增層線路層120電性連接。導電通孔150對應於抗翹層130的開孔131設置，第一開口180對應於抗翹層130的第二開口132設置，且第一開口180暴露出部分增層線路層120。其中，由於抗翹層130可用以對抗製作增層線路層120時所產生的應力，因而可避免線路載板結構100有翹曲的問題。由於玻璃基板110可提供較佳的平整性以及剛性，使得製作的細線路有較佳的可靠性。由於玻璃基板110可以蝕刻的方式形成第一開口180，進而可避免雷射加工的熱效應 而導致第一線路層121有剝離的問題，以使本實施例的線路載板結構100具有較佳的可靠度。
在此必須說明的是，下述實施例沿用前述實施例的元件標號與部份內容，其中採用相同的標號來表示相同或近似的元件，並且省略了相同技術內容的說明。關於省略部份的說明可參考前述實施例，下述實施例不再重複贅述。
圖2繪示為本發明一實施例的一種晶片封裝結構的剖面示意圖。請參照圖2，在本實施例的晶片封裝結構10中，是將晶片200配置於上述圖1G所示的線路載板結構100中。詳細來說，本實施例的晶片封裝結構10包括線路載板結構100、晶片200以及多個焊球210。其中，多個焊球210可設置於晶片200的主動表面200a上，以使晶片200可透過焊球210配置於線路載板結構100的第一開口180中。晶片200也可透過焊球210與增層線路層120的第一線路層121的部分線路121a電性連接。此外，雖然本實施例的晶片封裝結構10的晶片200是透過焊球210來配置於線路載板結構100的第一開口180中，但本發明並不對晶片的封裝方式加以限制。在一些實施例中，晶片也可以透過凸塊來配置於線路載板結構上。在其他實施例中，甚至還可以在晶片與線路載板結構之間加入膠層，例如是底膠(underfill)，以使晶片可以更緊密地貼附在線路載板結構上。
另外，本實施例的晶片封裝結構10還可作為中介層(interposer)，或是也可疊加其他的封裝結構，以形成疊層封裝 (package-on-package，POP)結構。
綜上所述，本發明的線路載板結構包括玻璃基板、抗翹層、導電層、增層線路層以及導電通孔。抗翹層配置於玻璃基板的第一表面上，導電層配置於抗翹層的開孔內。增層線路層配置於玻璃基板的第二表面上。導電通孔貫穿玻璃基板，以使導電層透過導電通孔與增層線路層電性連接。其中，抗翹層可用以對抗製作增層線路層時所產生的應力，玻璃基板可提供較佳的平整性以及剛性，玻璃基板可以蝕刻的方式形成第一開口。藉此，使得本發明的線路載板結構及其製作方法，可改善線路載板有翹曲、平整性不佳、剛性不足的問題，具有較佳的可靠度。此外，本發明提供的一種晶片封裝結構，包括上述的線路載板結構，具有較佳的封裝良率。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100:線路載板結構
110:玻璃基板
111:第一表面
112:第二表面
120:增層線路層
121:第一線路層
121a:部分線路
122、122a:介電層
123、123a:導通孔
124、124a:第二線路層
130:抗翹層
132:第二開口
133:上表面
150:導電通孔
160:導電層
170:第一防焊層
171:開口
172:第二防焊層
180:第一開口

Claims (10)

  1. 一種線路載板結構，包括：一玻璃基板，具有一第一表面、與該第一表面相對的一第二表面以及貫穿該玻璃基板的一第一開口；一抗翹層，配置於該玻璃基板的該第一表面上，具有至少一開孔以及一第二開口；一導電層，配置於該抗翹層的該開孔內；一增層線路層，配置於該玻璃基板的該第二表面上；以及一導電通孔，貫穿該玻璃基板，以使該導電層透過該導電通孔與該增層線路層電性連接，其中該導電通孔對應於該抗翹層的該開孔設置，該第一開口對應於該抗翹層的該第二開口設置，該第一開口暴露出部分該增層線路層，該導電層與該抗翹層鄰接配置，且該抗翹層未覆蓋該導電層。
  2. 如申請專利範圍第1項所述的線路載板結構，其中該增層線路層至少包括：一第一線路層，配置於該玻璃基板的該第二表面上；至少一介電層，配置於該第一線路層上；至少一第二線路層，配置於該介電層上；以及多個導通孔，貫穿該介電層，並電性連接該第一線路層與該第二線路層，其中該玻璃基板與該第二線路層分別位於該介電層的相對兩側。
  3. 如申請專利範圍第2項所述的線路載板結構，其中該第一開口暴露出該增層線路層的該第一線路層的一部分線路。
  4. 如申請專利範圍第1項所述的線路載板結構，其中該抗翹層的材料為感光型介電材料。
  5. 如申請專利範圍第1項所述的線路載板結構，其中該第一開口連接該玻璃基板的該第一表面與該第二表面。
  6. 一種晶片封裝結構，包括：一如申請專利範圍第1項至第5項中任一項所述的線路載板結構；一晶片，配置於該線路載板結構的該第一開口內，且與該線路載板電性連接。
  7. 一種線路載板結構的製作方法，包括：提供一玻璃基板，該玻璃基板具有一第一表面以及與該第一表面相對的一第二表面；形成一增層線路層於該玻璃基板的該第二表面上；形成一抗翹層於該玻璃基板的該第一表面上，且該抗翹層具有至少一開孔以及一第二開口；形成一導電通孔，且該導電通孔貫穿該玻璃基板；形成一導電層於該抗翹層的該開孔內，以使該導電層透過該導電通孔與該增層線路層電性連接；以及形成一第一開口，且該第一開口貫穿該玻璃基板並暴露出部分該增層線路層，其中該導電通孔對應於該抗翹層的該開孔設 置，該第一開口對應於該抗翹層的該第二開口設置，該導電層與該抗翹層鄰接配置，且該抗翹層未覆蓋該導電層。
  8. 如申請專利範圍第7項所述的線路載板結構的製作方法，其中形成該增層線路層的步驟包括：形成一第一線路層於該玻璃基板的該第二表面上；形成一介電層於該第一線路層上；形成一第二線路層於該介電層上；以及形成多個導通孔，且該些導通孔貫穿該介電層，並電性連接該第一線路層與該第二線路層，其中該玻璃基板與該第二線路層分別位於該介電層的相對兩側。
  9. 如申請專利範圍第8項所述的線路載板結構的製作方法，其中該第一開口暴露出該增層線路層的該第一線路層的一部分線路。
  10. 如申請專利範圍第7項所述的線路載板結構的製作方法，其中該抗翹層的材料包括感光型介電材料。
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