TWI647752B - 半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法 - Google Patents

半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法 Download PDF

Info

Publication number
TWI647752B
TWI647752B TW100123190A TW100123190A TWI647752B TW I647752 B TWI647752 B TW I647752B TW 100123190 A TW100123190 A TW 100123190A TW 100123190 A TW100123190 A TW 100123190A TW I647752 B TWI647752 B TW I647752B
Authority
TW
Taiwan
Prior art keywords
bonding layer
film
separator
dicing tape
semiconductor device
Prior art date
Application number
TW100123190A
Other languages
English (en)
Other versions
TW201205661A (en
Inventor
高本尚英
志賀豪士
淺井文輝
Original Assignee
日東電工股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日東電工股份有限公司 filed Critical 日東電工股份有限公司
Publication of TW201205661A publication Critical patent/TW201205661A/zh
Application granted granted Critical
Publication of TWI647752B publication Critical patent/TWI647752B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00Adhesives in the form of films or foils
    • C09J7/20Adhesives in the form of films or foils characterised by their carriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B37/00Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding
    • B32B37/12Methods or apparatus for laminating, e.g. by curing or by ultrasonic bonding characterised by using adhesives
    • B32B37/1284Application of adhesive
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/0004Cutting, tearing or severing, e.g. bursting; Cutter details
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B38/00Ancillary operations in connection with laminating processes
    • B32B38/10Removing layers, or parts of layers, mechanically or chemically
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3164Partial encapsulation or coating the coating being a foil
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • H01L24/92Specific sequence of method steps
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2405/00Adhesive articles, e.g. adhesive tapes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B2457/00Electrical equipment
    • B32B2457/14Semiconductor wafers
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J165/00Adhesives based on macromolecular compounds obtained by reactions forming a carbon-to-carbon link in the main chain; Adhesives based on derivatives of such polymers
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2203/00Applications of adhesives in processes or use of adhesives in the form of films or foils
    • C09J2203/326Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2301/00Additional features of adhesives in the form of films or foils
    • C09J2301/30Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier
    • C09J2301/302Additional features of adhesives in the form of films or foils characterized by the chemical, physicochemical or physical properties of the adhesive or the carrier the adhesive being pressure-sensitive, i.e. tacky at temperatures inferior to 30°C
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2461/00Presence of condensation polymers of aldehydes or ketones
    • CCHEMISTRY; METALLURGY
    • C09DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09JADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J2463/00Presence of epoxy resin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68377Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
    • H01L2221/68386Separation by peeling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54406Marks applied to semiconductor devices or parts comprising alphanumeric information
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/5442Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448Located on chip prior to dicing and remaining on chip after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • H01L2224/131Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16245Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/27001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/27003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the layer preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27Manufacturing methods
    • H01L2224/274Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2743Manufacturing methods by blanket deposition of the material of the layer connector in solid form
    • H01L2224/27436Lamination of a preform, e.g. foil, sheet or layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199Material of the matrix
    • H01L2224/2929Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/293Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/29198Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298Fillers
    • H01L2224/29299Base material
    • H01L2224/29386Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81053Bonding environment
    • H01L2224/81095Temperature settings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119Arrangement of the bump connectors prior to mounting
    • H01L2224/81191Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/81815Reflow soldering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81909Post-treatment of the bump connector or bonding area
    • H01L2224/8191Cleaning, e.g. oxide removal step, desmearing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8385Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01023Vanadium [V]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01024Chromium [Cr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0103Zinc [Zn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01042Molybdenum [Mo]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01045Rhodium [Rh]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01051Antimony [Sb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01056Barium [Ba]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01075Rhenium [Re]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/0665Epoxy resin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788Glasses, e.g. amorphous oxides, nitrides or fluorides
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1062Prior to assembly
    • Y10T156/1064Partial cutting [e.g., grooving or incising]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1062Prior to assembly
    • Y10T156/1075Prior to assembly of plural laminae from single stock and assembling to each other or to additional lamina
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1062Prior to assembly
    • Y10T156/1075Prior to assembly of plural laminae from single stock and assembling to each other or to additional lamina
    • Y10T156/1077Applying plural cut laminae to single face of additional lamina
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1052Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
    • Y10T156/1082Partial cutting bonded sandwich [e.g., grooving or incising]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor
    • Y10T156/1089Methods of surface bonding and/or assembly therefor of discrete laminae to single face of additional lamina
    • Y10T156/1092All laminae planar and face to face
    • Y10T156/1093All laminae planar and face to face with covering of discrete laminae with additional lamina
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/14Layer or component removable to expose adhesive
    • Y10T428/1471Protective layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/14Layer or component removable to expose adhesive
    • Y10T428/1476Release layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/14Layer or component removable to expose adhesive
    • Y10T428/149Sectional layer removable
    • Y10T428/1495Adhesive is on removable layer
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/15Sheet, web, or layer weakened to permit separation through thickness
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/21Circular sheet or circular blank

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Adhesive Tapes (AREA)
  • Dicing (AREA)
  • Adhesives Or Adhesive Processes (AREA)

Abstract

本發明係關於半導體裝置製造用膜,其包括:隔離膜;及複數個附有接合層之切割帶,每一者各包括切割帶及層壓於該切割帶上之接合層,該複數個切割帶係以使該接合層附著至該隔離膜之方式以預定間隔層壓於該隔離膜上,其中該隔離膜具有沿該切割帶之外周邊形成之切口,且該切口之深度為該隔離膜厚度的至多2/3。

Description

半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法
本發明係關於半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法。
最近,已日益要求半導體裝置及其封裝之薄化及小型化。因此,作為半導體裝置及其封裝,已廣泛利用其中半導體元件(例如半導體晶片)藉助覆晶結合安裝(覆晶連接)於基板上之覆晶型半導體裝置。在該覆晶連接中,將半導體晶片以其中該半導體晶片之電路面與基板之電極形成面相對之形式固定至該基板。於此一半導體裝置或類似裝置中,可存在半導體晶片之背面由保護膜保護以防止半導體晶片損壞或諸如此類之情形(參見,專利文獻1至10)。
專利文獻1:JP-A-2008-166451
專利文獻2:JP-A-2008-006386
專利文獻3:JP-A-2007-261035
專利文獻4:JP-A-2007-250970
專利文獻5:JP-A-2007-158026
專利文獻6:JP-A-2004-221169
專利文獻7:JP-A-2004-214288
專利文獻8:JP-A-2004-142430
專利文獻9:JP-A-2004-072108
專利文獻10:JP-A-2004-063551
本發明者研究用於保護半導體晶片背面之膜。因此,本 發明者已發明藉由使用半導體裝置製造用膜在半導體晶片背面附著膜之方法,其中將複數個附有接合層之切割帶(每一者各包含層壓於切割帶上之接合層)以預定間隔層壓於隔離膜上。
根據該附有接合層之切割帶所黏附之半導體晶圓之形狀(例如,環形)對其實施預切削。當將該附有接合層之切割帶黏附至半導體晶圓時,將其自該隔離膜剝離。然而,端視該附有接合層之切割帶之物理性質及設備情況而定,因該附有接合層之切割帶未能與該隔離膜充分分離而存在其他問題。
鑒於上述問題實施本發明,且本發明之目的係提供半導體裝置製造用膜,其包含隔離膜;及複數個附有接合層之切割帶,每一者各包括層壓於切割帶上之接合層,該複數個切割帶係以預定間隔層壓於該隔離膜上,其中可順利地將該附有接合層之切割帶自該隔離膜剝離;該膜之製造方法及藉由使用該半導體裝置製造用膜製造半導體裝置之方法。
本發明者出於解決業內上述問題之目的研究半導體裝置製造用膜。因此,本發明者已發現若使用以下構造,則可順利地將該附有接合層之切割帶自該隔離膜剝離,且已完成本發明。
即,本發明提供半導體裝置製造用膜,其包含:隔離膜;及複數個附有接合層之切割帶,每一者各包含切割帶 及層壓於該切割帶上之接合層,該複數個切割帶係以使該接合層附著至該隔離膜之方式以預定間隔層壓於該隔離膜上,其中該隔離膜具有沿該切割帶之外周邊形成之切口,且該切口之深度為該隔離膜厚度的至多2/3。
根據上述構造,該隔離膜經處理以具有沿該切割帶之外周邊形成之切口。因此,可自該切口開始容易地將該附有接合層之切割帶自該隔離膜剝離。由於該切口之深度(切削深度)為該隔離膜厚度的至多2/3,故當將該附有接合層之切割帶自該隔離膜剝離時,可防止該隔離膜自切削部分(切口)撕裂。因此,可順利地將該附有接合層之切割帶自該隔離膜剝離(拾取)。此處,術語「切口」在本說明書中意指其中將隔離膜切削至不超過隔離膜厚度之某一深度之部分。術語「切口」可稱作「凹槽」。
另外,本發明亦提供該半導體裝置製造用膜之製造方法,該方法包含:製備附有隔離膜之膜,其包含隔離膜及複數個附有接合層之切割帶(每一者各包含切割帶及層壓於該切割帶上之接合層),其係以使該接合層附著至該隔離膜之方式層壓於該隔離膜上;及根據對應於該膜所黏附之半導體晶圓之大小切削該附有隔離膜之膜,其中將該膜切削至該隔離膜始自該附有接合層之切割帶側之厚度之至多2/3的深度。
根據上述構造,當該附有隔離膜之膜根據該膜所黏附之半導體晶圓之大小切削時,將該膜切削至該隔離膜始自該切割帶側之厚度之至多2/3的深度。因此,在欲製造之半 導體裝置製造用膜中,該隔離膜經處理以具有沿該切割帶之外周邊形成之切口,且該切口之深度為該隔離膜厚度的至多2/3。因此,在欲根據用於製造本發明半導體裝置製造之製造方法製造之半導體裝置製造用膜中,可自該切口開始容易地將該附有接合層之切割帶自該隔離膜剝離。另外,由於該切口之深度為該隔離膜厚度的至多2/3,故當將該附有接合層之切割帶自該隔離膜剝離時,可防止該隔離膜自切削部分(切口)撕裂。因此,可順利地將該附有接合層之切割帶自該隔離膜剝離(拾取)。
本發明亦提供藉由使用上述半導體裝置製造用膜製造半導體裝置之方法,該方法包含:將該隔離膜自該半導體裝置製造用膜剝離,及將半導體晶圓附著至該接合層上。
本發明半導體裝置之製造方法使用上述半導體裝置製造用膜,其中於該隔離膜中所形成之切口之深度為該隔離膜厚度的至多2/3。因此,當將該附有接合層之切割帶自該隔離膜剝離時,可防止該隔離膜自切削部分(切口)撕裂,且可順利地將半導體晶圓黏附至該接合層上。
本發明亦提供半導體裝置製造用膜,其包含:隔離膜;及以預定間隔層壓於隔離膜上之複數個切割帶,其中該隔離膜經處理以具有沿該切割帶之外周邊形成之切口,且該切口之深度為該隔離膜厚度的至多2/3。
在上述構造中,該隔離膜經處理以具有沿該切割帶之外周邊形成之切口。因此,可自該切口開始容易地將該切割帶自該隔離膜剝離。另外,由於該切口之深度為該隔離膜 厚度的至多2/3,故當將該切割帶自該隔離膜剝離時,可防止該隔離膜自切削部分(切口)撕裂。因此,可順利地將該切割帶自該隔離膜剝離(拾取)。
本發明亦提供半導體裝置製造用膜之製造方法,該方法包含:製備附有隔離膜之膜,其包含隔離膜及層壓於該隔離膜上之複數個切割帶;及根據對應於該膜所黏附之半導體晶圓之大小切削該附有隔離膜之膜,其中將該膜切削至該隔離膜始自該切割帶側之厚度之至多2/3的深度。
在上文構造中,當根據對應於該膜所黏附之半導體晶圓之大小切削該附有隔離膜之膜時,將該膜切削至該隔離膜始自該切割帶側之厚度之至多2/3的深度。因此,在欲製造之半導體裝置製造用膜中,該隔離膜經處理以具有沿該切割帶之外周邊形成之切口,且該切口之深度為該隔離膜厚度的至多2/3。因此,在欲根據用於製造本發明半導體裝置製造用膜之製造方法製造之半導體裝置製造用膜中,可自該切口開始容易地將該切割帶自該隔離膜剝離。另外,由於該切口之深度為該隔離膜厚度的至多2/3,故當將該切割帶自該隔離膜剝離時,可防止該隔離膜自切削部分(切口)撕裂。因此,可順利地將該切割帶自該隔離膜剝離(拾取)。
本發明亦提供藉由使用上述半導體裝置製造用膜製造半導體裝置之方法,該方法包含:將該隔離膜自該半導體裝置製造用膜剝離,及將半導體晶圓附著至該切割帶上。
本發明半導體裝置之製造方法使用上述半導體裝置製造 用膜,因此,其中於該隔離膜中所形成之切口之深度為該隔離膜厚度的至多2/3。因此,當將該切割帶自該隔離膜剝離時,可防止該隔離膜自切削部分(切口)撕裂,且可順利地將半導體晶圓黏附至該接合層上。
參照圖1A及1B闡述本發明之一個實施例,然而,本發明不應受限於該等圖。圖1A係顯示此實施例之半導體裝置製造用膜之一個實例之剖面示意圖;且圖1B係其部分平面圖。在本發明說明書隨附圖示中,省略對說明無關緊要之部分,且放大或縮小一些部分以便於對其進行說明。
(半導體裝置製造用膜)
如圖1A及圖1B中所示,半導體裝置製造用膜40經設計以使在其平面圖上呈圓形之附有接合層之切割帶1以預定間隔層壓於長的隔離膜42上。
(附有接合層之切割帶)
附有接合層之切割帶1包含切割帶3,其包含基礎材料31及提供於基礎材料31上之壓敏接合層32;及提供於壓敏接合層32上之接合層2。接合層2之直徑與切割帶3之直徑相同或較佳小於切割帶3之直徑(如圖1B中所示)。附有接合層之切割帶1係經由接合層2層壓於隔離膜42上,接合層2充當其間之附著面。隔離膜42經處理以自切割帶3側沿切割帶3之外周邊具有切口44,其深度為隔離膜42厚度的至多2/3。切口44之深度較佳為隔離膜42厚度的1/6至2/3、更佳為1/3至2/3。隔離膜42經處理以具有沿切割帶3之外周邊 之切口44,因此有利於自切口44開始將附有接合層之切割帶1自隔離膜42剝離。由於切口44之深度為隔離膜42厚度的至多2/3,故當將附有接合層之切割帶1自隔離膜42剝離時,可防止隔離膜42自切削部分(切口)撕裂。因此,可順利地將附有接合層之切割帶1自隔離膜42剝離(拾取)。
(隔離膜)
作為隔離膜42,可使用者係適宜之薄片材,例如,紙及其他基於紙之基礎材料;織物、非織造織物、毛氈、網狀物及其他纖維基礎材料;金屬箔、金屬板及其他金屬基礎材料;塑膠基礎材料,例如塑膠膜或片材;基於橡膠之基礎材料,例如橡膠片材;發泡體,例如發泡體片材;及其壓層[尤其塑膠基礎材料與其他基礎材料之壓層、塑膠膜(或片材)之壓層]。作為本發明之基礎材料,較佳者係塑膠基礎材料,例如塑膠膜或片材。塑膠材料包括(例如)烯烴樹脂,例如聚乙烯(PE)、聚丙烯(PP)、及乙烯-丙烯共聚物;使用乙烯作為單體組份之共聚物,例如乙烯-乙酸乙烯酯共聚物(EVA)、離聚物樹脂、乙烯-(甲基)丙烯酸共聚物及乙烯-(甲基)丙烯酸酯(無規、交替)共聚物;聚酯,例如聚對苯二甲酸乙二酯(PET)、聚萘二甲酸乙二酯(PEN)及聚對苯二甲酸丁二酯(PBT);丙烯酸系樹脂;聚氯乙烯(PVC);聚胺基甲酸酯;聚碳酸酯;聚苯硫醚(PPS);基於醯胺之樹脂,例如聚醯胺(耐綸(Nylon))及全芳香族聚醯胺(芳香族聚醯胺(aramide));聚醚醚酮(PEEK);聚醯亞胺;聚醚醯亞胺;聚二氯亞乙烯;ABS(丙烯腈-丁二烯-苯乙烯 共聚物);基於纖維素之樹脂;聚矽氧樹脂;及氟化樹脂。隔離膜42可為單層或由兩個或更多個層形成之多層。隔離膜42可根據已知方法製造。
較佳地,至少在上面層壓有接合層2之其表面上對隔離膜42實施釋放處理。
用於釋放處理之釋放劑之實例包括基於氟之釋放劑、基於長鏈丙烯酸烷基酯之釋放劑、基於聚矽氧之釋放劑。總而言之,較佳者係基於聚矽氧之釋放劑。
隔離膜42厚度並無具體界定,其較佳為3μm至300μm,更佳為5μm至200μm,甚至更佳為10μm至100μm。當隔離膜42厚度為至少10μm時,可容易地對隔離膜42實施處理以具有深度為隔離膜42厚度至多2/3的切口。
(接合層)
接合層2具有膜形狀。在附有接合層之切割帶1或半導體裝置製造用膜40作為產物之實施例中,接合層2通常呈未固化狀態(包括半固化狀態),並在將附有接合層之切割帶1附著至半導體晶圓後實施熱固化。
較佳地,該接合層至少由熱固性樹脂形成,更佳地至少由熱固性樹脂及熱塑性樹脂形成。當該接合層至少由熱固性樹脂形成時,該接合層可有效地展示其黏附功能。
熱塑性樹脂之實例包括天然橡膠、丁基橡膠、異戊二烯橡膠、氯丁二烯橡膠、乙烯-乙酸乙烯酯共聚物、乙烯-丙烯酸共聚物、乙烯-丙烯酸酯共聚物、聚丁二烯樹脂、聚碳酸酯樹脂、熱塑性聚醯亞胺樹脂、聚醯胺樹脂(例如6-耐 綸及6,6-耐綸)、苯氧基樹脂、丙烯酸系樹脂、飽和聚酯樹脂(例如PET(聚對苯二甲酸乙二酯)或PBT(聚對苯二甲酸丁二酯))、聚醯胺醯亞胺樹脂或氟樹脂。熱塑性樹脂可單獨地或以兩個或更多個種類之組合形式使用。在此等熱塑性樹脂中,含有少量離子雜質之丙烯酸系樹脂(其具有高耐熱性且能夠確保半導體元件之可靠性)尤佳。
丙烯酸系樹脂不受特別限制,且其實例包括含有一種或兩種或更多種具有直鏈或具支鏈烷基之丙烯酸或甲基丙烯之酯作為組份的聚合物,該直鏈或具支鏈烷基具有30個或更少碳原子、較佳4個至18個碳原子、更佳6個至10個碳原子且尤其8個或9個碳原子。即,在本發明中,丙烯酸系樹脂具有亦包括甲基丙烯酸系樹脂在內之廣泛含義。烷基之實例包括甲基、乙基、丙基、異丙基、正丁基、第三丁基、異丁基、戊基、異戊基、己基、庚基、2-乙基已基、辛基、異辛基、壬基、異壬基、癸基、異癸基、十一烷基、十二烷基(月桂基)、十三烷基、十四烷基、硬脂基及十八烷基。
此外,用於形成丙烯酸系樹脂之其他單體(除其中烷基係具有30個或更少碳原子者之丙烯酸或甲基丙烯酸烷基酯以外的單體)不受特別限制,且其實例包括含羧基之單體,例如丙烯酸、甲基丙烯酸、丙烯酸羧乙酯、丙烯酸羧戊酯、衣康酸(itaconic acid)、馬來酸、富馬酸及巴豆酸;酸酐單體,例如馬來酸酐及衣康酸酐;含羥基之單體,例如(甲基)丙烯酸2-羥乙基酯、(甲基)丙烯酸2-羥丙基酯、 (甲基)丙烯酸4-羥丁基酯、(甲基)丙烯酸6-羥己基酯、(甲基)丙烯酸8-羥辛基酯、(甲基)丙烯酸10-羥癸基酯、(甲基)丙烯酸12-羥基月桂基酯及甲基丙烯酸(4-羥甲基環己基)酯;含磺酸基團之單體,例如苯乙烯磺酸、烯丙基磺酸、2-(甲基)丙烯醯胺基-2-甲基丙磺酸、(甲基)丙烯醯胺基丙磺酸、(甲基)丙烯酸磺基丙基酯及(甲基)丙烯醯氧基萘磺酸;及含磷酸基團之單體,例如磷酸2-羥基乙基丙烯醯基酯。就此而言,(甲基)丙烯酸意指丙烯酸及/或甲基丙烯酸,(甲基)丙烯酸酯意指丙烯酸酯及/或甲基丙烯酸酯,(甲基)丙烯醯基意指丙烯醯基及/或甲基丙烯醯基等,其在整個說明書中皆應適用。
此外,該熱固性樹脂之實例除環氧樹脂及酚系樹脂以外,亦包括胺基樹脂、不飽和聚酯樹脂、聚胺基甲酸酯樹脂、聚矽氧樹脂及熱固性聚醯亞胺樹脂。熱固性樹脂可單獨地或以兩個或更多個種類之組合形式使用。作為熱固性樹脂,僅含有少量侵蝕半導體元件之離子雜質之環氧樹脂係適宜的。此外,該酚系樹脂適宜用作該等環氧樹脂之固化劑。
該環氧樹脂不受特別限制且(例如)可使用雙官能環氧樹脂或多官能環氧樹脂(例如雙酚A型環氧樹脂、雙酚F型環氧樹脂、雙酚S型環氧樹脂、溴化雙酚A型環氧樹脂、氫化雙酚A型環氧樹脂、雙酚AF型環氧樹脂、聯苯型環氧樹脂、萘型環氧樹脂、茀型環氧樹脂、苯酚酚醛型環氧樹脂、鄰甲酚酚醛型環氧樹脂、叁羥苯基甲烷型環氧樹脂及 四羥苯基乙烷型環氧樹脂),或環氧樹脂(例如乙內醯脲型環氧樹脂、三縮水甘油基異氰尿酸酯型環氧樹脂或縮水甘油基胺型環氧樹脂)。
作為該環氧樹脂,在上文所例示之彼等環氧樹脂中,酚醛型環氧樹脂、聯苯型環氧樹脂、叁羥苯基甲烷型環氧樹脂及四羥苯基乙烷型環氧樹脂較佳。此乃因此等環氧樹脂與作為固化劑之酚系樹脂具有高反應性且在耐熱性及諸如此類方面係優異的。
此外,上述酚系樹脂充當環氧樹脂之固化劑,且其實例包括:酚醛型酚系樹脂,例如苯酚酚醛樹脂、苯酚芳烷基樹脂、甲酚酚醛樹脂、第三丁基苯酚酚醛樹脂及壬基苯酚酚醛樹脂;甲階型酚系樹脂;及聚羥基苯乙烯(polyoxystyrene),例如聚-對-羥基苯乙烯。酚系樹脂可單獨地或以兩個或更多個種類之組合形式使用。在此等酚系樹脂之中,苯酚酚醛樹脂及苯酚芳烷基樹脂尤佳。此乃因可改良半導體裝置之連接可靠性。
環氧樹脂與酚系樹脂之混合比較佳使得(例如)酚系樹脂中之羥基變為0.5至2.0當量/當量環氧樹脂組份中之環氧基。其更佳為0.8至1.2當量。亦即,當該混合比變得超出該範圍時,固化反應無法充分地進行,且環氧樹脂經固化產品之特性趨於劣化。
熱固性樹脂之含量較佳為接合層中所有樹脂組份的5重量%至90重量%,更佳10重量%至85重量%,甚至更佳地15重量%至80重量%。若含量為5重量%或更多,則可容易地 將熱固性收縮控制在2體積%或更多。另外,在熱固化封裝樹脂期間,可將接合層完全熱固化以確保黏合併固定於半導體元件背面以產生無剝離破壞之覆晶型半導體裝置。另一方面,若含量為90重量%或更少,則可防止封裝(PKG,覆晶型半導體裝置)翹曲。
環氧樹脂及酚系樹脂之熱固化加速觸媒並無具體界定,其可適宜地選自已知熱固化加速觸媒。此處可單獨或組合使用一或多種熱固化加速觸媒。作為熱固化加速觸媒,例如,可使用基於胺之固化加速觸媒、基於磷之固化加速觸媒、基於咪唑之固化加速觸媒、基於硼之固化加速觸媒或基於磷-硼之固化加速觸媒。
接合層特別適於由含有環氧樹脂及酚系樹脂之樹脂組合物或含有環氧樹脂、酚系樹脂及丙烯酸系樹脂之樹脂組合物形成。由於此等樹脂僅含有少量離子雜質且具有高耐熱性,因此可確保半導體元件之可靠性。
重要的是,接合層對半導體晶圓之背面(非電路形成面)具有黏合性(緊密黏合性)。接合層可由(例如)含有環氧樹脂作為熱固性樹脂組份之樹脂組合物形成。在接合層在其製備時預先經固化至一定程度的情形下,較佳添加能夠與聚合物分子鏈末端處之官能團或諸如此類反應的多官能化合物作為交聯劑。藉此,可增強高溫下之黏合特性並可達成膜之耐熱性。
接合層與半導體晶圓之黏合力(23℃,剝離角為180度,剝離速率為300mm/min)較佳在0.5N/20mm至15N/20mm 範圍內,更佳為0.7N/20mm至10N/20mm。若黏合力為至少0.5N/20mm,則該接合層可以優良黏合性黏合至半導體晶圓及半導體元件且無膜溶脹或類似黏合破壞。另外,在切割半導體晶圓時,可防止晶片脫離。另一方面,若黏合力為至多15N/20mm,則其有利於自切割帶剝離。
交聯劑不受特別限制且可使用已知交聯劑。具體而言,例如,不僅可提及基於異氰酸酯之交聯劑、基於環氧之交聯劑、基於三聚氰胺之交聯劑及基於過氧化物之交聯劑,而且可提及基於尿素之交聯劑、基於金屬醇鹽之交聯劑、基於金屬螯合物之交聯劑、基於金屬鹽之交聯劑、基於碳二亞胺之交聯劑、基於噁唑啉之交聯劑、基於氮丙啶之交聯劑、基於胺之交聯劑及諸如此類。作為交聯劑,基於異氰酸酯之交聯劑或基於環氧之交聯劑係適合的。交聯劑可單獨地或以兩個或更多個種類之組合形式使用。
基於異氰酸酯之交聯劑之實例包括低碳數脂肪族多異氰酸酯,例如1,2-伸乙基二異氰酸酯、1,4-伸丁基二異氰酸酯、及1,6-六亞甲基二異氰酸酯;脂環族多異氰酸酯,例如伸環戊基二異氰酸酯、伸環己基二異氰酸酯、異佛爾酮二異氰酸酯、氫化伸甲苯基二異氰酸酯及氫化伸二甲苯基二異氰酸酯;及芳香族多異氰酸酯,例如2,4-伸甲苯基二異氰酸酯、2,6-伸甲苯基二異氰酸酯、4,4'-二苯基甲烷二異氰酸酯及伸二甲苯基二異氰酸酯。另外,亦可使用三羥甲基丙烷/伸甲苯基二異氰酸酯三聚體加合物[商品名:「COLONATE L」,由Nippon Polyurethane Industry有限公 司製造]、三羥甲基丙烷/六亞甲基二異氰酸酯三聚體加合物[商品名「COLONATE HL」,由Nippon Polyurethane Industry有限公司製造]及諸如此類。此外,基於環氧之交聯劑之實例包括N,N,N',N'-四縮水甘油基間伸二甲苯基二胺、二縮水甘油基苯胺、1,3-雙(N,N-縮水甘油基胺基甲基)環己烷、1,6-己二醇二縮水甘油醚、新戊二醇二縮水甘油醚、乙二醇二縮水甘油醚、丙二醇二縮水甘油醚、聚乙二醇二縮水甘油醚、聚丙二醇二縮水甘油醚、山梨糖醇聚縮水甘油醚、甘油聚縮水甘油醚、異戊四醇聚縮水甘油醚、聚甘油聚縮水甘油醚、山梨醇酐聚縮水甘油醚、三羥甲基丙烷聚縮水甘油醚、己二酸二縮水甘油酯、鄰苯二甲酸二縮水甘油酯、異氰尿酸三縮水甘油基-叁(2-羥乙基)酯、間苯二酚二縮水甘油醚及雙酚-S-二縮水甘油醚,以及分子中具有兩個或更多個環氧基團之基於環氧之樹脂。
欲使用之交聯劑之量不受特別限制且可根據該交聯度適當地選擇。具體而言,較佳地,欲使用之交聯劑之量以100重量份數聚合物組份(特定而言,在分子鏈末端處具有官能團之聚合物)計通常為7重量份數或更少(例如,0.05重量份數至7重量份數)。當交聯劑之量以100重量份數聚合物組份計大於7重量份數時,黏合力降低,使得該情形不佳。自改良內聚力之觀點出發,交聯劑之量以100重量份數聚合物組份計較佳為0.05重量份數或更多。
在本發明中,亦可藉由用電子束、UV光或諸如此類輻照代替使用交聯劑或連同使用交聯劑一起實施交聯處理。 接合層較佳係有色的。藉此,可展示優良雷射標記性質及優良外觀性質,且製備具有增值外觀性質之半導體裝置成為可能。如上所述,由於有色接合層具有優良標記性質,因此可實施標記以藉助接合層,藉由利用諸如印刷方法及雷射標記方法等各種標記方法中之任一者,使用半導體元件來賦予該半導體元件或半導體裝置之非電路側上之面各種資訊,例如文字資訊及圖形資訊。特定而言,藉由控制著色之色彩而使得以優良可見度觀察藉由標記所賦予之資訊(例如,文字資訊及圖形資訊)成為可能。此外,當接合層係有色時,可容易地將切割帶與接合層彼此區別開,使得可增強可加工性及諸如此類。此外,舉例而言,作為半導體裝置,可藉由使用不同色彩對其產品進行分類。在接合層係有色之情形下(在接合層既非無色亦非透明之情形下),藉由著色顯示之色彩不受特別限制,但(例如)較佳為深色,例如黑色、藍色或紅色,且黑色尤其適宜。
在本發明實施例中,深色基本上意指具有60或更小(0至60)、較佳50或更小(0至50)且更佳40或更小(0至40)之L*(界定於L*a*b*色空間中)之深色。
此外,黑色基本上意指具有35或更小(0至35)、較佳30或更小(0至30)、且更佳25或更小(0至25)之L*(界定於L*a*b*色空間中)之基於黑色的色彩。就此而言,於黑色中,界定於L*a*b*色空間中之a*及b*中之每一者各可根據L*之值適宜地選擇。舉例而言,a*及b*兩者皆處於較佳 -10至10、更佳-5至5、且更佳-3至3(特定而言0或約0)之範圍內。
在本發明實施例中,界定於L*a*b*色空間中之L*、a*及b*可藉由利用色差儀(商品名「CR-200」,由Minolta有限公司製造;色差儀)之量測來確定。L*a*b*色空間係於1976年由國際照明協會(Commission Internationale de l'Eclairage,CIE)所推薦之色空間,且意指稱作CIE1976(L*a*b*)色空間之色空間。此外,L*a*b*色空間界定於JIS Z8729中之日本工業標準(Japanese Industrial Standards)中。
在根據目標色彩對接合層著色時,可使用著色劑(colorant,coloring agent)。作為此一著色劑,可適宜地使用各種深色著色劑,例如黑色著色劑、藍色著色劑及紅色著色劑,且黑色著色劑更適宜。著色劑可係顏料及染料中之任一者。著色劑可單獨地或以兩個或更多個種類之組合形式使用。就此而言,作為染料,可使用任何形式之染料,例如酸性染料、反應性染料、直接染料、分散染料及陽離子染料。此外,亦就顏料而言,其形式不受特別限制且可從已知顏料中適宜地選擇並使用。
具體而言,當使用染料作為著色劑時,染料變為經溶解均勻或幾乎均勻分散於接合層之狀態,使得可容易地製造具有均勻或幾乎均勻之色密度之接合層(因此,附有接合層之切割帶)。因此,當使用染料作為著色劑時,附有接合層之切割帶中之接合層可具有均勻或幾乎均勻之色密度 且可增強標記性質及外觀性質。
黑色著色劑不受特別限制且可適宜地選自(例如)無機黑色顏料及黑色染料。此外,黑色著色劑可係其中將青色著色劑(藍綠色著色劑)、紫紅色著色劑(紅紫色著色劑)與黃色著色劑(yellow-colored colorant)(黃色著色劑(yellow colorant))混合之著色劑混合物。黑色著色劑可單獨地或以兩個或更多個種類之組合形式使用。當然,黑色著色劑可與具有不同於黑色之色彩之著色劑組合使用。
黑色著色劑之特定實例包括碳黑(例如爐法碳黑、槽法碳黑、乙炔碳黑、熱裂解碳黑或燈黑)、石墨、氧化銅、二氧化錳、偶氮型顏料(例如,甲亞胺偶氮黑)、苯胺黑、苝黑、鈦黑、青黑、活性碳、鐵氧體(例如非磁性鐵氧體或磁性鐵氧體)、磁石、氧化鉻、氧化鐵、二硫化鉬、鉻錯合物、複合氧化物型黑色顏料及蒽醌型有機黑色顏料。
在本發明中,作為該黑色著色劑,亦可利用黑色染料,例如C.I.溶劑黑3、7、22、27、29、34、43、70,C.I.直接黑17、19、22、32、38、51、71,C.I.酸性黑1、2、24、26、31、48、52、107、109、110、119、154及C.I.分散黑1、3、10、24;黑色顏料,例如C.I.顏料黑1、7;及諸如此類。
作為該等黑色著色劑,例如,商品名「Oil Black BY」、商品名「Oil Black BS」、商品名「Oil Black HBB」、商品名「Oil Black 803」、商品名「Oil Black 860」、商品名「Oil Black 5970」、商品名「Oil Black 5906」、商品名 「Oil Black 5905」(由Orient Chemical Industries有限公司製造)及諸如此類可自市面購得。
除黑色著色劑以外之著色劑之實例包括青色著色劑、紫紅色著色劑及黃色著色劑。青色著色劑之實例包括青色染料,例如C.I.溶劑藍25、36、60、70、93、95;C.I.酸性藍6及45;青色顏料,例如C.I.顏料藍1、2、3、15、15:1、15:2、15:3、15:4、15:5、15:6、16、17、17:1、18、22、25、56、60、63、65、66;C.I.還原藍4、60;及C.I.顏料綠7。
此外,在紫紅色著色劑中,紫紅色染料之實例包括C.I.溶劑紅1、3、8、23、24、25、27、30、49、52、58、63、81、82、83、84、100、109、111、121、122;C.I.分散紅9;C.I.溶劑紫8、13、14、21、27;C.I.分散紫1;C.I.鹼性紅1、2、9、12、13、14、15、17、18、22、23、24、27、29、32、34、35、36、37、38、39、40;C.I.鹼性紫1、3、7、10、14、15、21、25、26、27及28。
在紫紅色著色劑中,紫紅色染料之實例包括C.I.顏料紅1、2、3、4、5、6、7、8、9、10、11、12、13、14、15、16、17、18、19、21、22、23、30、31、32、37、38、39、40、41、42、48:1、48:2、48:3、48:4、49、49:1、50、51、52、52:2、53:1、54、55、56、57:1、58、60、60:1、63、63:1、63:2、64、64:1、67、68、81、83、87、88、89、90、92、101、104、105、106、108、112、114、122、123、139、144、146、147、149、 150、151、163、166、168、170、171、172、175、176、177、178、179、184、185、187、190、193、202、206、207、209、219、222、224、238、245;C.I.顏料紫3、9、19、23、31、32、33、36、38、43、50;C.I.還原紅1、2、10、13、15、23、29及35。
此外,黃色著色劑之實例包括黃色染料,例如C.I.溶劑黃19、44、77、79、81、82、93、98、103、104、112及162;黃色顏料,例如C.I.顏料橙31、43;C.I.顏料黃1、2、3、4、5、6、7、10、11、12、13、14、15、16、17、23、24、34、35、37、42、53、55、65、73、74、75、81、83、93、94、95、97、98、100、101、104、108、109、110、113、114、116、117、120、128、129、133、138、139、147、150、151、153、154、155、156、167、172、173、180、185、195;C.I.還原黃1、3及20。
各種著色劑(例如青色著色劑、紫紅色著色劑及黃色著色劑)可分別單獨地或以兩個或更多個種類之組合形式使用。就此而言,在使用各種著色劑(例如青色著色劑、紫紅色著色劑及黃色著色劑)中之兩個或更多個種類時,此等著色劑之混合比(或摻合比)不受特別限制且可根據每一著色劑之種類、目標色彩等適宜地選擇。
在接合層2係有色之情形下,有色形式不受特別限制。接合層可係(例如)添加有著色劑之單層膜形物件。此外,膜可係層壓膜,其中至少由熱固性樹脂及著色劑層形成之樹脂層至少經層壓。就此而言,在接合層2係樹脂層與著 色劑層之層壓膜之情形下,呈層壓形式之接合層2較佳具有層壓形式之樹脂層/著色劑層/樹脂層。在此情形下,位於著色劑層兩側之兩個樹脂層可係具有相同組成之樹脂層或可係具有不同組成之樹脂層。
可根據需要向接合層2中適宜地摻和其他添加劑。除填充劑、阻燃劑、矽烷偶聯劑及離子捕獲劑以外,其他添加劑之實例包括增量劑、抗老化劑、抗氧化劑及表面活性劑。
填充劑可係無機填充劑及有機填充劑中之任一者,但無機填充劑係適宜的。藉由摻和填充劑(例如無機填充劑)可賦予接合層導電性、改良熱導係數、控制彈性模數及諸如此類。就此而言,接合層2可為導電或非導電。無機填充劑之實例包括由下列組成之各種無機粉末:二氧化矽、黏土、石膏、碳酸鈣、硫酸鋇、氧化鋁、氧化鈹、陶瓷(例如碳化矽及氮化矽)、金屬或合金(例如鋁、銅、銀、金、鎳、鉻、鉛、錫、鋅、鈀及焊料)、碳及諸如此類。填充劑可單獨地或以兩個或更多個種類之組合形式使用。特定而言,填充劑適宜為二氧化矽且更適宜為熔合二氧化矽。無機填充劑之平均粒徑較佳在0.1μm至80μm範圍內。無機填充劑之平均粒徑可藉由雷射繞射型粒徑分佈量測設備來量測。
填充劑(具體而言,無機填充劑)之摻合量以100重量份數有機樹脂組份計較佳為80重量份數或更少(0重量份數至80重量份數),且更佳為0重量份數至70重量份數。
阻燃劑之實例包括三氧化銻、五氧化二銻及溴化環氧樹脂。阻燃劑可單獨地或以兩個或更多個種類之組合形式使用。矽烷偶聯劑之實例包括β-(3,4-環氧環己基)乙基三甲氧基矽烷、γ-縮水甘油醚氧基丙基三甲氧基矽烷及γ-縮水甘油醚氧基丙基甲基二乙氧基矽烷。矽烷偶聯劑可單獨地或以兩個或更多個種類之組合形式使用。離子捕獲劑之實例包括水滑石及氫氧化鉍。離子捕獲劑可單獨地或以兩個或更多個種類之組合形式使用。
接合層2可藉由(例如)利用常用方法來形成,包括將熱固性樹脂(例如環氧樹脂)及若需要熱塑性樹脂(例如丙烯酸系樹脂)及可選溶劑及其他添加劑混合以製備樹脂組合物,隨後使其形成膜形層。具體而言,作為接合層之膜形層(接合層)可藉由(例如)下述方法來形成,包括將樹脂組合物施加於切割帶之壓敏接合層32上之方法;包括將樹脂組合物施加於適當隔離膜(例如釋放紙)上以形成樹脂層(或接合層)且隨後將其轉移(轉印)於壓敏接合層32上之方法;或諸如此類。就此而言,樹脂組合物可係溶液或分散液。
附帶而言,在接合層2係由含有熱固性樹脂(例如環氧樹脂)之樹脂組合物形成之情形下,在將接合層施加至半導體晶圓前之階段,該膜呈熱固性樹脂組份未固化或部分固化之狀態。在此情形下,在將其施加至該半導體晶圓後(具體而言,通常在覆晶結合步驟中固化封裝材料時),接合層中之熱固性樹脂完全或幾乎完全固化。
如上所述,由於接合層呈熱固性樹脂未固化或部分固化 之狀態,甚至當該膜含有熱固性樹脂時,因此接合層之凝膠份數不受特別限制,但例如,適宜地選自50重量%或更少(0重量%至50重量%)之範圍且較佳為30重量%或更少(0重量%至30重量%)且尤佳為10重量%或更少(0重量%至10重量%)。接合層之凝膠份數可藉由以下量測方法來量測。
<凝膠份數量測方法>
自接合層取約0.1g樣品並對其進行精確稱重(樣品重量),且在將該樣品包裹於網型片材中後,將其在室溫下在約50mL甲苯中浸漬1週。此後,自甲苯中取出溶劑不溶性物質(網型片材中之內容物)且在130℃下乾燥約2小時,在乾燥後對溶劑不溶性物質進行稱重(浸漬及乾燥後之重量),且隨後根據以下表達式(a)來計算凝膠份數(重量%)。
凝膠份數(重量%)=[(浸漬及乾燥後之重量)/(樣品重量)]×100 (a)
接合層之凝膠份數可受控於樹脂組份之種類及含量及交聯劑之種類及含量以及加熱溫度、加熱時間及諸如此類。
在本發明中,在接合層係由含有熱固性樹脂(例如環氧樹脂)之樹脂組合物形成之膜形物件之情形下,可有效地展示對半導體晶圓之緊密黏合性。
附帶而言,由於在半導體晶圓之切割步驟中使用切削水,因此在一些情形下接合層吸收水分而具有正常狀態或更高之含水量。當在仍維持此一高含水量之情形下實施覆晶結合時,在一些情形下,在接合層與半導體晶圓或其處理體(半導體)之間之黏合介面處殘留水蒸氣並產生鼓起。 因此,藉由將接合層構成為在其每一表面上提供具有高透濕性之核心材料之組態以使水蒸氣擴散且因此可避免此一問題。自此一觀點出發,在核心材料之一個表面或兩個表面形成接合層之多層結構可用作接合層。核心材料之實例包括膜(例如,聚醯亞胺膜、聚酯膜、聚對苯二甲酸乙二酯膜、聚萘二甲酸乙二酯膜、聚碳酸酯膜等)、經玻璃纖維或塑膠非織造纖維強化之樹脂基板、矽基板及玻璃基板。
接合層2之厚度(在層壓膜之情形下的總厚度)不受特別限制,但可(例如)適宜地選自約2μm至200μm之範圍。此外,厚度較佳為約4μm至160μm、更佳為約6μm至100μm且特定而言約10μm至80μm。
呈未固化狀態之接合層2在23℃下之抗張儲存彈性模數較佳為1GPa或更多(例如,1GPa至50GPa)、更佳為2GPa或更多,且特定而言3GPa或更多係適宜的。當抗張儲存彈性模數為1GPa或更多時,在將半導體晶片連同接合層2自切割帶之壓敏接合層32剝離後,將接合層2置於支撐件上並實施輸送及諸如此類時,可有效地抑制或防止該接合層附著至該支撐件。就此而言,支撐件係(例如)載體帶中之頂部帶、底部帶及諸如此類。在接合層2係由含有熱固性樹脂之樹脂組合物形成之情形下,如上文所提及,該熱固性樹脂通常呈未固化或部分固化狀態,使得接合層在23℃下之抗張儲存彈性模數係呈該熱固性樹脂未固化或部分固化之狀態之23℃下之抗張儲存彈性模數。
此處,接合層2可為單層或層壓有複數個層之層壓膜。在層壓膜之情形下,作為整體層壓膜,抗張儲存彈性模數充分地為1GPa或更多(例如,1GPa至50GPa)。此外,呈未固化狀態之接合層之抗張儲存彈性模數(23℃)可藉由適宜地設定樹脂組份(熱塑性樹脂及/或熱固性樹脂)之種類及含量或填充劑(例如二氧化矽填充劑)之種類及含量來加以控制。在接合層2係層壓有複數個層之層壓膜之情形下(在接合層具有層壓層形式之情形下),作為層壓層形式,可例示(例如)由晶圓接合層及雷射標記層組成之層壓形式。此外,在晶圓接合層與雷射標記層之間,可提供其他層(中間層、光屏蔽層、強化層、有色層、基礎材料層、電磁波屏蔽層、導熱層、壓敏接合層等)。就此而言,晶圓接合層係對晶圓展示優良緊密黏合性(黏合性質)之層及與晶圓背面接觸之層。另一方面,雷射標記層係展示優良雷射標記性質之層及用於在半導體晶片背面上進行雷射標記之層。
抗張儲存彈性模數係藉由以下方式測定:製備呈未固化狀態之接合層2而不層壓於切割帶3上並使用由Rheometrics有限公司製造之動態黏彈性量測設備「固體分析器RS A2」在規定溫度(23℃)及氮氣氛下在10mm之樣品寬度、22.5mm之樣品長度、0.2mm之樣品厚度、1Hz之頻率及10℃/min之升溫速率之條件下在抗張模式下量測彈性模數,且將所量測彈性模數視為所獲得抗張儲存彈性模數之值。
此外,接合層2對可見光之光透射率(可見光透射率,波長:400nm至800nm)不受特別限定,但(例如)較佳在20%或更少(0至20%)之範圍內、更佳為10%或更少(0至10%)且尤佳為5%或更少(0至5%)。當接合層2具有超過20%之可見光透射率時,擔心光透射率可能對半導體元件具有不利地影響。可見光透射率(%)可受控於接合層2之樹脂組份之種類及含量、著色劑(例如顏料或染料)之種類及含量、無機填充料之含量及諸如此類。
接合層2之可見光透射率(%)可按以下方式測定。即,製備本身厚度(平均厚度)為20μm之接合層2。隨後,用波長為400nm至800nm之可見光以規定強度輻照接合層2[設備:由Shimadzu公司製造之可見光產生設備][商品名「ABSORPTION SPECTRO PHOTOMETER」],並量測透射可見光之強度。此外,基於可見光穿過接合層2之前與之後其透光率之強度變化測定可見光透光率(%)。就此而言,亦可自厚度不為20μm之接合層2之可見光透光率(%;波長:400nm至800nm)的值推導出厚度為20μm之接合層2之可見光透光率(%;波長:400nm至800nm)。在本發明中,可見光透射率(%)係在厚度為20μm之接合層2之情形下測定,但本發明之接合層並不限於厚度為20μm者。
此外,作為接合層2,具有較低水分吸收率者更佳。具體而言,水分吸收率較佳為1重量%或更少且更佳為0.8重量%或更少。藉由將水分吸收率調節至1重量%或更少,可增強雷射標記性質。此外,舉例而言,可在回流步驟中抑 制或防止接合層2與半導體元件之間產生空隙。水分吸收率係自在使接合層2在85℃之溫度及85% RH之濕度之氣氛下靜置168小時之前與之後的重量變化所計算之值。在接合層2係由含有熱固性樹脂之樹脂組合物形成之情形下,水分吸收率意指當使該膜在熱固化後在85℃之溫度及85% RH之濕度之氣氛下靜置168小時所獲得的值。此外,水分吸收率可藉由(例如)改變欲添加無機填充劑之量來調節。
此外,作為接合層2,具有較小比率之揮發性物質者更佳。具體而言,接合層2在加熱處理後之重量減少之比率(重量減少比)較佳為1重量%或更少且更佳為0.8重量%或更少。加熱處理之條件係250℃之加熱溫度及1小時之加熱時間。藉由將重量減少比調節至1重量%或更少,可增強雷射標記性質。此外,舉例而言,可在回流步驟中抑制或防止覆晶型半導體裝置中產生裂紋。重量減少比可藉由(例如)添加能夠在無鉛焊料回流時減少裂紋產生之無機物質來加以調節。在接合層2係由含有熱固性樹脂組份之樹脂組合物形成之情形下,重量減少比係當在250℃之溫度及1小時之加熱時間之條件下加熱熱固化後之接合層時所獲得之值。
(切割帶)
切割帶3包括基礎材料31及形成於基礎材料31上之壓敏接合層32。因此,切割帶3充分地具有層壓有基礎材料31與壓敏接合層32之組態。基礎材料(支撐基礎材料)可用作 壓敏接合層及諸如此類之支撐材料。基礎材料31較佳具有輻射線透射性質。作為基礎材料31,例如,可使用(例如)適宜薄材料,例如基於紙之基礎材料,例如紙;基於纖維之基礎材料,例如織物、非織造纖維、毛氈及網狀物;基於金屬之基礎材料,例如金屬箔及金屬板;塑膠基礎材料,例如塑膠膜及片材;基於橡膠之基礎材料,例如橡膠片材;發泡體,例如發泡片材;及其壓層[特定而言,基於塑膠之材料與其他基礎材料之壓層、塑膠膜(或片材)相互之壓層等]。在本發明中,作為基礎材料,可適宜地使用塑膠基礎材料,例如塑膠膜及塑膠片材。該等塑膠材料之原料之實例包括烯烴樹脂,例如聚乙烯(PE)、聚丙烯(PP)及乙烯-丙烯共聚物;使用乙烯作為單體組份之共聚物,例如乙烯-乙酸乙烯酯共聚物(EVA)、離聚物樹脂、乙烯-(甲基)丙烯酸共聚物及乙烯-(甲基)丙烯酸酯(無規、交替)共聚物;聚酯,例如聚對苯二甲酸乙二酯(PET)、聚萘二甲酸乙二酯(PEN)及聚對苯二甲酸丁二酯(PBT);丙烯酸系樹脂;聚氯乙烯(PVC);聚胺基甲酸酯;聚碳酸酯;聚苯硫醚(PPS);基於醯胺之樹脂,例如聚醯胺(耐綸)及全芳香族聚醯胺(芳香族聚醯胺);聚醚醚酮(PEEK);聚醯亞胺;聚醚醯亞胺;聚二氯亞乙烯;ABS(丙烯腈-丁二烯-苯乙烯共聚物);基於纖維素之樹脂;聚矽氧樹脂;及氟化樹脂。
另外,基礎材料31之材料包括聚合物,例如上述樹脂之交聯材料。若需要,塑膠膜可不拉伸即使用或可在經受單 軸或雙軸拉伸處理後使用。根據藉由拉伸處理或諸如此類賦予熱收縮性質之樹脂片材,藉由基礎材料31在切割後之熱收縮來減小壓敏接合層32與接合層2之間之黏合區域,且因此可有助於回收半導體晶片。
可對基礎材料31之表面上施用常用表面處理(例如,化學或物理處理,例如鉻酸鹽處理、暴露於臭氧、暴露於火焰、暴露於高壓電擊、或離子化輻射處理、或使用底塗劑(例如,稍後提及之壓敏黏合劑物質)之塗佈處理)以增強與毗鄰層之緊密黏合性、固持性質及諸如此類。
作為基礎材料31,可適宜地選擇並使用相同種類或不同種類之材料,且若需要,可摻和並使用數種材料。此外,為賦予基礎材料31抗靜電能力,可在基礎材料31上形成由金屬、其合金或氧化物組成的厚度為約30埃至500埃之導電物質之蒸氣沈積層。基礎材料31可係單層或其兩個或更多個之多層。
基礎材料31之厚度(在層壓層之情形下的總厚度)不受特別限制且可根據強度、撓性、既定使用目的及諸如此類來適當地選擇。舉例而言,厚度通常為1,000μm或更少(例如1μm至1,000μm)、較佳為10μm至500μm、更佳為20μm至300μm且尤佳為約30μm至200μm,但並不限於此。
附帶而言,基礎材料31可含有處於其中不損害本發明之優點及諸如此類之範圍內之各種添加劑(著色劑、填充劑、增塑劑、抗老化劑、抗氧化劑、表面活性劑、阻燃劑等)。
壓敏接合層32係由壓敏黏合劑形成且具有壓敏黏合性。壓敏黏合劑並無具體界定,其可適宜地選自已知壓敏黏合劑。具體而言,舉例而言,作為壓敏黏合劑,彼等具有上述特性者適宜地選自已知壓敏黏合劑,例如丙烯酸系壓敏黏合劑、基於橡膠之壓敏黏合劑、基於乙烯基烷基醚之壓敏黏合劑、基於聚矽氧之壓敏黏合劑、基於聚酯之壓敏黏合劑、基於聚醯胺之壓敏黏合劑、基於胺基甲酸酯之壓敏黏合劑、基於氟之壓敏黏合劑、基於苯乙烯-二烯嵌段共聚物之壓敏黏合劑、及藉由向上述壓敏黏合劑中納入熔點不高於200℃之熱熔性樹脂製備之蠕變特性改良之壓敏黏合劑(參見(例如)JP-A 56-61468、JP-A-61-174857、JP-A-63-17981、JP-A-56-13040,以引用方式併入本文中),且本文使用該等壓敏黏合劑。作為壓敏黏合劑,此處亦使用輻射可固化壓敏黏合劑(或能量射線可固化壓敏黏合劑)及熱膨脹壓敏黏合劑。此處可單獨或組合使用一或多種該等壓敏黏合劑。
作為壓敏黏合劑,本文較佳使用丙烯酸系壓敏黏合劑及基於橡膠之壓敏黏合劑,且更佳為丙烯酸系壓敏黏合劑。丙烯酸系壓敏黏合劑包括彼等包含一或多種(甲基)丙烯酸烷基酯作為單體組份之丙烯酸系聚合物(均聚物或共聚物)作為基礎聚合物者。
用於丙烯酸系壓敏黏合劑之(甲基)丙烯酸烷基酯包括(例如)(甲基)丙烯酸甲酯、(甲基)丙烯酸乙酯、(甲基)丙烯酸丙酯、(甲基)丙烯酸異丙酯、(甲基)丙烯酸丁酯、(甲基)丙 烯酸異丁酯、(甲基)丙烯酸第二丁基酯、(甲基)丙烯酸第三丁基酯、(甲基)丙烯酸戊酯、(甲基)丙烯酸己酯、(甲基)丙烯酸庚酯、(甲基)丙烯酸辛酯、(甲基)丙烯酸2-乙基己酯、(甲基)丙烯酸異辛酯、(甲基)丙烯酸壬酯、(甲基)丙烯酸異壬酯、(甲基)丙烯酸癸酯、(甲基)丙烯酸異癸酯、(甲基)丙烯酸十一烷基酯、(甲基)丙烯酸十二烷基酯、(甲基)丙烯酸十三烷基酯、(甲基)丙烯酸十四烷基酯、(甲基)丙烯酸十五烷基酯、(甲基)丙烯酸十六烷基酯、(甲基)丙烯酸十七烷基酯、(甲基)丙烯酸十八烷基酯、(甲基)丙烯酸十九烷基酯、(甲基)丙烯酸二十烷基酯等。作為(甲基)丙烯酸烷基酯,彼等烷基具有4個至18個碳原子者較佳。在(甲基)丙烯酸烷基酯中,烷基可為直鏈或具支鏈。
若需要,出於改良丙烯酸系聚合物之內聚力、耐熱性及交聯能力之目的,其可含有對應於可與上述(甲基)丙烯酸烷基酯共聚之任一其他單體組份(可共聚單體組份)的單元。可共聚單體組分之實例包括(例如)含羧基單體,例如(甲基)丙烯酸(丙烯酸或甲基丙烯酸)、丙烯酸羧乙基酯、丙烯酸羧戊基酯、衣康酸、馬來酸、富馬酸、巴豆酸;含酸酐基團單體,例如馬來酸酐、衣康酸酐;含羥基單體,例如(甲基)丙烯酸羥乙基酯、(甲基)丙烯酸羥丙基酯、(甲基)丙烯酸羥丁基酯、(甲基)丙烯酸羥己基酯、(甲基)丙烯酸羥辛基酯、(甲基)丙烯酸羥癸基酯、(甲基)丙烯酸羥基月桂基酯、甲基丙烯酸(4-羥甲基環己基)甲酯;含磺酸基團之單體,例如苯乙烯磺酸、烯丙基磺酸、2-(甲基)丙烯 醯胺-2-甲基丙烷磺酸、(甲基)丙烯醯胺丙烷磺酸、(甲基)丙烯酸磺基丙基酯、(甲基)丙烯醯氧基萘磺酸;含磷酸基團之單體,例如磷酸2-羥乙基丙烯醯基酯;(N-經取代)醯胺單體,例如(甲基)丙烯醯胺、N,N-二甲基(甲基)丙烯醯胺、N-丁基(甲基)丙烯醯胺、N-羥甲基(甲基)丙烯醯胺、N-羥甲基丙烷(甲基)丙烯醯胺;(甲基)丙烯酸胺基烷基酯單體,例如(甲基)丙烯酸胺基乙基酯、(甲基)丙烯酸N,N-二甲基胺基乙基酯、(甲基)丙烯酸第三丁基胺基乙基酯;(甲基)丙烯酸烷氧基烷基酯單體,例如(甲基)丙烯酸甲氧基乙基酯、(甲基)丙烯酸乙氧基乙基酯;氰基丙烯酸酯單體,例如丙烯腈、甲基丙烯腈;含環氧基團之丙烯酸單體,例如(甲基)丙烯酸縮水甘油基酯;苯乙烯單體,例如苯乙烯、α-甲基苯乙烯;乙烯酯單體,例如乙酸乙烯酯、丙酸乙烯酯;烯烴單體,例如異戊二烯、丁二烯、異丁烯;乙烯醚單體,例如乙烯醚;含氮單體,例如N-乙烯基吡咯啶酮、甲基乙烯基吡咯啶酮、乙烯基吡啶、乙烯基六氫吡啶酮、乙烯基嘧啶、乙烯基六氫吡嗪、乙烯基吡嗪、乙烯基吡咯、乙烯基咪唑、乙烯基惡唑、乙烯基嗎啉、N-乙烯基甲醯胺、N-乙烯基己內醯胺;馬來醯亞胺單體,例如N-環己基馬來醯亞胺、N-異丙基馬來醯亞胺、N-月桂基馬來醯亞胺、N-苯基馬來醯亞胺;衣康醯亞胺單體,例如N-甲基衣康醯亞胺、N-乙基衣康醯亞胺、N-丁基衣康醯亞胺、N-辛基衣康醯亞胺、N-2-乙基己基衣康醯亞胺、N-環己基衣康醯亞胺、N-月桂基衣康醯亞胺;琥珀醯亞胺單 體,例如N-(甲基)丙烯醯氧基亞甲基琥珀醯亞胺、N-(甲基)丙烯醯基-6-氧基六亞甲基琥珀醯亞胺、N-(甲基)丙烯醯基-8-氧基八亞甲基琥珀醯亞胺;乙醇酸丙烯醯基酯單體,例如聚乙二醇(甲基)丙烯酸酯、聚丙二醇(甲基)丙烯酸酯、甲氧基乙二醇(甲基)丙烯酸酯、甲氧基聚丙二醇(甲基)丙烯酸酯;具有雜環、鹵素原子、矽原子、或諸如此類之丙烯酸酯單體、例如(甲基)丙烯酸四氫呋喃酯、氟(甲基)丙烯酸酯、聚矽氧(甲基)丙烯酸酯;多官能單體,例如己二醇二(甲基)丙烯酸酯、(聚)乙二醇二(甲基)丙烯酸酯、(聚)丙二醇二(甲基)丙烯酸酯、新戊二醇二(甲基)丙烯酸酯、異戊四醇二(甲基)丙烯酸酯、三羥甲基丙烷三(甲基)丙烯酸酯、異戊四醇三(甲基)丙烯酸酯、二異戊四醇六(甲基)丙烯酸酯、環氧丙烯酸酯、聚酯丙烯酸酯、胺基甲酸酯丙烯酸酯、二乙烯苯、二(甲基)丙烯酸丁酯、二(甲基)丙烯酸己酯等。此處可單獨或組合使用一或多種此等可共聚單體組份。
可用於本發明之輻射可固化壓敏黏合劑(或能量射線可固化壓敏黏合劑)(組合物)包括(例如)內型輻射可固化壓敏黏合劑(其包含作為基礎聚合物之在聚合物側鏈、主鏈或主鏈末端中具有自由基反應性碳碳雙鍵的聚合物)、及藉由向壓敏黏合劑中納入UV可固化單體組份或寡聚物組份製備的輻射可固化壓敏黏合劑。亦可用於此處之熱膨脹壓敏黏合劑包括(例如)彼等包含壓敏黏合劑及發泡劑(尤其熱膨脹微球體)者。
在本發明中,壓敏接合層32可含有在不損害本發明之優點之範圍內之各種添加劑(例如,增黏樹脂、著色劑、增稠劑、增量劑、填充劑、增塑劑、抗老化劑、抗氧化劑、表面活性劑、交聯劑等)。
交聯劑不受特別限制且可使用已知交聯劑。特定而言,作為交聯劑,不僅可提及基於異氰酸酯之交聯劑、基於環氧之交聯劑、基於三聚氰胺之交聯劑及基於過氧化物之交聯劑,而且可提及基於尿素之交聯劑、基於金屬醇鹽之交聯劑、基於金屬螯合物之交聯劑、基於金屬鹽之交聯劑、基於碳二亞胺之交聯劑、基於噁唑啉之交聯劑、基於氮丙啶之交聯劑、基於胺之交聯劑及諸如此類,且基於異氰酸酯之交聯劑及基於環氧之交聯劑係適宜的。交聯劑可單獨地或以兩個或更多個種類之組合形式使用。附帶而言,欲使用之交聯劑之量不受特別限制。
基於異氰酸酯之交聯劑之實例包括低碳數脂肪族多異氰酸酯,例如1,2-伸乙基二異氰酸酯、1,4-伸丁基二異氰酸酯及1,6-六亞甲基二異氰酸酯;脂環族多異氰酸酯,例如伸環戊基二異氰酸酯、伸環己基二異氰酸酯、異佛爾酮二異氰酸酯、氫化伸甲苯基二異氰酸酯及氫化伸二甲苯基二異氰酸酯;及芳香族多異氰酸酯,例如2,4-伸甲苯基二異氰酸酯、2,6-伸甲苯基二異氰酸酯、4,4'-二苯基甲烷二異氰酸酯及伸二甲苯基二異氰酸酯。另外,亦可使用三羥甲基丙烷/伸甲苯基二異氰酸酯三聚體加合物[商品名:「COLONATE L」,由Nippon Polyurethane Industry有限公 司製造]、三羥甲基丙烷/六亞甲基二異氰酸酯三聚體加合物[商品名「COLONATE HL」,由Nippon Polyurethane Industry有限公司製造]及諸如此類。此外,基於環氧之交聯劑之實例包括N,N,N',N'-四縮水甘油基間伸二甲苯基二胺、二縮水甘油基苯胺、1,3-雙(N,N-縮水甘油基胺基甲基)環己烷、1,6-己二醇二縮水甘油醚、新戊二醇二縮水甘油醚、乙二醇二縮水甘油醚、丙二醇二縮水甘油醚、聚乙二醇二縮水甘油醚、聚丙二醇二縮水甘油醚、山梨糖醇聚縮水甘油醚、甘油聚縮水甘油醚、異戊四醇聚縮水甘油醚、聚甘油聚縮水甘油醚、山梨醇酐聚縮水甘油醚、三羥甲基丙烷聚縮水甘油醚、己二酸二縮水甘油酯、鄰苯二甲酸二縮水甘油酯、異氰尿酸三縮水甘油基-叁(2-羥乙基)酯、間苯二酚二縮水甘油醚及雙酚-S-二縮水甘油醚,以及分子中具有兩個或更多個環氧基團之基於環氧之樹脂。
在本發明中替代使用交聯劑或與交聯劑一起使用,可經由用電子射線或UV射線輻照交聯壓敏接合層。
壓敏接合層32可(例如)藉由利用包括將壓敏黏合劑與可選溶劑以及其他添加劑混合並隨後使該混合物成形為片狀層之常用方法來形成。具體而言,可提及(例如)以下方法:包括在基礎材料31上施加含有壓敏黏合劑及可選溶劑及其他添加劑之混合物之方法;包括在適當隔離膜(例如釋放紙)上施加上述混合物以形成壓敏接合層32並隨後將其轉移(轉印)於基礎材料31上之方法;或諸如此類。
壓敏接合層32之厚度不受特別限制且(例如)較佳為約5 μm至300μm,較佳為5μm至200μm,更佳為5μm至100μm,且尤佳為7μm至50μm。當壓敏接合層32之厚度處於上述範圍內時,可展示適當壓敏黏合力。壓敏接合層可為單層或多層。
切割帶3之壓敏接合層32與接合層2之黏合力(23℃,剝離角為180度,剝離速率為300mm/min)較佳在0.02N/20mm至10N/20mm範圍內,更佳0.05N/20mm至5N/20mm。若黏合力為至少0.02N/20mm,則在切割半導體晶圓時可防止半導體晶片脫離。另一方面,若黏合力為至多10N/20mm,則在拾取半導體晶片時有利於其剝離並防止壓敏黏合劑存留。
附帶而言,在本發明中,可使得接合層2或附有接合層之切割帶1具有抗靜電功能。由於此組態,可防止電路因在黏合時及在剝離時產生靜電能或因靜電能對半導體晶圓或諸如此類充電而引起斷裂。賦予抗靜電功能可藉由適當方式來實施,例如向基礎材料31、壓敏接合層32及接合層2中添加抗靜電劑或導電物質之方法或將由電荷轉移錯合物、金屬膜或諸如此類組成之導電層提供至基礎材料31上之方法。作為此等方法,擔心改變該半導體晶圓之品質之雜質離子難以產生之方法係較佳的。出於賦予導電性、改良熱導係數及諸如此類目的所摻和之導電物質(導電填充劑)之實例包括銀、鋁、金、銅、鎳、導電合金或諸如此類之球形、針形、片材形金屬粉末;金屬氧化物,例如氧化鋁;非晶形碳黑及石墨。然而,自無漏電之觀點出發, 接合層2較佳係不導電的。
此外,半導體裝置製造用膜40可以捲繞成卷之形式形成或可以層壓片材(膜)之形式形成。就此而言,呈捲繞成卷之狀態或形式之半導體裝置製造用膜40可由基礎材料31、形成於基礎材料31之一個表面上之壓敏接合層32、形成於壓敏接合層32上之接合層2及形成於基礎材料31之另一個表面上之經可釋放處理之層(後表面經處理之層)構成。
附帶而言,附有接合層之切割帶1之厚度(接合層之厚度與包括基礎材料31及壓敏接合層32之切割帶厚度的總厚度)可(例如)選自8μm至1,500μm之範圍,且其較佳為20μm至850μm,更佳為31μm至500μm,且尤佳為47μm至330μm。
接合層2之厚度與切割帶3之壓敏接合層32厚度的比率並無具體界定。例如,該比率可適宜地選自150/5至3/100之範圍(接合層2之厚度/切割帶3之壓敏接合層32之厚度),較佳為100/5至3/50,更佳為60/5至3/40。若接合層2之厚度與切割帶3之壓敏接合層32厚度的比率為至少3/100,則可防止兩者間之黏合力過高。另一方面,若該比率為至多150/5,則可防止黏合力過低。
接合層2之厚度與切割帶3之厚度(基礎材料31與壓敏接合層32之總厚度)的比率並無具體界定。舉例而言,該比率可適宜地選自150/50至3/500之範圍(接合層2之厚度/切割帶3之厚度),較佳為100/50至3/300,更佳為60/50至3/150。若接合層2之厚度與切割帶3厚度的比率為至少 3/500,則有助於拾取該帶。另一方面,若該比率為至多150/50,則其可防止在切割時側殘餘物增多。
就此而言,藉由控制接合層2之厚度與切割帶3之壓敏接合層32厚度的比率或接合層2之厚度與切割帶之厚度(基礎材料31與壓敏接合層32之總厚度)的比率,可改良在切割步驟之切割性質、在拾取步驟之拾取性質及諸如此類且因此,本發明半導體裝置製造用膜可在半導體晶圓切割步驟至半導體晶片覆晶結合步驟得以有效利用。
(半導體裝置製造用膜之製造方法)
闡述本發明實施例之半導體裝置製造用膜之製造方法,同時使用圖1A及1B所示之半導體裝置製造用膜40作為實例。該實施例之半導體裝置製造用膜40之製造方法包含製備附有隔離膜之膜之步驟,該膜包含隔離膜42及附有接合層之切割帶1,每一者各包含切割帶3及層壓於切割帶3上之接合層2,其係經由接合層2充當附著面層壓於隔離膜42上;及根據對應於該膜所黏附之半導體晶圓之大小切削該附有隔離膜之膜之步驟。在該方法中,自切割帶3側將該膜切削至隔離膜42厚度至多2/3的深度。
首先,可藉由習知膜形成方法來形成基礎材料31。成膜方法之實例包括壓延膜形成方法、在有機溶劑中之澆注方法、在緊密密封系統中之膨脹擠壓方法、T型模具擠出方法、共擠出方法及乾式層壓方法。
然後,將壓敏黏合劑組合物施加至基礎材料31並於其上乾燥(且視情況在加熱下交聯)以形成壓敏接合層32。塗佈 系統包括輥塗、絲網塗佈、凹板塗佈等。可將壓敏接合層組合物直接施加至基礎材料31以在基礎材料31上形成壓敏接合層32;或可將壓敏黏合劑組合物施加至釋放片材或表面經潤滑處理之類似物以在其上形成壓敏接合層32,且可將壓敏接合層32轉移至基礎材料31上。隨即,形成在基礎材料31上形成壓敏接合層32的切割帶3。
另一方面,將用於形成接合層2之形成材料施加至釋放片材上以形成在乾燥後具有預定厚度之塗層,且隨後在預定條件下乾燥(視情況在需要熱固化之情形下加熱並乾燥)以形成塗層。隨後,在預定條件下乾燥塗層,藉此形成接合層2。
然後,根據其所附著之半導體晶圓之形狀沖裁接合層2,且隨後將其附著至切割帶3。隨後,經由接合層2充當附著面將切割帶3層壓於隔離膜42上,得到附有隔離膜之膜。隔離膜42可根據已知膜形成方法製造。膜形成方法包括(例如)壓延膜形成方法、在有機溶劑中之澆注方法、在密閉系統中之膨脹擠壓方法、T型模具擠出方法、共擠出方法、乾式層壓方法。
然後,根據對應於該膜所黏附之半導體晶圓之大小切削該附有隔離膜之膜。在該步驟中,自切割帶3側將該膜切削至隔離膜42厚度至多2/3的深度(參見圖1B)。隨即,獲得半導體裝置製造用膜40,其中隔離膜42係繞切割帶3之外周邊切削且切口深度為隔離膜42厚度的至多2/3。可不經沖裁將接合層2直接按原樣附著至切割帶3,且隨後仍按原 樣層壓於該隔離膜上,且然後,可根據對應於該膜所黏附之半導體晶圓之大小切削該附有隔離膜之膜。在此情形下,同時切削接合層2及切割帶3並形成切口44。
形成切口之方法並無具體界定。例如,本文可使用者係使用輪轉機(rotary)之方法、使用沖切刀片(例如,湯姆森刀片(Thomson blade))之方法、雷射加工方法。總而言之,輪轉機因可提高欲形成切口之深度之精確度等級而係有利的。在使用沖切刀片之情形下,較佳地,在刀片內部及/或外部提供間隔物。隨即,可提高欲形成切口之深度之精確度等級。附帶而言,迄今,當僅使用沖切刀片切削隔離膜時,精確度較低且在一些情形下,可通常形成深度大於該隔離膜厚度2/3之切口。與此相反,在一些其他情形下刀片未能抵達該隔離膜且亦未能切削該切割帶。然而,若使用輪轉機或若在刀片內部及/或外部提供間隔物,則可提高欲形成切口之深度之精確度等級。
(半導體晶圓)
半導體晶圓不受特別限制,只要其係已知或常用半導體晶圓且可從由各種材料製成之半導體晶圓中適當地選擇並使用。在本發明中,作為半導體晶圓,可適宜地使用矽晶圓。
(半導體裝置之製造方法)
參照圖2A至2D闡述此實施例之半導體裝置之製造方法。圖2A至2D係顯示使用此實施例之附有接合層之切割帶製造半導體裝置之方法之一個實例的剖面示意圖。
在該半導體裝置製造方法中,使用半導體裝置製造用膜40來製造半導體裝置。具體而言,該方法至少包含將隔離膜42自半導體裝置製造用膜40剝離之步驟及將半導體晶圓附著至接合層2之步驟。
首先,製備半導體裝置製造用膜40,如圖1A及圖1B所示,並將隔離膜42自半導體裝置製造用膜40剝離,如上文所述在半導體裝置製造用膜40中對隔離膜42實施處理以具有形成於其中之切口,且隔離膜42之切口之深度為隔離膜42厚度的至多2/3。因此,當將隔離膜42自半導體裝置製造用膜40剝離時,可防止隔離膜42自其切口撕裂。剝離速率可為1mm/秒至100mm/sec。
[安裝步驟]
如圖2A中所示,將半導體晶圓4附著至附有接合層之切割帶1之接合層2上,並藉助黏合而固定於其上(安裝步驟)。此時,接合層2呈未固化狀態(包括半固化狀態)。將附有接合層之切割帶1附著至半導體晶圓4之背面。半導體晶圓4之背面意指與電路面相對之面(亦稱作非電路面、非電極形成面等)。附著方法不受特別限制,但碾壓結合方法較佳。碾壓結合通常係藉由用碾壓工具(例如壓輥)碾壓來實施。
(切割步驟)
然後,如圖2B中所示,切割半導體晶圓4。因此,將半導體晶圓4切削成規定大小並使其個體化(形成為小件)以製造半導體晶片5。舉例而言,自半導體晶圓4之電路面側根 據正常方法來實施該切割。此外,本步驟可採用(例如)形成抵達附有接合層之切割帶1之切口之切削方法(稱作全切)。用於本步驟之切割設備不受特別限制,且可使用習知設備。此外,由於半導體晶圓4係藉由具有接合層2之附有接合層之切割帶1黏合併固定,故可抑制晶片裂紋及晶片脫離,且亦可抑制半導體晶圓4之損壞。就此而言,當接合層2係由含有環氧樹脂之樹脂組合物形成時,在切口表面處可抑制或防止自接合層產生黏合劑擠出,甚至當藉由切割來切削其時。因此,可抑制或防止切削表面本身重新附著(成塊)且因此可進一步更方便地實施在下文中欲提及之拾取。
在展開附有接合層之切割帶1之情形下,可使用習知展開設備實施展開。該展開裝置具有能夠將附有接合層之切割帶1向下推進經過切割環之環形外環及具有小於該外環之直徑且支撐附有接合層之切割帶之內環。由於該展開步驟,因此可防止毗鄰半導體晶片因在下文欲提及之拾取步驟中彼此接觸而損壞。
(拾取步驟)
為收集黏合併固定至附有接合層之切割帶1之半導體晶片5,如圖2C中所示對半導體晶片5實施拾取以將半導體晶片5連同接合層2一起自切割帶3剝離。拾取方法不受特別限制,且可採用習知之各種方法。舉例而言,可提及包括用針將每一半導體晶片5自附有接合層之切割帶1之基礎材料31側向上推進並用拾取設備拾取經推進半導體晶片5之 方法。就此而言,利用接合層2保護所拾取半導體晶片5之背面。
(覆晶連接步驟)
藉由如圖2D中所示之覆晶結合方法(覆晶安裝方法)將所拾取半導體晶片5固定至黏附體6,例如基板。具體而言,根據通常方式將半導體晶片5以半導體晶片5之電路面(亦稱作正面、電路圖案形成面、電極形成面等)與黏附體6相對之形式固定至黏附體6。舉例而言,使形成於半導體晶片5之電路面側處之凸塊51與接合附著至黏附體6之連接墊之導電材料61(例如焊料)接觸且導電材料61在碾壓下熔化,藉此可使半導體晶片5與黏附體6之間牢固電連接且可將半導體晶片5固定至黏附體6(覆晶結合步驟)。此時,在半導體晶片5與黏附體6之間形成間隙且間隙間之距離通常為約30μm至300μm。就此而言,在使半導體晶片5覆晶結合(覆晶連接)於黏附體6上後,重要的是,洗滌半導體晶片5與黏附體6之相對面及間隙並隨後將封裝材料(例如封裝樹脂)填充至該等間隙中以實施封裝。
作為黏附體6,可使用各種基板,例如引線框架及電路板(例如佈線電路板)。基板之材料不受特別限制且可提及陶瓷基板及塑膠基板。塑膠基板之實例包括環氧基板、雙馬來醯亞胺三嗪基板及聚醯亞胺基板。
在覆晶結合步驟中,凸塊及導電材料之材料不受特別限制且其實例包括焊料(合金),例如基於錫-鉛之金屬材料、基於錫-銀之金屬材料、基於錫-銀-銅之金屬材料、基於錫 -鋅之金屬材料及基於錫-鋅-鉍之金屬材料、以及基於金之金屬材料及基於銅之金屬材料。
附帶而言,在覆晶結合步驟中,熔化導電材料以連接半導體晶片5之電路面側處之凸塊與黏附體6之表面上之導電材料。在熔化導電材料時之溫度通常為約260℃(例如,250℃至300℃)。可藉由用環氧樹脂或類似物形成接合層來將本發明附有接合層之切割帶製成具有能夠承受覆晶結合步驟中之高溫之耐熱性。
在本步驟中,較佳洗滌半導體晶片5與黏附體6之間的相對面(電極形成面)及間隙。在洗滌時欲使用之洗滌液不受特別限制且其實例包括有機洗滌液及水性洗滌液。本發明附有接合層之切割帶中之接合層對洗滌液具有耐溶劑性且對此等洗滌液實質上無溶解性。因此,如上所述,可使用各種洗滌液作為洗滌液且該洗滌可藉由任一習用方法來達成而無需任一專用洗滌液。
然後,實施封裝步驟以封裝覆晶結合之半導體晶片5與黏附體6之間之間隙。使用封裝樹脂來實施封裝步驟。此時之封裝條件不受特別限制,但封裝樹脂之固化通常在175℃下實施60秒至90秒。然而,在本發明中,對此沒有限制,舉例而言,固化可在165℃至185℃之溫度下實施數分鐘。藉由此步驟中之熱處理,不僅封裝樹脂而且接合層2亦同時經熱固化。因此,封裝樹脂及接合層2二者均隨著熱固化程序固化並收縮。因此,由於封裝樹脂之固化收縮而給予半導體晶片5之應力可因接合層2之固化收縮抵消或 鬆弛。此外,在該步驟中,接合層2可完全或幾乎完全經熱固化且可以優良緊密黏合性附著至半導體元件之背面。此外,本發明接合層2可連同封裝步驟中之封裝材料一起熱固化,甚至當膜呈未固化狀態時,使得無需新添加熱固化接合層2之步驟。
封裝樹脂不受特別限制,只要該材料係具有絕緣性質之樹脂(絕緣樹脂),且可在已知封裝材料(例如封裝樹脂)中適宜地選擇並使用。封裝樹脂較佳係具有彈性之絕緣樹脂。封裝樹脂之實例包括含有環氧樹脂之樹脂組合物。作為環氧樹脂,可提及上文中所例示之環氧樹脂。此外,由含有環氧樹脂之樹脂組合物組成之封裝樹脂可含有不同於環氧樹脂之熱固性樹脂(例如酚系樹脂)或除環氧樹脂以外的熱塑性樹脂。附帶而言,亦可利用酚系樹脂作為環氧樹脂之固化劑,且作為此一酚系樹脂,可提及上文中所例示之酚系樹脂。
以上實施例包括附有接合層之切割帶,其包含層壓於切割帶上之接合層;及半導體裝置製造用膜,其包含層壓有隔離膜之附有接合層之切割帶。然而,在本發明半導體裝置製造用膜中,接合層可不經層壓。具體而言,本發明半導體裝置製造用膜可包含隔離膜及以預定間隔層壓於該隔離膜上之複數個切割帶。在此情形下,半導體裝置製造用膜之製造方法包含製備附有隔離膜之膜之步驟,該膜包含層壓於隔離膜上之切割帶;根據對應於該膜所黏附之半導體晶圓之大小切削該附有隔離膜之膜之步驟,其中將該膜 切削至該隔離膜始自該切割帶側之厚度之至多2/3的深度。藉由使用半導體裝置製造用膜(其中切割帶係以預定間隔層壓於隔離膜上)製造半導體裝置之方法可至少包含將該隔離膜自該半導體裝置製造用膜剝離之步驟及將半導體晶圓附著至該切割帶上之步驟。在該將半導體晶圓附著至該切割帶之步驟後,可實施在(例如)切割該半導體晶圓之步驟、拾取藉由切割所獲得之半導體晶片之步驟及將該半導體晶片覆晶結合至黏附體之步驟,藉此製造半導體裝置。
根據使用附有接合層之切割帶1製造之半導體裝置(覆晶安裝式半導體裝置),該接合層係附著至該半導體晶片之背面,且因此,可以優良可見度施加雷射標記。具體而言,甚至當該標記方法係雷射標記方法時,可以優良反差比施加雷射標記,且可以優良可見度觀察到藉由雷射標記所施加之各種資訊(例如,文字資訊及圖形資訊)。在雷射標記時,可利用已知雷射標記設備。此外,作為雷射,可利用各種雷射,例如氣體雷射、固態雷射及液體雷射。特定而言,作為氣體雷射,可利用任何已知氣體雷射而無特別限制,但二氧化碳雷射(CO2雷射)及準分子雷射(ArF雷射、KrF雷射、XeCl雷射、XeF雷射等)係適宜的。作為固態雷射,可利用任何已知固態雷射而無特別限制,但YAG雷射(例如Nd:YAG雷射)及YVO4雷射係適宜的。
由於使用本發明附有接合層之切割帶製造之半導體裝置係藉由覆晶安裝方法安裝之半導體裝置,因此該裝置具有 與藉由晶粒結合安裝方法安裝之半導體裝置相比薄化及小型化之形狀。因此,可適宜地使用半導體裝置作為各種電子裝置及電子部分或其材料及部件。具體而言,作為利用本發明覆晶安裝式半導體裝置之電子裝置,可提及所謂「行動電話」及「PHS」、小型電腦[例如,所謂「PDA」(手持式終端機)、所謂「筆記本型個人電腦」、所謂「Net Book(商品名)」、及所謂「可戴式電腦」等]、呈「行動電話」與電腦一體化之形式之小型電子裝置、所謂「Digital Camara(商品名)」、所謂「數位攝影機」、小型電視機、小型遊戲機、小型數位聲訊播放器、所謂「電子記事本」、所謂「電子詞典」、用於所謂「電子書」之電子裝置終端機、諸如小型數位型手錶等行動電子裝置(可攜式電子裝置)、及諸如此類。不必說,亦可提及除行動電子裝置以外的電子裝置(固定式電子裝置等),例如,所謂「桌上型個人電腦」、薄型電視機、用於記錄及重現之電子裝置(硬磁碟記錄器、DVD播放器等)、投影機、微機械及諸如此類。另外,電子部分或電子裝置及電子部分之材料及部件不受特別限制且其實例包括所謂「CPU」之部分及各種記憶體裝置(所謂「記憶體」、硬磁碟等)之部件。
以上實施例係針對在覆晶型半導體裝置製造中使用該半導體裝置製造用膜而言。然而,本發明半導體裝置製造用膜不限於該實施例,但可用於製造除覆晶型半導體裝置以外之其他半導體裝置。舉例而言,在將該隔離膜自該半導體裝置製造用膜剝離後,在該膜之另一用途中可將該附有 接合層之切割帶之接合層附著至半導體晶圓(半導體晶片)之表面上。在此情形下,該半導體裝置製造用膜之附有接合層之切割帶可用作習知切割/晶粒結合膜。
實例
下文將以例示性方式詳細闡述本發明之較佳實例。然而,除非超出本發明之主旨,否則本發明並不限於以下實例。此外,除非另有說明,否則每一實例中之份數皆係重量標準。
實例1 <接合層之製備>
以100份基於丙烯酸酯聚合物(其含有丙烯酸乙酯及甲基丙烯酸甲酯作為主要組份)(商品名「PARACRON W-197CM」,由Negami Chemical Industrial有限公司製造)計,將113份環氧樹脂(商品名「EPICOAT 1004」,由JER有限公司製造)、121份酚系樹脂(商品名「MILEX XLC-4L」,由Mitsui Chemicals公司製造)、246份球形二氧化矽(商品名「SO-25R」,由Admatechs有限公司製造)、5份染料l(商品名「OIL GREEN 502」,由Orient Chemical Industries有限公司製造)及5份染料2(商品名「OIL BLACK BS」,由Orient Chemical Industries有限公司製造)溶於甲基乙基酮中以製備固體濃度為23.6重量%之膏狀組合物之溶液。
將該膏狀組合物之溶液施加至具有50μm厚度之聚對苯二甲酸乙二酯膜之隔離膜(其已經受聚矽氧-釋放處理)上, 且隨後在130℃下乾燥2分鐘以製備膜A,其具有層壓於該隔離膜上厚度(平均厚度)為20μm之接合層A。
<半導體裝置製造用膜之製備> 1.附有隔離膜之膜之製備:
使用手動輥將膜A附著至切割帶(商品名「V-8-T」,由Nitto Denko有限公司製造;基礎材料之平均厚度為65μm;壓敏接合層之平均厚度為10μm)之壓敏接合層以製備附有隔離膜之膜A,其中該附有接合層之切割帶係層壓於該隔離膜上。
2.預切削:
使用環形湯姆森刀片對附有隔離膜之膜A實施預切削,得到半導體裝置製造用膜。藉由在該湯姆森刀片內部及外部引入間隔物來控制預切削深度。具體而言,引入間隔物以使得隔離膜中之切削深度可為13μm。
在實例1之半導體裝置製造用膜中,接合層之厚度(平均厚度)為20μm。在該切割帶(商品名「V-8-T」,由Nitto Denko有限公司製造)中,基礎材料之厚度(平均厚度)為65μm,壓敏接合層之厚度(平均厚度)為10μm,且該帶之總厚度為75μm。因此,在實例1之半導體裝置製造用膜中,接合層之厚度與切割帶之壓敏接合層之厚度的比率為20/10(平均厚度之比率);且接合層之厚度與切割帶之厚度(基礎材料與壓敏接合層之總厚度)的比率(平均厚度之比率)為20/75。
實例2
實例2之半導體裝置製造用膜係以與實例1類似之方式製備,然而,其中引入間隔物以使得在預切削期間隔離膜中之切削深度可為20μm。
比較實例1
比較實例1之半導體裝置製造用膜係以與實例1類似之方式製備,然而,其中引入隔離膜以使得在預切削期間隔離膜之切削深度可為27μm。
<評價>
如下測試實例1、實例2及比較實例1之半導體裝置製造用膜之隔離膜之可釋放性。
對半導體晶圓(直徑為8英吋,厚度為0.6mm;矽鏡面晶圓)之背面實施拋光,得到厚度為0.2mm之鏡面晶圓,其係用作工件。將該隔離膜自該半導體裝置製造用膜剝離,在70℃下藉由輥碾壓結合將該鏡面晶圓(工件)附著至該接合層上。該半導體晶圓之拋光條件及附著條件如下。
(半導體晶圓之研磨條件)
研磨設備:商品名「DFG-8560」,由DISCO公司製造
半導體晶圓:直徑為8英吋(背面經研磨以使得自0.6mm之厚度直到0.2mm之厚度為止)
(附著條件)
附著設備:商品名「MA-3000III」,由Nitto Seiki有限公司製造
附著速度:10mm/min
附著壓力:0.15MPa
附著時階段溫度:70℃
在晶圓安裝期間,如下評價晶圓之可安裝性:將已充分剝離隔離膜之樣品評定為「良好」;並將未能充分剝離隔離膜之樣品評定為「差」。結果顯示於表1中。
自表1可知,在實例1及2之半導體裝置製造用膜中,隔離膜可充分剝離。另一方面,在比較實例1之半導體裝置製造用膜中,隔離膜自切削部分(切口)斷裂,且未能充分剝離。
儘管本文已參照本發明特定實施例詳細闡述了本發明,但熟習此項技術者應瞭解,可在不背離本發明範疇之情況下對本發明做出各種改變及修改。
本申請案係基於2010年7月28日申請之日本專利申請案第2010-169556號,其全部內容以引用方式併入本文中。
1‧‧‧附有接合層之切割帶
2‧‧‧接合層
3‧‧‧切割帶
4‧‧‧半導體晶圓
5‧‧‧半導體晶片
6‧‧‧黏附體
31‧‧‧基礎材料
32‧‧‧壓敏接合層
40‧‧‧半導體裝置製造用膜
42‧‧‧隔離膜
44‧‧‧切口
51‧‧‧形成於半導體晶片5之電路面側上之凸塊
61‧‧‧附著至黏附體6之連接墊之結合用導電材料
圖1A係顯示本發明半導體裝置製造用膜之一個實例的剖面示意圖;且圖1B係其部分平面圖。
圖2A至2D係顯示使用本發明附有接合層之切割帶來製造半導體裝置之方法之一個實例的剖面示意圖。

Claims (1)

  1. 一種半導體裝置製造用膜,其係附有接合層之切割帶以接合層作為附著面而以預定間隔層壓於隔離膜者,該附有接合層之切割帶係於該切割帶上層壓有該接合層者,該隔離膜具有沿該切割帶之外周邊形成之切口,該切口之深度為該隔離膜厚度的至多2/3,該接合層添加有著色劑,且貼附於覆晶安裝之半導體裝置所具有之半導體晶片之背面,該接合層之最外周邊緣定義該接合層之最外側之直徑,該切割帶之最外周邊緣定義該切割帶之最外側之直徑,該接合層之最外側之直徑小於該切割帶之最外側之直徑,且該接合層之最外側之直徑小於該切口之最外側之直徑。
TW100123190A 2010-07-28 2011-06-30 半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法 TWI647752B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010169556A JP5546985B2 (ja) 2010-07-28 2010-07-28 半導体装置製造用フィルム、半導体装置製造用フィルムの製造方法、及び、半導体装置の製造方法。
JP2010-169556 2010-07-28

Publications (2)

Publication Number Publication Date
TW201205661A TW201205661A (en) 2012-02-01
TWI647752B true TWI647752B (zh) 2019-01-11

Family

ID=45525510

Family Applications (2)

Application Number Title Priority Date Filing Date
TW105104353A TWI649800B (zh) 2010-07-28 2011-06-30 半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法
TW100123190A TWI647752B (zh) 2010-07-28 2011-06-30 半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法

Family Applications Before (1)

Application Number Title Priority Date Filing Date
TW105104353A TWI649800B (zh) 2010-07-28 2011-06-30 半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法

Country Status (5)

Country Link
US (2) US8986486B2 (zh)
JP (1) JP5546985B2 (zh)
KR (2) KR101544240B1 (zh)
CN (2) CN102347264B (zh)
TW (2) TWI649800B (zh)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5546985B2 (ja) * 2010-07-28 2014-07-09 日東電工株式会社 半導体装置製造用フィルム、半導体装置製造用フィルムの製造方法、及び、半導体装置の製造方法。
JP5800640B2 (ja) * 2011-08-30 2015-10-28 日東電工株式会社 発光ダイオード装置の製造方法
KR101403864B1 (ko) * 2011-12-27 2014-06-09 제일모직주식회사 다이싱 다이본딩 필름
US8872358B2 (en) * 2012-02-07 2014-10-28 Shin-Etsu Chemical Co., Ltd. Sealant laminated composite, sealed semiconductor devices mounting substrate, sealed semiconductor devices forming wafer, semiconductor apparatus, and method for manufacturing semiconductor apparatus
US20140234577A1 (en) * 2013-02-15 2014-08-21 Identive Group, Inc. Plastic Card Prelaminate and Plastic Card Including a Phone Sticker
JP6369996B2 (ja) * 2013-10-21 2018-08-08 リンテック株式会社 樹脂膜形成用シート
JP6452416B2 (ja) * 2014-12-04 2019-01-16 古河電気工業株式会社 ウエハ加工用テープ
JP6379389B2 (ja) * 2014-12-15 2018-08-29 リンテック株式会社 ダイシングダイボンディングシート
JP6264509B2 (ja) * 2015-07-21 2018-01-24 ソニー株式会社 両面粘着テープ、当該両面粘着テープを備える電子機器、前記両面粘着テープを備えた解体構造、接着構造
EP3546540A4 (en) * 2016-11-25 2020-10-14 Mitsui Chemicals Tohcello, Inc. ADHESIVE LAMINATE FILM AND ELECTRONIC DEVICE PRODUCTION PROCESS
US10297564B2 (en) * 2017-10-05 2019-05-21 Infineon Technologies Ag Semiconductor die attach system and method
CN108091417B (zh) * 2017-12-22 2020-02-21 歌尔股份有限公司 柔性导电膜、发声装置以及可穿戴设备
US10875206B2 (en) * 2018-01-08 2020-12-29 Michael Dwane Pohlad Repositionable adhesive coated slip sheet
KR101936873B1 (ko) * 2018-03-23 2019-01-11 (주)엠티아이 웨이퍼 레벨용 백사이드 점착테이프 및 이의 제조방법
JP7033004B2 (ja) * 2018-05-24 2022-03-09 日東電工株式会社 ダイシングダイボンドフィルムおよび半導体装置製造方法
KR20200110488A (ko) * 2019-03-13 2020-09-24 삼성디스플레이 주식회사 보호필름을 포함하는 패널 하부 시트 및 보호필름 박리방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007288170A (ja) * 2006-03-20 2007-11-01 Hitachi Chem Co Ltd ダイボンドダイシングシート
TWI303454B (zh) * 2004-06-08 2008-11-21 Hitachi Chemical Co Ltd

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6524881B1 (en) 2000-08-25 2003-02-25 Micron Technology, Inc. Method and apparatus for marking a bare semiconductor die
JP2004047823A (ja) * 2002-07-12 2004-02-12 Tokyo Seimitsu Co Ltd ダイシングテープ貼付装置およびバックグラインド・ダイシングテープ貼付システム
JP2004063551A (ja) 2002-07-25 2004-02-26 Hitachi Chem Co Ltd 半導体素子表面保護用フィルム及び半導体素子ユニット
DE10235482B3 (de) 2002-08-02 2004-01-22 Süss Microtec Lithography Gmbh Vorrichtung zum Fixieren dünner und flexibler Substrate
JP4341343B2 (ja) 2002-10-04 2009-10-07 日立化成工業株式会社 表面保護フィルム及びその製造方法
JP4107417B2 (ja) * 2002-10-15 2008-06-25 日東電工株式会社 チップ状ワークの固定方法
JP4364508B2 (ja) 2002-12-27 2009-11-18 リンテック株式会社 チップ裏面用保護膜形成用シートおよび保護膜付きチップの製造方法
JP2004221169A (ja) 2003-01-10 2004-08-05 Hitachi Chem Co Ltd 半導体素子保護材、及び半導体装置
JP5191627B2 (ja) 2004-03-22 2013-05-08 日立化成株式会社 フィルム状接着剤およびこれを用いた半導体装置の製造方法
JP2005350520A (ja) * 2004-06-08 2005-12-22 Hitachi Chem Co Ltd 接着シート及びその製造方法、並びに、半導体装置の製造方法及び半導体装置
JP4642436B2 (ja) * 2004-11-12 2011-03-02 リンテック株式会社 マーキング方法および保護膜形成兼ダイシング用シート
JP4614126B2 (ja) * 2005-02-21 2011-01-19 リンテック株式会社 積層シート、積層シートの巻取体およびそれらの製造方法
JP2007100029A (ja) * 2005-10-07 2007-04-19 Toyota Industries Corp 粘着フィルム及び粘着フィルムの製造装置並びに製造方法
JP4865312B2 (ja) 2005-12-05 2012-02-01 古河電気工業株式会社 チップ用保護膜形成用シート
JP2007250970A (ja) * 2006-03-17 2007-09-27 Hitachi Chem Co Ltd 半導体素子裏面保護用フィルム及びそれを用いた半導体装置とその製造法
JP4846406B2 (ja) 2006-03-28 2011-12-28 リンテック株式会社 チップ用保護膜形成用シート
JP2008006386A (ja) 2006-06-29 2008-01-17 Furukawa Electric Co Ltd:The チップ用保護膜形成用シートによる保護膜形成方法。
JP4698519B2 (ja) * 2006-07-31 2011-06-08 日東電工株式会社 半導体ウエハマウント装置
US7910206B2 (en) * 2006-11-10 2011-03-22 Nitto Denko Corporation Self-rolling laminated sheet and self-rolling pressure-sensitive adhesive sheet
JP2008166451A (ja) 2006-12-27 2008-07-17 Furukawa Electric Co Ltd:The チップ保護用フィルム
JP2008274255A (ja) * 2007-03-30 2008-11-13 Sanyo Chem Ind Ltd 帯電防止性粘着剤
JP4360653B2 (ja) * 2007-09-14 2009-11-11 古河電気工業株式会社 ウエハ加工用テープ
JP2010031183A (ja) 2008-07-30 2010-02-12 Furukawa Electric Co Ltd:The エネルギー線硬化型チップ保護用フィルム
JP5388792B2 (ja) * 2009-10-23 2014-01-15 新日鉄住金化学株式会社 多層接着シート及びその製造方法
JP5546985B2 (ja) * 2010-07-28 2014-07-09 日東電工株式会社 半導体装置製造用フィルム、半導体装置製造用フィルムの製造方法、及び、半導体装置の製造方法。

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI303454B (zh) * 2004-06-08 2008-11-21 Hitachi Chemical Co Ltd
JP2007288170A (ja) * 2006-03-20 2007-11-01 Hitachi Chem Co Ltd ダイボンドダイシングシート

Also Published As

Publication number Publication date
US8986486B2 (en) 2015-03-24
JP5546985B2 (ja) 2014-07-09
KR20150048697A (ko) 2015-05-07
CN106206396A (zh) 2016-12-07
US9761475B2 (en) 2017-09-12
KR101596199B1 (ko) 2016-02-22
CN102347264B (zh) 2016-12-21
KR101544240B1 (ko) 2015-08-12
TW201205661A (en) 2012-02-01
US20120024469A1 (en) 2012-02-02
CN102347264A (zh) 2012-02-08
JP2012033557A (ja) 2012-02-16
TW201618179A (zh) 2016-05-16
CN106206396B (zh) 2019-03-08
TWI649800B (zh) 2019-02-01
US20150162236A1 (en) 2015-06-11
KR20120011319A (ko) 2012-02-07

Similar Documents

Publication Publication Date Title
TWI647752B (zh) 半導體裝置製造用膜、半導體裝置製造用膜之製造方法及半導體裝置之製造方法
TWI479557B (zh) 覆晶型半導體背面用膜
TWI429034B (zh) 覆晶型半導體背面用膜及其應用
TWI467644B (zh) 切晶帶一體型晶圓背面保護膜
TWI545638B (zh) 半導體背面用切晶帶一體膜
TWI591150B (zh) 切晶帶一體型晶圓背面保護膜、半導體器件之製造方法、覆晶安裝半導體器件
TWI444454B (zh) 結合有切晶帶之半導體背面用膜與製造該膜之方法、及製造半導體裝置之方法
TWI531632B (zh) 使用切晶帶一體型晶圓背面保護膜製造半導體器件之方法
TWI445798B (zh) 覆晶型半導體背面用膜、半導體背面用切割帶一體膜、半導體元件之製造方法、及覆晶型半導體元件
TWI460778B (zh) 半導體背面用切晶帶一體膜及半導體裝置之製造方法
TWI444451B (zh) 用於半導體背面之切晶帶一體型薄膜
TWI446431B (zh) 覆晶型半導體背面用膜及半導體背面用切晶帶一體膜
JP6530242B2 (ja) 半導体裏面用フィルム及びその用途
TWI489536B (zh) 覆晶型半導體背面用膜
TWI604003B (zh) 半導體背面用切晶帶一體膜
TWI444452B (zh) 半導體背面用切割帶一體膜
TWI605504B (zh) Flip-chip type semiconductor device manufacturing method
TWI444453B (zh) 半導體背面保護用切割帶一體膜
TWI437072B (zh) 覆晶型半導體背面用膜、半導體背面用切晶帶一體膜、半導體裝置之製造方法及覆晶型半導體裝置
JP2014131053A (ja) ダイシングテープ一体型半導体裏面用フィルム及び半導体装置の製造方法
JP2014222779A (ja) 半導体装置製造用フィルム、半導体装置製造用フィルムの製造方法、及び、半導体装置の製造方法。
JP5612747B2 (ja) 半導体装置製造用フィルム、半導体装置製造用フィルムの製造方法、及び、半導体装置の製造方法。