TWI638431B - 記憶元件以及可程式邏輯裝置 - Google Patents

記憶元件以及可程式邏輯裝置 Download PDF

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Publication number
TWI638431B
TWI638431B TW106132988A TW106132988A TWI638431B TW I638431 B TWI638431 B TW I638431B TW 106132988 A TW106132988 A TW 106132988A TW 106132988 A TW106132988 A TW 106132988A TW I638431 B TWI638431 B TW I638431B
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TW
Taiwan
Prior art keywords
transistor
potential
film
wiring
oxide semiconductor
Prior art date
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TW106132988A
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English (en)
Chinese (zh)
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TW201810538A (zh
Inventor
池田隆之
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半導體能源研究所股份有限公司
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Publication of TW201810538A publication Critical patent/TW201810538A/zh
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Publication of TWI638431B publication Critical patent/TWI638431B/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/70—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the floating gate being an electrode shared by two or more components
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17764—Structural details of configuration resources for reliability
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17758—Structural details of configuration resources for speeding up configuration or reconfiguration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/1776—Structural details of configuration resources for memories
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Dram (AREA)
  • Non-Volatile Memory (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
TW106132988A 2012-07-18 2013-07-15 記憶元件以及可程式邏輯裝置 TWI638431B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012-159449 2012-07-18
JP2012159449 2012-07-18

Publications (2)

Publication Number Publication Date
TW201810538A TW201810538A (zh) 2018-03-16
TWI638431B true TWI638431B (zh) 2018-10-11

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Family Applications (2)

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TW102125223A TWI608569B (zh) 2012-07-18 2013-07-15 記憶元件以及可程式邏輯裝置
TW106132988A TWI638431B (zh) 2012-07-18 2013-07-15 記憶元件以及可程式邏輯裝置

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Country Link
US (2) US8934299B2 (enExample)
JP (6) JP6143590B2 (enExample)
KR (6) KR102107591B1 (enExample)
TW (2) TWI608569B (enExample)

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KR101911382B1 (ko) * 2009-11-27 2018-10-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
JP6333028B2 (ja) * 2013-04-19 2018-05-30 株式会社半導体エネルギー研究所 記憶装置及び半導体装置
JP6625328B2 (ja) * 2014-03-06 2019-12-25 株式会社半導体エネルギー研究所 半導体装置の駆動方法
JP6677449B2 (ja) * 2014-03-13 2020-04-08 株式会社半導体エネルギー研究所 半導体装置の駆動方法
US9401364B2 (en) * 2014-09-19 2016-07-26 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic component, and electronic device
US9281305B1 (en) * 2014-12-05 2016-03-08 National Applied Research Laboratories Transistor device structure
US9953695B2 (en) 2015-12-29 2018-04-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic device, and semiconductor wafer
US11360934B1 (en) 2017-09-15 2022-06-14 Groq, Inc. Tensor streaming processor architecture
US11114138B2 (en) 2017-09-15 2021-09-07 Groq, Inc. Data structures with multiple read ports
US11868804B1 (en) 2019-11-18 2024-01-09 Groq, Inc. Processor instruction dispatch configuration
US11243880B1 (en) 2017-09-15 2022-02-08 Groq, Inc. Processor architecture
US11170307B1 (en) 2017-09-21 2021-11-09 Groq, Inc. Predictive model compiler for generating a statically scheduled binary with known resource constraints
US10754621B2 (en) * 2018-08-30 2020-08-25 Groq, Inc. Tiled switch matrix data permutation circuit
US11455370B2 (en) 2018-11-19 2022-09-27 Groq, Inc. Flattened input stream generation for convolution with expanded kernel
US12340300B1 (en) 2018-09-14 2025-06-24 Groq, Inc. Streaming processor architecture
TW202537448A (zh) 2019-01-25 2025-09-16 日商半導體能源研究所股份有限公司 半導體裝置及包括該半導體裝置的電子裝置
US11908947B2 (en) 2019-08-08 2024-02-20 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP7577671B2 (ja) 2019-09-20 2024-11-05 株式会社半導体エネルギー研究所 半導体装置
WO2021130591A1 (ja) 2019-12-27 2021-07-01 株式会社半導体エネルギー研究所 半導体装置

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Also Published As

Publication number Publication date
JP2022159399A (ja) 2022-10-17
TW201810538A (zh) 2018-03-16
KR20220119590A (ko) 2022-08-30
KR102368444B1 (ko) 2022-02-25
KR102210818B1 (ko) 2021-02-01
KR102436903B1 (ko) 2022-08-25
KR20200047485A (ko) 2020-05-07
US20140021474A1 (en) 2014-01-23
JP2017182869A (ja) 2017-10-05
KR20140011260A (ko) 2014-01-28
JP2021073724A (ja) 2021-05-13
KR20200103597A (ko) 2020-09-02
JP6143590B2 (ja) 2017-06-07
JP6325149B2 (ja) 2018-05-16
US8934299B2 (en) 2015-01-13
KR20210012032A (ko) 2021-02-02
TW201413874A (zh) 2014-04-01
US20150123705A1 (en) 2015-05-07
JP2019153796A (ja) 2019-09-12
JP2018139165A (ja) 2018-09-06
JP6516897B2 (ja) 2019-05-22
KR102150574B1 (ko) 2020-09-01
JP2014038684A (ja) 2014-02-27
TWI608569B (zh) 2017-12-11
KR102556197B1 (ko) 2023-07-14
US9985636B2 (en) 2018-05-29
KR102107591B1 (ko) 2020-05-07
KR20220027128A (ko) 2022-03-07

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